audio ok

hc

2023-12-11 223293205a7265c8b02882461ba8996650048ade

 kernel/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h
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@@ -1,13 +1,5 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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 /* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 and
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- * only version 2 as published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- * GNU General Public License for more details.
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  */
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 #ifndef _DPU_CORE_PERF_H_
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@@ -19,9 +11,21 @@
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 #include <drm/drm_crtc.h>
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 #include "dpu_hw_catalog.h"
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-#include "dpu_power_handle.h"
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 #define	DPU_PERF_DEFAULT_MAX_CORE_CLK_RATE	412500000
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+
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+/**
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+ * enum dpu_core_perf_data_bus_id - data bus identifier
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+ * @DPU_CORE_PERF_DATA_BUS_ID_MNOC: DPU/MNOC data bus
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+ * @DPU_CORE_PERF_DATA_BUS_ID_LLCC: MNOC/LLCC data bus
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+ * @DPU_CORE_PERF_DATA_BUS_ID_EBI: LLCC/EBI data bus
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+ */
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+enum dpu_core_perf_data_bus_id {
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+	DPU_CORE_PERF_DATA_BUS_ID_MNOC,
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+	DPU_CORE_PERF_DATA_BUS_ID_LLCC,
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+	DPU_CORE_PERF_DATA_BUS_ID_EBI,
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+	DPU_CORE_PERF_DATA_BUS_ID_MAX,
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+};
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 /**
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  * struct dpu_core_perf_params - definition of performance parameters
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@@ -30,8 +34,8 @@
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  * @core_clk_rate: core clock rate request
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  */
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 struct dpu_core_perf_params {
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-	u64 max_per_pipe_ib[DPU_POWER_HANDLE_DBUS_ID_MAX];
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-	u64 bw_ctl[DPU_POWER_HANDLE_DBUS_ID_MAX];
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+	u64 max_per_pipe_ib;
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+	u64 bw_ctl;
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 	u64 core_clk_rate;
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 };
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@@ -52,7 +56,6 @@
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  * @dev: Pointer to drm device
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  * @debugfs_root: top level debug folder
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  * @catalog: Pointer to catalog configuration
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- * @phandle: Pointer to power handler
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  * @core_clk: Pointer to core clock structure
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  * @core_clk_rate: current core clock rate
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  * @max_core_clk_rate: maximum allowable core clock rate
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@@ -66,7 +69,6 @@
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 	struct drm_device *dev;
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 	struct dentry *debugfs_root;
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 	struct dpu_mdss_cfg *catalog;
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-	struct dpu_power_handle *phandle;
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 	struct dss_clk *core_clk;
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 	u64 core_clk_rate;
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 	u64 max_core_clk_rate;
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@@ -113,21 +115,20 @@
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  * @perf: Pointer to core performance context
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  * @dev: Pointer to drm device
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  * @catalog: Pointer to catalog
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- * @phandle: Pointer to power handle
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  * @core_clk: pointer to core clock
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  */
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 int dpu_core_perf_init(struct dpu_core_perf *perf,
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 		struct drm_device *dev,
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 		struct dpu_mdss_cfg *catalog,
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-		struct dpu_power_handle *phandle,
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 		struct dss_clk *core_clk);
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+
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+struct dpu_kms;
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 /**
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  * dpu_core_perf_debugfs_init - initialize debugfs for core performance context
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- * @perf: Pointer to core performance context
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+ * @dpu_kms: Pointer to the dpu_kms struct
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  * @debugfs_parent: Pointer to parent debugfs
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  */
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-int dpu_core_perf_debugfs_init(struct dpu_core_perf *perf,
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-		struct dentry *parent);
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+int dpu_core_perf_debugfs_init(struct dpu_kms *dpu_kms, struct dentry *parent);
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 #endif /* _DPU_CORE_PERF_H_ */