forked from ~ljy/RK356X_SDK_RELEASE
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hc
2023-12-11 223293205a7265c8b02882461ba8996650048ade 
 kernel/arch/arm/boot/dts/imx6ul.dtsi
....@@ -59,22 +59,21 @@
5959 			compatible = "arm,cortex-a7";
6060 			device_type = "cpu";
6161 			reg = <0>;
62
+			clock-frequency = <696000000>;
6263 			clock-latency = <61036>; /* two CLK32 periods */
6364 			#cooling-cells = <2>;
64
-			operating-points = <
65
+			operating-points =
6566 				/* kHz	uV */
66
-				696000	1275000
67
-				528000	1175000
68
-				396000	1025000
69
-				198000	950000
70
-			>;
71
-			fsl,soc-operating-points = <
67
+				<696000	1275000>,
68
+				<528000	1175000>,
69
+				<396000	1025000>,
70
+				<198000	950000>;
71
+			fsl,soc-operating-points =
7272 				/* KHz	uV */
73
-				696000	1275000
74
-				528000	1175000
75
-				396000	1175000
76
-				198000	1175000
77
-			>;
73
+				<696000	1275000>,
74
+				<528000	1175000>,
75
+				<396000	1175000>,
76
+				<198000	1175000>;
7877 			clocks = <&clks IMX6UL_CLK_ARM>,
7978 				 <&clks IMX6UL_CLK_PLL2_BUS>,
8079 				 <&clks IMX6UL_CLK_PLL2_PFD2>,
....@@ -92,24 +91,12 @@
9291 		};
9392 	};
9493 
95
-	intc: interrupt-controller@a01000 {
96
-		compatible = "arm,gic-400", "arm,cortex-a7-gic";
97
-		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
98
-		#interrupt-cells = <3>;
99
-		interrupt-controller;
100
-		interrupt-parent = <&intc>;
101
-		reg = <0x00a01000 0x1000>,
102
-		      <0x00a02000 0x2000>,
103
-		      <0x00a04000 0x2000>,
104
-		      <0x00a06000 0x2000>;
105
-	};
106
-
10794 	timer {
10895 		compatible = "arm,armv7-timer";
109
-		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
110
-			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
111
-			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
112
-			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
96
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
97
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
98
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
99
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
113100 		interrupt-parent = <&intc>;
114101 		status = "disabled";
115102 	};
....@@ -142,21 +129,10 @@
142129 		clock-output-names = "ipp_di1";
143130 	};
144131 
145
-	tempmon: tempmon {
146
-		compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon";
147
-		interrupt-parent = <&gpc>;
148
-		interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
149
-		fsl,tempmon = <&anatop>;
150
-		nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
151
-		nvmem-cell-names = "calib", "temp_grade";
152
-		clocks = <&clks IMX6UL_CLK_PLL3_USB_OTG>;
153
-	};
154
-
155132 	pmu {
156133 		compatible = "arm,cortex-a7-pmu";
157134 		interrupt-parent = <&gpc>;
158135 		interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
159
-		status = "disabled";
160136 	};
161137 
162138 	soc {
....@@ -169,6 +145,21 @@
169145 		ocram: sram@900000 {
170146 			compatible = "mmio-sram";
171147 			reg = <0x00900000 0x20000>;
148
+			ranges = <0 0x00900000 0x20000>;
149
+			#address-cells = <1>;
150
+			#size-cells = <1>;
151
+		};
152
+
153
+		intc: interrupt-controller@a01000 {
154
+			compatible = "arm,gic-400", "arm,cortex-a7-gic";
155
+			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
156
+			#interrupt-cells = <3>;
157
+			interrupt-controller;
158
+			interrupt-parent = <&intc>;
159
+			reg = <0x00a01000 0x1000>,
160
+			      <0x00a02000 0x2000>,
161
+			      <0x00a04000 0x2000>,
162
+			      <0x00a06000 0x2000>;
172163 		};
173164 
174165 		dma_apbh: dma-apbh@1804000 {
....@@ -184,7 +175,7 @@
184175 			clocks = <&clks IMX6UL_CLK_APBHDMA>;
185176 		};
186177 
187
-		gpmi: gpmi-nand@1806000         {
178
+		gpmi: nand-controller@1806000 {
188179 			compatible = "fsl,imx6q-gpmi-nand";
189180 			#address-cells = <1>;
190181 			#size-cells = <1>;
....@@ -204,7 +195,7 @@
204195 			status = "disabled";
205196 		};
206197 
207
-		aips1: aips-bus@2000000 {
198
+		aips1: bus@2000000 {
208199 			compatible = "fsl,aips-bus", "simple-bus";
209200 			#address-cells = <1>;
210201 			#size-cells = <1>;
....@@ -218,7 +209,7 @@
218209 				reg = <0x02000000 0x40000>;
219210 				ranges;
220211 
221
-				ecspi1: ecspi@2008000 {
212
+				ecspi1: spi@2008000 {
222213 					#address-cells = <1>;
223214 					#size-cells = <0>;
224215 					compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
....@@ -227,10 +218,12 @@
227218 					clocks = <&clks IMX6UL_CLK_ECSPI1>,
228219 						 <&clks IMX6UL_CLK_ECSPI1>;
229220 					clock-names = "ipg", "per";
221
+					dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
222
+					dma-names = "rx", "tx";
230223 					status = "disabled";
231224 				};
232225 
233
-				ecspi2: ecspi@200c000 {
226
+				ecspi2: spi@200c000 {
234227 					#address-cells = <1>;
235228 					#size-cells = <0>;
236229 					compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
....@@ -239,10 +232,12 @@
239232 					clocks = <&clks IMX6UL_CLK_ECSPI2>,
240233 						 <&clks IMX6UL_CLK_ECSPI2>;
241234 					clock-names = "ipg", "per";
235
+					dmas = <&sdma 5 7 1>, <&sdma 6 7 2>;
236
+					dma-names = "rx", "tx";
242237 					status = "disabled";
243238 				};
244239 
245
-				ecspi3: ecspi@2010000 {
240
+				ecspi3: spi@2010000 {
246241 					#address-cells = <1>;
247242 					#size-cells = <0>;
248243 					compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
....@@ -251,10 +246,12 @@
251246 					clocks = <&clks IMX6UL_CLK_ECSPI3>,
252247 						 <&clks IMX6UL_CLK_ECSPI3>;
253248 					clock-names = "ipg", "per";
249
+					dmas = <&sdma 7 7 1>, <&sdma 8 7 2>;
250
+					dma-names = "rx", "tx";
254251 					status = "disabled";
255252 				};
256253 
257
-				ecspi4: ecspi@2014000 {
254
+				ecspi4: spi@2014000 {
258255 					#address-cells = <1>;
259256 					#size-cells = <0>;
260257 					compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
....@@ -263,6 +260,8 @@
263260 					clocks = <&clks IMX6UL_CLK_ECSPI4>,
264261 						 <&clks IMX6UL_CLK_ECSPI4>;
265262 					clock-names = "ipg", "per";
263
+					dmas = <&sdma 9 7 1>, <&sdma 10 7 2>;
264
+					dma-names = "rx", "tx";
266265 					status = "disabled";
267266 				};
268267 
....@@ -343,6 +342,31 @@
343342 					dma-names = "rx", "tx";
344343 					status = "disabled";
345344 				};
345
+
346
+				asrc: asrc@2034000 {
347
+					compatible = "fsl,imx6ul-asrc", "fsl,imx53-asrc";
348
+					reg = <0x2034000 0x4000>;
349
+					interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
350
+					clocks = <&clks IMX6UL_CLK_ASRC_IPG>,
351
+						<&clks IMX6UL_CLK_ASRC_MEM>, <&clks 0>,
352
+						<&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
353
+						<&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
354
+						<&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
355
+						<&clks IMX6UL_CLK_SPDIF>, <&clks 0>, <&clks 0>,
356
+						<&clks IMX6UL_CLK_SPBA>;
357
+					clock-names = "mem", "ipg", "asrck_0",
358
+						"asrck_1", "asrck_2", "asrck_3", "asrck_4",
359
+						"asrck_5", "asrck_6", "asrck_7", "asrck_8",
360
+						"asrck_9", "asrck_a", "asrck_b", "asrck_c",
361
+						"asrck_d", "asrck_e", "asrck_f", "spba";
362
+					dmas = <&sdma 17 23 1>, <&sdma 18 23 1>, <&sdma 19 23 1>,
363
+						<&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>;
364
+					dma-names = "rxa", "rxb", "rxc",
365
+						    "txa", "txb", "txc";
366
+					fsl,asrc-rate  = <48000>;
367
+					fsl,asrc-width = <16>;
368
+					status = "okay";
369
+				};
346370 			};
347371 
348372 			tsc: tsc@2040000 {
....@@ -363,7 +387,7 @@
363387 				clocks = <&clks IMX6UL_CLK_PWM1>,
364388 					 <&clks IMX6UL_CLK_PWM1>;
365389 				clock-names = "ipg", "per";
366
-				#pwm-cells = <2>;
390
+				#pwm-cells = <3>;
367391 				status = "disabled";
368392 			};
369393 
....@@ -374,7 +398,7 @@
374398 				clocks = <&clks IMX6UL_CLK_PWM2>,
375399 					 <&clks IMX6UL_CLK_PWM2>;
376400 				clock-names = "ipg", "per";
377
-				#pwm-cells = <2>;
401
+				#pwm-cells = <3>;
378402 				status = "disabled";
379403 			};
380404 
....@@ -385,7 +409,7 @@
385409 				clocks = <&clks IMX6UL_CLK_PWM3>,
386410 					 <&clks IMX6UL_CLK_PWM3>;
387411 				clock-names = "ipg", "per";
388
-				#pwm-cells = <2>;
412
+				#pwm-cells = <3>;
389413 				status = "disabled";
390414 			};
391415 
....@@ -396,7 +420,7 @@
396420 				clocks = <&clks IMX6UL_CLK_PWM4>,
397421 					 <&clks IMX6UL_CLK_PWM4>;
398422 				clock-names = "ipg", "per";
399
-				#pwm-cells = <2>;
423
+				#pwm-cells = <3>;
400424 				status = "disabled";
401425 			};
402426 
....@@ -407,6 +431,7 @@
407431 				clocks = <&clks IMX6UL_CLK_CAN1_IPG>,
408432 					 <&clks IMX6UL_CLK_CAN1_SERIAL>;
409433 				clock-names = "ipg", "per";
434
+				fsl,stop-mode = <&gpr 0x10 1 0x10 17>;
410435 				status = "disabled";
411436 			};
412437 
....@@ -417,10 +442,11 @@
417442 				clocks = <&clks IMX6UL_CLK_CAN2_IPG>,
418443 					 <&clks IMX6UL_CLK_CAN2_SERIAL>;
419444 				clock-names = "ipg", "per";
445
+				fsl,stop-mode = <&gpr 0x10 2 0x10 18>;
420446 				status = "disabled";
421447 			};
422448 
423
-			gpt1: gpt@2098000 {
449
+			gpt1: timer@2098000 {
424450 				compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt";
425451 				reg = <0x02098000 0x4000>;
426452 				interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
....@@ -508,27 +534,28 @@
508534 					 <&clks IMX6UL_CLK_ENET2_REF_125M>;
509535 				clock-names = "ipg", "ahb", "ptp",
510536 					      "enet_clk_ref", "enet_out";
511
-				fsl,num-tx-queues=<1>;
512
-				fsl,num-rx-queues=<1>;
537
+				fsl,num-tx-queues = <1>;
538
+				fsl,num-rx-queues = <1>;
539
+				fsl,stop-mode = <&gpr 0x10 4>;
513540 				status = "disabled";
514541 			};
515542 
516
-			kpp: kpp@20b8000 {
517
-				compatible = "fsl,imx6ul-kpp", "fsl,imx6q-kpp", "fsl,imx21-kpp";
543
+			kpp: keypad@20b8000 {
544
+				compatible = "fsl,imx6ul-kpp", "fsl,imx21-kpp";
518545 				reg = <0x020b8000 0x4000>;
519546 				interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
520547 				clocks = <&clks IMX6UL_CLK_KPP>;
521548 				status = "disabled";
522549 			};
523550 
524
-			wdog1: wdog@20bc000 {
551
+			wdog1: watchdog@20bc000 {
525552 				compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
526553 				reg = <0x020bc000 0x4000>;
527554 				interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
528555 				clocks = <&clks IMX6UL_CLK_WDOG1>;
529556 			};
530557 
531
-			wdog2: wdog@20c0000 {
558
+			wdog2: watchdog@20c0000 {
532559 				compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
533560 				reg = <0x020c0000 0x4000>;
534561 				interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
....@@ -536,7 +563,7 @@
536563 				status = "disabled";
537564 			};
538565 
539
-			clks: ccm@20c4000 {
566
+			clks: clock-controller@20c4000 {
540567 				compatible = "fsl,imx6ul-ccm";
541568 				reg = <0x020c4000 0x4000>;
542569 				interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
....@@ -548,7 +575,7 @@
548575 
549576 			anatop: anatop@20c8000 {
550577 				compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop",
551
-					     "syscon", "simple-bus";
578
+					     "syscon", "simple-mfd";
552579 				reg = <0x020c8000 0x1000>;
553580 				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
554581 					     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
....@@ -601,6 +628,16 @@
601628 					anatop-min-voltage = <725000>;
602629 					anatop-max-voltage = <1450000>;
603630 				};
631
+
632
+				tempmon: tempmon {
633
+					compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon";
634
+					interrupt-parent = <&gpc>;
635
+					interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
636
+					fsl,tempmon = <&anatop>;
637
+					nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
638
+					nvmem-cell-names = "calib", "temp_grade";
639
+					clocks = <&clks IMX6UL_CLK_PLL3_USB_OTG>;
640
+				};
604641 			};
605642 
606643 			usbphy1: usbphy@20c9000 {
....@@ -648,6 +685,7 @@
648685 					interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
649686 					linux,keycode = <KEY_POWER>;
650687 					wakeup-source;
688
+					status = "disabled";
651689 				};
652690 
653691 				snvs_lpgpr: snvs-lpgpr {
....@@ -665,7 +703,7 @@
665703 				interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
666704 			};
667705 
668
-			src: src@20d8000 {
706
+			src: reset-controller@20d8000 {
669707 				compatible = "fsl,imx6ul-src", "fsl,imx51-src";
670708 				reg = <0x020d8000 0x4000>;
671709 				interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
....@@ -682,7 +720,7 @@
682720 				interrupt-parent = <&intc>;
683721 			};
684722 
685
-			iomuxc: iomuxc@20e0000 {
723
+			iomuxc: pinctrl@20e0000 {
686724 				compatible = "fsl,imx6ul-iomuxc";
687725 				reg = <0x020e0000 0x4000>;
688726 			};
....@@ -693,13 +731,14 @@
693731 				reg = <0x020e4000 0x4000>;
694732 			};
695733 
696
-			gpt2: gpt@20e8000 {
734
+			gpt2: timer@20e8000 {
697735 				compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt";
698736 				reg = <0x020e8000 0x4000>;
699737 				interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
700738 				clocks = <&clks IMX6UL_CLK_GPT2_BUS>,
701739 					 <&clks IMX6UL_CLK_GPT2_SERIAL>;
702740 				clock-names = "ipg", "per";
741
+				status = "disabled";
703742 			};
704743 
705744 			sdma: sdma@20ec000 {
....@@ -721,7 +760,7 @@
721760 				clocks = <&clks IMX6UL_CLK_PWM5>,
722761 					 <&clks IMX6UL_CLK_PWM5>;
723762 				clock-names = "ipg", "per";
724
-				#pwm-cells = <2>;
763
+				#pwm-cells = <3>;
725764 				status = "disabled";
726765 			};
727766 
....@@ -732,7 +771,7 @@
732771 				clocks = <&clks IMX6UL_CLK_PWM6>,
733772 					 <&clks IMX6UL_CLK_PWM6>;
734773 				clock-names = "ipg", "per";
735
-				#pwm-cells = <2>;
774
+				#pwm-cells = <3>;
736775 				status = "disabled";
737776 			};
738777 
....@@ -743,7 +782,7 @@
743782 				clocks = <&clks IMX6UL_CLK_PWM7>,
744783 					 <&clks IMX6UL_CLK_PWM7>;
745784 				clock-names = "ipg", "per";
746
-				#pwm-cells = <2>;
785
+				#pwm-cells = <3>;
747786 				status = "disabled";
748787 			};
749788 
....@@ -754,19 +793,19 @@
754793 				clocks = <&clks IMX6UL_CLK_PWM8>,
755794 					 <&clks IMX6UL_CLK_PWM8>;
756795 				clock-names = "ipg", "per";
757
-				#pwm-cells = <2>;
796
+				#pwm-cells = <3>;
758797 				status = "disabled";
759798 			};
760799 		};
761800 
762
-		aips2: aips-bus@2100000 {
801
+		aips2: bus@2100000 {
763802 			compatible = "fsl,aips-bus", "simple-bus";
764803 			#address-cells = <1>;
765804 			#size-cells = <1>;
766805 			reg = <0x02100000 0x100000>;
767806 			ranges;
768807 
769
-			crypto: caam@2140000 {
808
+			crypto: crypto@2140000 {
770809 				compatible = "fsl,imx6ul-caam", "fsl,sec-v4.0";
771810 				#address-cells = <1>;
772811 				#size-cells = <1>;
....@@ -777,19 +816,19 @@
777816 					 <&clks IMX6UL_CLK_CAAM_MEM>;
778817 				clock-names = "ipg", "aclk", "mem";
779818 
780
-				sec_jr0: jr0@1000 {
819
+				sec_jr0: jr@1000 {
781820 					compatible = "fsl,sec-v4.0-job-ring";
782821 					reg = <0x1000 0x1000>;
783822 					interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
784823 				};
785824 
786
-				sec_jr1: jr1@2000 {
825
+				sec_jr1: jr@2000 {
787826 					compatible = "fsl,sec-v4.0-job-ring";
788827 					reg = <0x2000 0x1000>;
789828 					interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
790829 				};
791830 
792
-				sec_jr2: jr2@3000 {
831
+				sec_jr2: jr@3000 {
793832 					compatible = "fsl,sec-v4.0-job-ring";
794833 					reg = <0x3000 0x1000>;
795834 					interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
....@@ -842,12 +881,13 @@
842881 					 <&clks IMX6UL_CLK_ENET_REF>;
843882 				clock-names = "ipg", "ahb", "ptp",
844883 					      "enet_clk_ref", "enet_out";
845
-				fsl,num-tx-queues=<1>;
846
-				fsl,num-rx-queues=<1>;
884
+				fsl,num-tx-queues = <1>;
885
+				fsl,num-rx-queues = <1>;
886
+				fsl,stop-mode = <&gpr 0x10 3>;
847887 				status = "disabled";
848888 			};
849889 
850
-			usdhc1: usdhc@2190000 {
890
+			usdhc1: mmc@2190000 {
851891 				compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
852892 				reg = <0x02190000 0x4000>;
853893 				interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
....@@ -855,11 +895,13 @@
855895 					 <&clks IMX6UL_CLK_USDHC1>,
856896 					 <&clks IMX6UL_CLK_USDHC1>;
857897 				clock-names = "ipg", "ahb", "per";
898
+				fsl,tuning-step = <2>;
899
+				fsl,tuning-start-tap = <20>;
858900 				bus-width = <4>;
859901 				status = "disabled";
860902 			};
861903 
862
-			usdhc2: usdhc@2194000 {
904
+			usdhc2: mmc@2194000 {
863905 				compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
864906 				reg = <0x02194000 0x4000>;
865907 				interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
....@@ -868,6 +910,8 @@
868910 					 <&clks IMX6UL_CLK_USDHC2>;
869911 				clock-names = "ipg", "ahb", "per";
870912 				bus-width = <4>;
913
+				fsl,tuning-step = <2>;
914
+				fsl,tuning-start-tap = <20>;
871915 				status = "disabled";
872916 			};
873917 
....@@ -913,12 +957,24 @@
913957 				status = "disabled";
914958 			};
915959 
916
-			mmdc: mmdc@21b0000 {
960
+			memory-controller@21b0000 {
917961 				compatible = "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc";
918962 				reg = <0x021b0000 0x4000>;
963
+				clocks = <&clks IMX6UL_CLK_MMDC_P0_IPG>;
919964 			};
920965 
921
-			ocotp: ocotp-ctrl@21bc000 {
966
+			weim: weim@21b8000 {
967
+				#address-cells = <2>;
968
+				#size-cells = <1>;
969
+				compatible = "fsl,imx6ul-weim", "fsl,imx6q-weim";
970
+				reg = <0x021b8000 0x4000>;
971
+				interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
972
+				clocks = <&clks IMX6UL_CLK_EIM>;
973
+				fsl,weim-cs-gpr = <&gpr>;
974
+				status = "disabled";
975
+			};
976
+
977
+			ocotp: efuse@21bc000 {
922978 				#address-cells = <1>;
923979 				#size-cells = <1>;
924980 				compatible = "fsl,imx6ul-ocotp", "syscon";
....@@ -938,8 +994,17 @@
938994 				};
939995 			};
940996 
997
+			csi: csi@21c4000 {
998
+				compatible = "fsl,imx6ul-csi";
999
+				reg = <0x021c4000 0x4000>;
1000
+				interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
1001
+				clocks = <&clks IMX6UL_CLK_CSI>;
1002
+				clock-names = "mclk";
1003
+				status = "disabled";
1004
+			};
1005
+
9411006 			lcdif: lcdif@21c8000 {
942
-				compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif";
1007
+				compatible = "fsl,imx6ul-lcdif", "fsl,imx6sx-lcdif";
9431008 				reg = <0x021c8000 0x4000>;
9441009 				interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
9451010 				clocks = <&clks IMX6UL_CLK_LCDIF_PIX>,
....@@ -949,10 +1014,18 @@
9491014 				status = "disabled";
9501015 			};
9511016 
952
-			qspi: qspi@21e0000 {
1017
+			pxp: pxp@21cc000 {
1018
+				compatible = "fsl,imx6ul-pxp";
1019
+				reg = <0x021cc000 0x4000>;
1020
+				interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
1021
+				clocks = <&clks IMX6UL_CLK_PXP>;
1022
+				clock-names = "axi";
1023
+			};
1024
+
1025
+			qspi: spi@21e0000 {
9531026 				#address-cells = <1>;
9541027 				#size-cells = <0>;
955
-				compatible = "fsl,imx6ul-qspi", "fsl,imx6sx-qspi";
1028
+				compatible = "fsl,imx6ul-qspi";
9561029 				reg = <0x021e0000 0x4000>, <0x60000000 0x10000000>;
9571030 				reg-names = "QuadSPI", "QuadSPI-memory";
9581031 				interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
....@@ -962,7 +1035,7 @@
9621035 				status = "disabled";
9631036 			};
9641037 
965
-			wdog3: wdog@21e4000 {
1038
+			wdog3: watchdog@21e4000 {
9661039 				compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
9671040 				reg = <0x021e4000 0x4000>;
9681041 				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;