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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * skl-sst.c - HDA DSP library functions for SKL platform |
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3 | 4 | * |
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.. | .. |
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5 | 6 | * Author:Rafal Redzimski <rafal.f.redzimski@intel.com> |
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6 | 7 | * Jeeja KP <jeeja.kp@intel.com> |
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7 | 8 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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8 | | - * |
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9 | | - * This program is free software; you can redistribute it and/or modify |
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10 | | - * it under the terms of the GNU General Public License as version 2, as |
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11 | | - * published by the Free Software Foundation. |
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12 | | - * |
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13 | | - * This program is distributed in the hope that it will be useful, but |
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14 | | - * WITHOUT ANY WARRANTY; without even the implied warranty of |
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15 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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16 | | - * General Public License for more details. |
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17 | 9 | */ |
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18 | 10 | |
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19 | 11 | #include <linux/module.h> |
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.. | .. |
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24 | 16 | #include "../common/sst-dsp.h" |
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25 | 17 | #include "../common/sst-dsp-priv.h" |
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26 | 18 | #include "../common/sst-ipc.h" |
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27 | | -#include "skl-sst-ipc.h" |
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| 19 | +#include "skl.h" |
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28 | 20 | |
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29 | 21 | #define SKL_BASEFW_TIMEOUT 300 |
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30 | 22 | #define SKL_INIT_TIMEOUT 1000 |
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.. | .. |
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74 | 66 | static int skl_load_base_firmware(struct sst_dsp *ctx) |
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75 | 67 | { |
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76 | 68 | int ret = 0, i; |
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77 | | - struct skl_sst *skl = ctx->thread_context; |
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| 69 | + struct skl_dev *skl = ctx->thread_context; |
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78 | 70 | struct firmware stripped_fw; |
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79 | 71 | u32 reg; |
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80 | 72 | |
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.. | .. |
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169 | 161 | { |
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170 | 162 | int ret; |
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171 | 163 | struct skl_ipc_dxstate_info dx; |
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172 | | - struct skl_sst *skl = ctx->thread_context; |
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| 164 | + struct skl_dev *skl = ctx->thread_context; |
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173 | 165 | unsigned int core_mask = SKL_DSP_CORE_MASK(core_id); |
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174 | 166 | |
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175 | 167 | /* If core0 is being turned on, we need to load the FW */ |
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.. | .. |
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223 | 215 | { |
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224 | 216 | int ret; |
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225 | 217 | struct skl_ipc_dxstate_info dx; |
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226 | | - struct skl_sst *skl = ctx->thread_context; |
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| 218 | + struct skl_dev *skl = ctx->thread_context; |
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227 | 219 | unsigned int core_mask = SKL_DSP_CORE_MASK(core_id); |
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228 | 220 | |
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229 | 221 | dx.core_mask = core_mask; |
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.. | .. |
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340 | 332 | u32 size, u16 mod_id, u8 table_id, bool is_module) |
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341 | 333 | { |
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342 | 334 | int ret, bytes_left, curr_pos; |
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343 | | - struct skl_sst *skl = ctx->thread_context; |
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| 335 | + struct skl_dev *skl = ctx->thread_context; |
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344 | 336 | skl->mod_load_complete = false; |
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345 | 337 | |
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346 | 338 | bytes_left = ctx->cl_dev.ops.cl_copy_to_dmabuf(ctx, data, size, false); |
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.. | .. |
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362 | 354 | /* |
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363 | 355 | * if bytes_left > 0 then wait for BDL complete interrupt and |
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364 | 356 | * copy the next chunk till bytes_left is 0. if bytes_left is |
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365 | | - * is zero, then wait for load module IPC reply |
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| 357 | + * zero, then wait for load module IPC reply |
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366 | 358 | */ |
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367 | 359 | while (bytes_left > 0) { |
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368 | 360 | curr_pos = size - bytes_left; |
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.. | .. |
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392 | 384 | static int |
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393 | 385 | skl_load_library(struct sst_dsp *ctx, struct skl_lib_info *linfo, int lib_count) |
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394 | 386 | { |
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395 | | - struct skl_sst *skl = ctx->thread_context; |
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| 387 | + struct skl_dev *skl = ctx->thread_context; |
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396 | 388 | struct firmware stripped_fw; |
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397 | 389 | int ret, i; |
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398 | 390 | |
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.. | .. |
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420 | 412 | struct skl_module_table *module_entry = NULL; |
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421 | 413 | int ret = 0; |
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422 | 414 | char mod_name[64]; /* guid str = 32 chars + 4 hyphens */ |
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423 | | - uuid_le *uuid_mod; |
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424 | 415 | |
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425 | | - uuid_mod = (uuid_le *)guid; |
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426 | | - snprintf(mod_name, sizeof(mod_name), "%s%pUL%s", |
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427 | | - "intel/dsp_fw_", uuid_mod, ".bin"); |
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| 416 | + snprintf(mod_name, sizeof(mod_name), "intel/dsp_fw_%pUL.bin", guid); |
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428 | 417 | |
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429 | 418 | module_entry = skl_module_get_from_id(ctx, mod_id); |
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430 | 419 | if (module_entry == NULL) { |
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.. | .. |
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453 | 442 | static int skl_unload_module(struct sst_dsp *ctx, u16 mod_id) |
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454 | 443 | { |
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455 | 444 | int usage_cnt; |
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456 | | - struct skl_sst *skl = ctx->thread_context; |
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| 445 | + struct skl_dev *skl = ctx->thread_context; |
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457 | 446 | int ret = 0; |
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458 | 447 | |
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459 | 448 | usage_cnt = skl_put_module(ctx, mod_id); |
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.. | .. |
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517 | 506 | .irq_handler = skl_dsp_sst_interrupt, |
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518 | 507 | .write = sst_shim32_write, |
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519 | 508 | .read = sst_shim32_read, |
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520 | | - .ram_read = sst_memcpy_fromio_32, |
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521 | | - .ram_write = sst_memcpy_toio_32, |
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522 | 509 | .free = skl_dsp_free, |
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523 | 510 | }; |
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524 | 511 | |
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.. | .. |
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528 | 515 | }; |
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529 | 516 | |
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530 | 517 | int skl_sst_dsp_init(struct device *dev, void __iomem *mmio_base, int irq, |
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531 | | - const char *fw_name, struct skl_dsp_loader_ops dsp_ops, struct skl_sst **dsp) |
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| 518 | + const char *fw_name, struct skl_dsp_loader_ops dsp_ops, |
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| 519 | + struct skl_dev **dsp) |
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532 | 520 | { |
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533 | | - struct skl_sst *skl; |
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| 521 | + struct skl_dev *skl; |
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534 | 522 | struct sst_dsp *sst; |
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535 | 523 | int ret; |
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536 | 524 | |
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.. | .. |
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564 | 552 | } |
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565 | 553 | EXPORT_SYMBOL_GPL(skl_sst_dsp_init); |
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566 | 554 | |
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567 | | -int skl_sst_init_fw(struct device *dev, struct skl_sst *ctx) |
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| 555 | +int skl_sst_init_fw(struct device *dev, struct skl_dev *skl) |
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568 | 556 | { |
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569 | 557 | int ret; |
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570 | | - struct sst_dsp *sst = ctx->dsp; |
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| 558 | + struct sst_dsp *sst = skl->dsp; |
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571 | 559 | |
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572 | 560 | ret = sst->fw_ops.load_fw(sst); |
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573 | 561 | if (ret < 0) { |
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.. | .. |
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577 | 565 | |
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578 | 566 | skl_dsp_init_core_state(sst); |
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579 | 567 | |
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580 | | - if (ctx->lib_count > 1) { |
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581 | | - ret = sst->fw_ops.load_library(sst, ctx->lib_info, |
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582 | | - ctx->lib_count); |
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| 568 | + if (skl->lib_count > 1) { |
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| 569 | + ret = sst->fw_ops.load_library(sst, skl->lib_info, |
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| 570 | + skl->lib_count); |
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583 | 571 | if (ret < 0) { |
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584 | 572 | dev_err(dev, "Load Library failed : %x\n", ret); |
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585 | 573 | return ret; |
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586 | 574 | } |
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587 | 575 | } |
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588 | | - ctx->is_first_boot = false; |
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| 576 | + skl->is_first_boot = false; |
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589 | 577 | |
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590 | 578 | return 0; |
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591 | 579 | } |
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592 | 580 | EXPORT_SYMBOL_GPL(skl_sst_init_fw); |
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593 | 581 | |
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594 | | -void skl_sst_dsp_cleanup(struct device *dev, struct skl_sst *ctx) |
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| 582 | +void skl_sst_dsp_cleanup(struct device *dev, struct skl_dev *skl) |
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595 | 583 | { |
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596 | 584 | |
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597 | | - if (ctx->dsp->fw) |
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598 | | - release_firmware(ctx->dsp->fw); |
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599 | | - skl_clear_module_table(ctx->dsp); |
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600 | | - skl_freeup_uuid_list(ctx); |
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601 | | - skl_ipc_free(&ctx->ipc); |
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602 | | - ctx->dsp->ops->free(ctx->dsp); |
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603 | | - if (ctx->boot_complete) { |
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604 | | - ctx->dsp->cl_dev.ops.cl_cleanup_controller(ctx->dsp); |
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605 | | - skl_cldma_int_disable(ctx->dsp); |
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| 585 | + if (skl->dsp->fw) |
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| 586 | + release_firmware(skl->dsp->fw); |
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| 587 | + skl_clear_module_table(skl->dsp); |
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| 588 | + skl_freeup_uuid_list(skl); |
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| 589 | + skl_ipc_free(&skl->ipc); |
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| 590 | + skl->dsp->ops->free(skl->dsp); |
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| 591 | + if (skl->boot_complete) { |
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| 592 | + skl->dsp->cl_dev.ops.cl_cleanup_controller(skl->dsp); |
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| 593 | + skl_cldma_int_disable(skl->dsp); |
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606 | 594 | } |
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607 | 595 | } |
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608 | 596 | EXPORT_SYMBOL_GPL(skl_sst_dsp_cleanup); |
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