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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * bxt-sst.c - DSP library functions for BXT platform |
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3 | 4 | * |
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4 | 5 | * Copyright (C) 2015-16 Intel Corp |
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5 | 6 | * Author:Rafal Redzimski <rafal.f.redzimski@intel.com> |
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6 | 7 | * Jeeja KP <jeeja.kp@intel.com> |
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7 | | - * |
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8 | | - * This program is free software; you can redistribute it and/or modify |
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9 | | - * it under the terms of the GNU General Public License as published by |
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10 | | - * the Free Software Foundation; version 2 of the License. |
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11 | | - * |
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12 | | - * This program is distributed in the hope that it will be useful, but |
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13 | | - * WITHOUT ANY WARRANTY; without even the implied warranty of |
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14 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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15 | | - * General Public License for more details. |
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16 | 8 | */ |
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17 | 9 | |
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18 | 10 | #include <linux/module.h> |
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.. | .. |
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22 | 14 | |
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23 | 15 | #include "../common/sst-dsp.h" |
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24 | 16 | #include "../common/sst-dsp-priv.h" |
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25 | | -#include "skl-sst-ipc.h" |
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| 17 | +#include "skl.h" |
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26 | 18 | |
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27 | 19 | #define BXT_BASEFW_TIMEOUT 3000 |
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28 | | -#define BXT_INIT_TIMEOUT 300 |
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29 | 20 | #define BXT_ROM_INIT_TIMEOUT 70 |
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30 | 21 | #define BXT_IPC_PURGE_FW 0x01004000 |
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31 | 22 | |
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.. | .. |
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46 | 37 | /* Delay before scheduling D0i3 entry */ |
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47 | 38 | #define BXT_D0I3_DELAY 5000 |
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48 | 39 | |
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49 | | -#define BXT_FW_ROM_INIT_RETRY 3 |
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50 | | - |
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51 | 40 | static unsigned int bxt_get_errorcode(struct sst_dsp *ctx) |
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52 | 41 | { |
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53 | 42 | return sst_dsp_shim_read(ctx, BXT_ADSP_ERROR_CODE); |
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.. | .. |
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57 | 46 | bxt_load_library(struct sst_dsp *ctx, struct skl_lib_info *linfo, int lib_count) |
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58 | 47 | { |
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59 | 48 | struct snd_dma_buffer dmab; |
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60 | | - struct skl_sst *skl = ctx->thread_context; |
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| 49 | + struct skl_dev *skl = ctx->thread_context; |
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61 | 50 | struct firmware stripped_fw; |
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62 | 51 | int ret = 0, i, dma_id, stream_tag; |
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63 | 52 | |
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.. | .. |
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192 | 181 | static int bxt_load_base_firmware(struct sst_dsp *ctx) |
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193 | 182 | { |
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194 | 183 | struct firmware stripped_fw; |
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195 | | - struct skl_sst *skl = ctx->thread_context; |
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| 184 | + struct skl_dev *skl = ctx->thread_context; |
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196 | 185 | int ret, i; |
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197 | 186 | |
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198 | 187 | if (ctx->fw == NULL) { |
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.. | .. |
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276 | 265 | */ |
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277 | 266 | static int bxt_d0i3_target_state(struct sst_dsp *ctx) |
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278 | 267 | { |
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279 | | - struct skl_sst *skl = ctx->thread_context; |
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| 268 | + struct skl_dev *skl = ctx->thread_context; |
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280 | 269 | struct skl_d0i3_data *d0i3 = &skl->d0i3; |
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281 | 270 | |
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282 | 271 | if (skl->cores.state[SKL_DSP_CORE0_ID] != SKL_DSP_RUNNING) |
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.. | .. |
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296 | 285 | { |
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297 | 286 | int ret; |
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298 | 287 | struct skl_ipc_d0ix_msg msg; |
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299 | | - struct skl_sst *skl = container_of(work, |
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300 | | - struct skl_sst, d0i3.work.work); |
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| 288 | + struct skl_dev *skl = container_of(work, |
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| 289 | + struct skl_dev, d0i3.work.work); |
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301 | 290 | struct sst_dsp *ctx = skl->dsp; |
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302 | 291 | struct skl_d0i3_data *d0i3 = &skl->d0i3; |
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303 | 292 | int target_state; |
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.. | .. |
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339 | 328 | |
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340 | 329 | static int bxt_schedule_dsp_D0i3(struct sst_dsp *ctx) |
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341 | 330 | { |
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342 | | - struct skl_sst *skl = ctx->thread_context; |
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| 331 | + struct skl_dev *skl = ctx->thread_context; |
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343 | 332 | struct skl_d0i3_data *d0i3 = &skl->d0i3; |
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344 | 333 | |
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345 | 334 | /* Schedule D0i3 only if the usecase ref counts are appropriate */ |
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.. | .. |
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358 | 347 | { |
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359 | 348 | int ret; |
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360 | 349 | struct skl_ipc_d0ix_msg msg; |
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361 | | - struct skl_sst *skl = ctx->thread_context; |
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| 350 | + struct skl_dev *skl = ctx->thread_context; |
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362 | 351 | |
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363 | 352 | dev_dbg(ctx->dev, "In %s:\n", __func__); |
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364 | 353 | |
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.. | .. |
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397 | 386 | |
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398 | 387 | static int bxt_set_dsp_D0(struct sst_dsp *ctx, unsigned int core_id) |
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399 | 388 | { |
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400 | | - struct skl_sst *skl = ctx->thread_context; |
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| 389 | + struct skl_dev *skl = ctx->thread_context; |
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401 | 390 | int ret; |
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402 | 391 | struct skl_ipc_dxstate_info dx; |
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403 | 392 | unsigned int core_mask = SKL_DSP_CORE_MASK(core_id); |
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.. | .. |
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494 | 483 | { |
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495 | 484 | int ret; |
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496 | 485 | struct skl_ipc_dxstate_info dx; |
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497 | | - struct skl_sst *skl = ctx->thread_context; |
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| 486 | + struct skl_dev *skl = ctx->thread_context; |
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498 | 487 | unsigned int core_mask = SKL_DSP_CORE_MASK(core_id); |
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499 | 488 | |
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500 | 489 | dx.core_mask = core_mask; |
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.. | .. |
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544 | 533 | .irq_handler = skl_dsp_sst_interrupt, |
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545 | 534 | .write = sst_shim32_write, |
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546 | 535 | .read = sst_shim32_read, |
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547 | | - .ram_read = sst_memcpy_fromio_32, |
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548 | | - .ram_write = sst_memcpy_toio_32, |
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549 | 536 | .free = skl_dsp_free, |
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550 | 537 | }; |
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551 | 538 | |
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.. | .. |
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556 | 543 | |
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557 | 544 | int bxt_sst_dsp_init(struct device *dev, void __iomem *mmio_base, int irq, |
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558 | 545 | const char *fw_name, struct skl_dsp_loader_ops dsp_ops, |
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559 | | - struct skl_sst **dsp) |
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| 546 | + struct skl_dev **dsp) |
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560 | 547 | { |
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561 | | - struct skl_sst *skl; |
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| 548 | + struct skl_dev *skl; |
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562 | 549 | struct sst_dsp *sst; |
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563 | 550 | int ret; |
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564 | 551 | |
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.. | .. |
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599 | 586 | } |
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600 | 587 | EXPORT_SYMBOL_GPL(bxt_sst_dsp_init); |
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601 | 588 | |
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602 | | -int bxt_sst_init_fw(struct device *dev, struct skl_sst *ctx) |
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| 589 | +int bxt_sst_init_fw(struct device *dev, struct skl_dev *skl) |
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603 | 590 | { |
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604 | 591 | int ret; |
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605 | | - struct sst_dsp *sst = ctx->dsp; |
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| 592 | + struct sst_dsp *sst = skl->dsp; |
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606 | 593 | |
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607 | 594 | ret = sst->fw_ops.load_fw(sst); |
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608 | 595 | if (ret < 0) { |
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.. | .. |
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612 | 599 | |
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613 | 600 | skl_dsp_init_core_state(sst); |
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614 | 601 | |
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615 | | - if (ctx->lib_count > 1) { |
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616 | | - ret = sst->fw_ops.load_library(sst, ctx->lib_info, |
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617 | | - ctx->lib_count); |
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| 602 | + if (skl->lib_count > 1) { |
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| 603 | + ret = sst->fw_ops.load_library(sst, skl->lib_info, |
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| 604 | + skl->lib_count); |
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618 | 605 | if (ret < 0) { |
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619 | 606 | dev_err(dev, "Load Library failed : %x\n", ret); |
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620 | 607 | return ret; |
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621 | 608 | } |
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622 | 609 | } |
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623 | | - ctx->is_first_boot = false; |
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| 610 | + skl->is_first_boot = false; |
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624 | 611 | |
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625 | 612 | return 0; |
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626 | 613 | } |
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627 | 614 | EXPORT_SYMBOL_GPL(bxt_sst_init_fw); |
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628 | 615 | |
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629 | | -void bxt_sst_dsp_cleanup(struct device *dev, struct skl_sst *ctx) |
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| 616 | +void bxt_sst_dsp_cleanup(struct device *dev, struct skl_dev *skl) |
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630 | 617 | { |
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631 | 618 | |
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632 | | - skl_release_library(ctx->lib_info, ctx->lib_count); |
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633 | | - if (ctx->dsp->fw) |
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634 | | - release_firmware(ctx->dsp->fw); |
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635 | | - skl_freeup_uuid_list(ctx); |
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636 | | - skl_ipc_free(&ctx->ipc); |
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637 | | - ctx->dsp->ops->free(ctx->dsp); |
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| 619 | + skl_release_library(skl->lib_info, skl->lib_count); |
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| 620 | + if (skl->dsp->fw) |
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| 621 | + release_firmware(skl->dsp->fw); |
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| 622 | + skl_freeup_uuid_list(skl); |
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| 623 | + skl_ipc_free(&skl->ipc); |
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| 624 | + skl->dsp->ops->free(skl->dsp); |
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638 | 625 | } |
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639 | 626 | EXPORT_SYMBOL_GPL(bxt_sst_dsp_cleanup); |
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640 | 627 | |
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