.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * cht-bsw-rt5645.c - ASoc Machine driver for Intel Cherryview-based platforms |
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3 | 4 | * Cherrytrail and Braswell, with RT5645 codec. |
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.. | .. |
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8 | 9 | * This file is modified from cht_bsw_rt5672.c |
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9 | 10 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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10 | 11 | * |
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11 | | - * This program is free software; you can redistribute it and/or modify |
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12 | | - * it under the terms of the GNU General Public License as published by |
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13 | | - * the Free Software Foundation; version 2 of the License. |
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14 | | - * |
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15 | | - * This program is distributed in the hope that it will be useful, but |
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16 | | - * WITHOUT ANY WARRANTY; without even the implied warranty of |
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17 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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18 | | - * General Public License for more details. |
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19 | | - * |
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20 | 12 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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21 | 13 | */ |
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22 | 14 | |
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.. | .. |
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26 | 18 | #include <linux/clk.h> |
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27 | 19 | #include <linux/dmi.h> |
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28 | 20 | #include <linux/slab.h> |
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29 | | -#include <asm/cpu_device_id.h> |
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30 | | -#include <asm/platform_sst_audio.h> |
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31 | 21 | #include <sound/pcm.h> |
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32 | 22 | #include <sound/pcm_params.h> |
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33 | 23 | #include <sound/soc.h> |
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.. | .. |
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35 | 25 | #include <sound/soc-acpi.h> |
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36 | 26 | #include "../../codecs/rt5645.h" |
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37 | 27 | #include "../atom/sst-atom-controls.h" |
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| 28 | +#include "../common/soc-intel-quirks.h" |
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38 | 29 | |
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39 | 30 | #define CHT_PLAT_CLK_3_HZ 19200000 |
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40 | 31 | #define CHT_CODEC_DAI1 "rt5645-aif1" |
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.. | .. |
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57 | 48 | #define CHT_RT5645_SSP2_AIF2 BIT(16) /* default is using AIF1 */ |
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58 | 49 | #define CHT_RT5645_SSP0_AIF1 BIT(17) |
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59 | 50 | #define CHT_RT5645_SSP0_AIF2 BIT(18) |
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| 51 | +#define CHT_RT5645_PMC_PLT_CLK_0 BIT(19) |
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60 | 52 | |
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61 | 53 | static unsigned long cht_rt5645_quirk = 0; |
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62 | 54 | |
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.. | .. |
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68 | 60 | dev_info(dev, "quirk SSP0_AIF1 enabled"); |
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69 | 61 | if (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF2) |
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70 | 62 | dev_info(dev, "quirk SSP0_AIF2 enabled"); |
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| 63 | + if (cht_rt5645_quirk & CHT_RT5645_PMC_PLT_CLK_0) |
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| 64 | + dev_info(dev, "quirk PMC_PLT_CLK_0 enabled"); |
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71 | 65 | } |
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72 | 66 | |
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73 | 67 | static int platform_clock_control(struct snd_soc_dapm_widget *w, |
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.. | .. |
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213 | 207 | static int cht_aif1_hw_params(struct snd_pcm_substream *substream, |
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214 | 208 | struct snd_pcm_hw_params *params) |
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215 | 209 | { |
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216 | | - struct snd_soc_pcm_runtime *rtd = substream->private_data; |
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217 | | - struct snd_soc_dai *codec_dai = rtd->codec_dai; |
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| 210 | + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); |
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| 211 | + struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0); |
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218 | 212 | int ret; |
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219 | 213 | |
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220 | 214 | /* set codec PLL source to the 19.2MHz platform clock (MCLK) */ |
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.. | .. |
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235 | 229 | return 0; |
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236 | 230 | } |
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237 | 231 | |
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238 | | -/* uncomment when we have a real quirk |
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239 | 232 | static int cht_rt5645_quirk_cb(const struct dmi_system_id *id) |
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240 | 233 | { |
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241 | 234 | cht_rt5645_quirk = (unsigned long)id->driver_data; |
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242 | 235 | return 1; |
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243 | 236 | } |
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244 | | -*/ |
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245 | 237 | |
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246 | 238 | static const struct dmi_system_id cht_rt5645_quirk_table[] = { |
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| 239 | + { |
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| 240 | + /* Strago family Chromebooks */ |
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| 241 | + .callback = cht_rt5645_quirk_cb, |
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| 242 | + .matches = { |
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| 243 | + DMI_MATCH(DMI_PRODUCT_FAMILY, "Intel_Strago"), |
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| 244 | + }, |
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| 245 | + .driver_data = (void *)CHT_RT5645_PMC_PLT_CLK_0, |
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| 246 | + }, |
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247 | 247 | { |
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248 | 248 | }, |
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249 | 249 | }; |
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.. | .. |
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252 | 252 | { |
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253 | 253 | struct snd_soc_card *card = runtime->card; |
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254 | 254 | struct cht_mc_private *ctx = snd_soc_card_get_drvdata(runtime->card); |
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255 | | - struct snd_soc_component *component = runtime->codec_dai->component; |
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| 255 | + struct snd_soc_component *component = asoc_rtd_to_codec(runtime, 0)->component; |
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256 | 256 | int jack_type; |
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257 | 257 | int ret; |
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258 | 258 | |
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.. | .. |
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359 | 359 | * with explicit setting to I2S 2ch 16-bit. The word length is set with |
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360 | 360 | * dai_set_tdm_slot() since there is no other API exposed |
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361 | 361 | */ |
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362 | | - ret = snd_soc_dai_set_fmt(rtd->cpu_dai, |
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| 362 | + ret = snd_soc_dai_set_fmt(asoc_rtd_to_cpu(rtd, 0), |
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363 | 363 | SND_SOC_DAIFMT_I2S | |
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364 | 364 | SND_SOC_DAIFMT_NB_NF | |
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365 | 365 | SND_SOC_DAIFMT_CBS_CFS |
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.. | .. |
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369 | 369 | return ret; |
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370 | 370 | } |
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371 | 371 | |
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372 | | - ret = snd_soc_dai_set_fmt(rtd->codec_dai, |
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| 372 | + ret = snd_soc_dai_set_fmt(asoc_rtd_to_codec(rtd, 0), |
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373 | 373 | SND_SOC_DAIFMT_I2S | |
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374 | 374 | SND_SOC_DAIFMT_NB_NF | |
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375 | 375 | SND_SOC_DAIFMT_CBS_CFS |
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.. | .. |
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379 | 379 | return ret; |
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380 | 380 | } |
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381 | 381 | |
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382 | | - ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2, 16); |
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| 382 | + ret = snd_soc_dai_set_tdm_slot(asoc_rtd_to_cpu(rtd, 0), 0x3, 0x3, 2, 16); |
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383 | 383 | if (ret < 0) { |
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384 | 384 | dev_err(rtd->dev, "can't set I2S config, err %d\n", ret); |
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385 | 385 | return ret; |
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.. | .. |
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393 | 393 | /* |
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394 | 394 | * Default mode for SSP configuration is TDM 4 slot |
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395 | 395 | */ |
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396 | | - ret = snd_soc_dai_set_fmt(rtd->codec_dai, |
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| 396 | + ret = snd_soc_dai_set_fmt(asoc_rtd_to_codec(rtd, 0), |
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397 | 397 | SND_SOC_DAIFMT_DSP_B | |
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398 | 398 | SND_SOC_DAIFMT_IB_NF | |
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399 | 399 | SND_SOC_DAIFMT_CBS_CFS); |
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.. | .. |
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403 | 403 | } |
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404 | 404 | |
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405 | 405 | /* TDM 4 slots 24 bit, set Rx & Tx bitmask to 4 active slots */ |
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406 | | - ret = snd_soc_dai_set_tdm_slot(rtd->codec_dai, 0xF, 0xF, 4, 24); |
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| 406 | + ret = snd_soc_dai_set_tdm_slot(asoc_rtd_to_codec(rtd, 0), 0xF, 0xF, 4, 24); |
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407 | 407 | if (ret < 0) { |
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408 | 408 | dev_err(rtd->dev, "can't set codec TDM slot %d\n", ret); |
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409 | 409 | return ret; |
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.. | .. |
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426 | 426 | .hw_params = cht_aif1_hw_params, |
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427 | 427 | }; |
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428 | 428 | |
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| 429 | +SND_SOC_DAILINK_DEF(dummy, |
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| 430 | + DAILINK_COMP_ARRAY(COMP_DUMMY())); |
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| 431 | + |
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| 432 | +SND_SOC_DAILINK_DEF(media, |
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| 433 | + DAILINK_COMP_ARRAY(COMP_CPU("media-cpu-dai"))); |
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| 434 | + |
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| 435 | +SND_SOC_DAILINK_DEF(deepbuffer, |
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| 436 | + DAILINK_COMP_ARRAY(COMP_CPU("deepbuffer-cpu-dai"))); |
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| 437 | + |
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| 438 | +SND_SOC_DAILINK_DEF(ssp2_port, |
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| 439 | + DAILINK_COMP_ARRAY(COMP_CPU("ssp2-port"))); |
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| 440 | +SND_SOC_DAILINK_DEF(ssp2_codec, |
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| 441 | + DAILINK_COMP_ARRAY(COMP_CODEC("i2c-10EC5645:00", "rt5645-aif1"))); |
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| 442 | + |
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| 443 | +SND_SOC_DAILINK_DEF(platform, |
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| 444 | + DAILINK_COMP_ARRAY(COMP_PLATFORM("sst-mfld-platform"))); |
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| 445 | + |
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429 | 446 | static struct snd_soc_dai_link cht_dailink[] = { |
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430 | 447 | [MERR_DPCM_AUDIO] = { |
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431 | 448 | .name = "Audio Port", |
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432 | 449 | .stream_name = "Audio", |
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433 | | - .cpu_dai_name = "media-cpu-dai", |
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434 | | - .codec_dai_name = "snd-soc-dummy-dai", |
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435 | | - .codec_name = "snd-soc-dummy", |
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436 | | - .platform_name = "sst-mfld-platform", |
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437 | 450 | .nonatomic = true, |
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438 | 451 | .dynamic = 1, |
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439 | 452 | .dpcm_playback = 1, |
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440 | 453 | .dpcm_capture = 1, |
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441 | 454 | .ops = &cht_aif1_ops, |
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| 455 | + SND_SOC_DAILINK_REG(media, dummy, platform), |
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442 | 456 | }, |
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443 | 457 | [MERR_DPCM_DEEP_BUFFER] = { |
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444 | 458 | .name = "Deep-Buffer Audio Port", |
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445 | 459 | .stream_name = "Deep-Buffer Audio", |
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446 | | - .cpu_dai_name = "deepbuffer-cpu-dai", |
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447 | | - .codec_dai_name = "snd-soc-dummy-dai", |
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448 | | - .codec_name = "snd-soc-dummy", |
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449 | | - .platform_name = "sst-mfld-platform", |
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450 | 460 | .nonatomic = true, |
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451 | 461 | .dynamic = 1, |
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452 | 462 | .dpcm_playback = 1, |
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453 | 463 | .ops = &cht_aif1_ops, |
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| 464 | + SND_SOC_DAILINK_REG(deepbuffer, dummy, platform), |
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454 | 465 | }, |
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455 | 466 | /* CODEC<->CODEC link */ |
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456 | 467 | /* back ends */ |
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457 | 468 | { |
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458 | 469 | .name = "SSP2-Codec", |
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459 | 470 | .id = 0, |
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460 | | - .cpu_dai_name = "ssp2-port", |
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461 | | - .platform_name = "sst-mfld-platform", |
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462 | 471 | .no_pcm = 1, |
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463 | | - .codec_dai_name = "rt5645-aif1", |
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464 | | - .codec_name = "i2c-10EC5645:00", |
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465 | 472 | .init = cht_codec_init, |
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466 | 473 | .be_hw_params_fixup = cht_codec_fixup, |
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467 | 474 | .nonatomic = true, |
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468 | 475 | .dpcm_playback = 1, |
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469 | 476 | .dpcm_capture = 1, |
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470 | 477 | .ops = &cht_be_ssp2_ops, |
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| 478 | + SND_SOC_DAILINK_REG(ssp2_port, ssp2_codec, platform), |
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471 | 479 | }, |
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472 | 480 | }; |
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473 | 481 | |
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| 482 | +#if IS_ENABLED(CONFIG_SND_SOC_SOF_BAYTRAIL) |
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| 483 | +/* use space before codec name to simplify card ID, and simplify driver name */ |
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| 484 | +#define CARD_RT5645_NAME "bytcht rt5645" /* card name 'sof-bytcht rt5645' */ |
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| 485 | +#define CARD_RT5650_NAME "bytcht rt5650" /* card name 'sof-bytcht rt5650' */ |
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| 486 | +#define DRIVER_NAME "SOF" |
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| 487 | +#else |
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| 488 | +#define CARD_RT5645_NAME "chtrt5645" |
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| 489 | +#define CARD_RT5650_NAME "chtrt5650" |
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| 490 | +#define DRIVER_NAME NULL /* card name will be used for driver name */ |
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| 491 | +#endif |
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| 492 | + |
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474 | 493 | /* SoC card */ |
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475 | 494 | static struct snd_soc_card snd_soc_card_chtrt5645 = { |
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476 | | - .name = "chtrt5645", |
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| 495 | + .name = CARD_RT5645_NAME, |
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| 496 | + .driver_name = DRIVER_NAME, |
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477 | 497 | .owner = THIS_MODULE, |
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478 | 498 | .dai_link = cht_dailink, |
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479 | 499 | .num_links = ARRAY_SIZE(cht_dailink), |
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.. | .. |
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486 | 506 | }; |
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487 | 507 | |
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488 | 508 | static struct snd_soc_card snd_soc_card_chtrt5650 = { |
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489 | | - .name = "chtrt5650", |
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| 509 | + .name = CARD_RT5650_NAME, |
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| 510 | + .driver_name = DRIVER_NAME, |
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490 | 511 | .owner = THIS_MODULE, |
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491 | 512 | .dai_link = cht_dailink, |
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492 | 513 | .num_links = ARRAY_SIZE(cht_dailink), |
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.. | .. |
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507 | 528 | }; |
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508 | 529 | |
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509 | 530 | static char cht_rt5645_codec_name[SND_ACPI_I2C_ID_LEN]; |
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510 | | -static char cht_rt5645_codec_aif_name[12]; /* = "rt5645-aif[1|2]" */ |
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511 | | -static char cht_rt5645_cpu_dai_name[10]; /* = "ssp[0|2]-port" */ |
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512 | | - |
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513 | | -static bool is_valleyview(void) |
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514 | | -{ |
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515 | | - static const struct x86_cpu_id cpu_ids[] = { |
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516 | | - { X86_VENDOR_INTEL, 6, 55 }, /* Valleyview, Bay Trail */ |
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517 | | - {} |
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518 | | - }; |
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519 | | - |
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520 | | - if (!x86_match_cpu(cpu_ids)) |
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521 | | - return false; |
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522 | | - return true; |
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523 | | -} |
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524 | 531 | |
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525 | 532 | struct acpi_chan_package { /* ACPICA seems to require 64 bit integers */ |
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526 | 533 | u64 aif_value; /* 1: AIF1, 2: AIF2 */ |
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.. | .. |
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531 | 538 | { |
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532 | 539 | struct snd_soc_card *card = snd_soc_cards[0].soc_card; |
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533 | 540 | struct snd_soc_acpi_mach *mach; |
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| 541 | + const char *platform_name; |
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534 | 542 | struct cht_mc_private *drv; |
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535 | | - const char *i2c_name = NULL; |
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| 543 | + struct acpi_device *adev; |
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536 | 544 | bool found = false; |
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537 | 545 | bool is_bytcr = false; |
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538 | 546 | int dai_index = 0; |
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539 | 547 | int ret_val = 0; |
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540 | 548 | int i; |
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| 549 | + const char *mclk_name; |
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541 | 550 | |
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542 | 551 | drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_KERNEL); |
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543 | 552 | if (!drv) |
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544 | 553 | return -ENOMEM; |
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545 | 554 | |
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546 | | - mach = (&pdev->dev)->platform_data; |
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| 555 | + mach = pdev->dev.platform_data; |
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547 | 556 | |
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548 | 557 | for (i = 0; i < ARRAY_SIZE(snd_soc_cards); i++) { |
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549 | 558 | if (acpi_dev_found(snd_soc_cards[i].codec_id) && |
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.. | .. |
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567 | 576 | |
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568 | 577 | /* set correct codec name */ |
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569 | 578 | for (i = 0; i < ARRAY_SIZE(cht_dailink); i++) |
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570 | | - if (!strcmp(card->dai_link[i].codec_name, "i2c-10EC5645:00")) { |
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571 | | - card->dai_link[i].codec_name = drv->codec_name; |
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| 579 | + if (!strcmp(card->dai_link[i].codecs->name, |
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| 580 | + "i2c-10EC5645:00")) { |
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| 581 | + card->dai_link[i].codecs->name = drv->codec_name; |
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572 | 582 | dai_index = i; |
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573 | 583 | } |
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574 | 584 | |
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575 | 585 | /* fixup codec name based on HID */ |
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576 | | - i2c_name = acpi_dev_get_first_match_name(mach->id, NULL, -1); |
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577 | | - if (i2c_name) { |
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| 586 | + adev = acpi_dev_get_first_match_dev(mach->id, NULL, -1); |
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| 587 | + if (adev) { |
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578 | 588 | snprintf(cht_rt5645_codec_name, sizeof(cht_rt5645_codec_name), |
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579 | | - "%s%s", "i2c-", i2c_name); |
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580 | | - cht_dailink[dai_index].codec_name = cht_rt5645_codec_name; |
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| 589 | + "i2c-%s", acpi_dev_name(adev)); |
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| 590 | + put_device(&adev->dev); |
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| 591 | + cht_dailink[dai_index].codecs->name = cht_rt5645_codec_name; |
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581 | 592 | } |
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582 | 593 | |
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583 | 594 | /* |
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584 | 595 | * swap SSP0 if bytcr is detected |
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585 | 596 | * (will be overridden if DMI quirk is detected) |
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586 | 597 | */ |
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587 | | - if (is_valleyview()) { |
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588 | | - struct sst_platform_info *p_info = mach->pdata; |
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589 | | - const struct sst_res_info *res_info = p_info->res_info; |
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590 | | - |
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591 | | - if (res_info->acpi_ipc_irq_index == 0) |
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| 598 | + if (soc_intel_is_byt()) { |
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| 599 | + if (mach->mach_params.acpi_ipc_irq_index == 0) |
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592 | 600 | is_bytcr = true; |
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593 | 601 | } |
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594 | 602 | |
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.. | .. |
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644 | 652 | log_quirks(&pdev->dev); |
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645 | 653 | |
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646 | 654 | if ((cht_rt5645_quirk & CHT_RT5645_SSP2_AIF2) || |
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647 | | - (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF2)) { |
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648 | | - |
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649 | | - /* fixup codec aif name */ |
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650 | | - snprintf(cht_rt5645_codec_aif_name, |
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651 | | - sizeof(cht_rt5645_codec_aif_name), |
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652 | | - "%s", "rt5645-aif2"); |
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653 | | - |
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654 | | - cht_dailink[dai_index].codec_dai_name = |
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655 | | - cht_rt5645_codec_aif_name; |
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656 | | - } |
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| 655 | + (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF2)) |
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| 656 | + cht_dailink[dai_index].codecs->dai_name = "rt5645-aif2"; |
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657 | 657 | |
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658 | 658 | if ((cht_rt5645_quirk & CHT_RT5645_SSP0_AIF1) || |
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659 | | - (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF2)) { |
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| 659 | + (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF2)) |
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| 660 | + cht_dailink[dai_index].cpus->dai_name = "ssp0-port"; |
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660 | 661 | |
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661 | | - /* fixup cpu dai name name */ |
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662 | | - snprintf(cht_rt5645_cpu_dai_name, |
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663 | | - sizeof(cht_rt5645_cpu_dai_name), |
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664 | | - "%s", "ssp0-port"); |
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| 662 | + /* override plaform name, if required */ |
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| 663 | + platform_name = mach->mach_params.platform; |
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665 | 664 | |
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666 | | - cht_dailink[dai_index].cpu_dai_name = |
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667 | | - cht_rt5645_cpu_dai_name; |
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668 | | - } |
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| 665 | + ret_val = snd_soc_fixup_dai_links_platform_name(card, |
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| 666 | + platform_name); |
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| 667 | + if (ret_val) |
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| 668 | + return ret_val; |
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669 | 669 | |
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670 | | - drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3"); |
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| 670 | + if (cht_rt5645_quirk & CHT_RT5645_PMC_PLT_CLK_0) |
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| 671 | + mclk_name = "pmc_plt_clk_0"; |
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| 672 | + else |
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| 673 | + mclk_name = "pmc_plt_clk_3"; |
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| 674 | + |
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| 675 | + drv->mclk = devm_clk_get(&pdev->dev, mclk_name); |
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671 | 676 | if (IS_ERR(drv->mclk)) { |
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672 | | - dev_err(&pdev->dev, |
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673 | | - "Failed to get MCLK from pmc_plt_clk_3: %ld\n", |
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674 | | - PTR_ERR(drv->mclk)); |
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| 677 | + dev_err(&pdev->dev, "Failed to get MCLK from %s: %ld\n", |
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| 678 | + mclk_name, PTR_ERR(drv->mclk)); |
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675 | 679 | return PTR_ERR(drv->mclk); |
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676 | 680 | } |
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677 | 681 | |
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.. | .. |
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689 | 693 | static struct platform_driver snd_cht_mc_driver = { |
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690 | 694 | .driver = { |
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691 | 695 | .name = "cht-bsw-rt5645", |
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| 696 | +#if IS_ENABLED(CONFIG_SND_SOC_SOF_BAYTRAIL) |
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| 697 | + .pm = &snd_soc_pm_ops, |
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| 698 | +#endif |
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692 | 699 | }, |
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693 | 700 | .probe = snd_cht_mc_probe, |
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694 | 701 | }; |
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