forked from ~ljy/RK356X_SDK_RELEASE

hc
2023-12-11 1f93a7dfd1f8d5ff7a5c53246c7534fe2332d6f4
kernel/sound/soc/intel/atom/sst/sst_acpi.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23 * sst_acpi.c - SST (LPE) driver init file for ACPI enumeration.
34 *
....@@ -5,17 +6,6 @@
56 *
67 * Authors: Ramesh Babu K V <Ramesh.Babu@intel.com>
78 * Authors: Omair Mohammed Abdullah <omair.m.abdullah@intel.com>
8
- *
9
- * This program is free software; you can redistribute it and/or modify it
10
- * under the terms and conditions of the GNU General Public License,
11
- * version 2, as published by the Free Software Foundation.
12
- *
13
- * This program is distributed in the hope it will be useful, but WITHOUT
14
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16
- * more details.
17
- *
18
- *
199 */
2010
2111 #include <linux/module.h>
....@@ -38,12 +28,10 @@
3828 #include <acpi/platform/aclinux.h>
3929 #include <acpi/actypes.h>
4030 #include <acpi/acpi_bus.h>
41
-#include <asm/cpu_device_id.h>
42
-#include <asm/iosf_mbi.h>
4331 #include <sound/soc-acpi.h>
4432 #include <sound/soc-acpi-intel-match.h>
4533 #include "../sst-mfld-platform.h"
46
-#include "../../common/sst-dsp.h"
34
+#include "../../common/soc-intel-quirks.h"
4735 #include "sst.h"
4836
4937 /* LPE viewpoint addresses */
....@@ -176,7 +164,7 @@
176164 ctx->iram_base = rsrc->start + ctx->pdata->res_info->iram_offset;
177165 ctx->iram_end = ctx->iram_base + ctx->pdata->res_info->iram_size - 1;
178166 dev_info(ctx->dev, "IRAM base: %#x", ctx->iram_base);
179
- ctx->iram = devm_ioremap_nocache(ctx->dev, ctx->iram_base,
167
+ ctx->iram = devm_ioremap(ctx->dev, ctx->iram_base,
180168 ctx->pdata->res_info->iram_size);
181169 if (!ctx->iram) {
182170 dev_err(ctx->dev, "unable to map IRAM\n");
....@@ -186,7 +174,7 @@
186174 ctx->dram_base = rsrc->start + ctx->pdata->res_info->dram_offset;
187175 ctx->dram_end = ctx->dram_base + ctx->pdata->res_info->dram_size - 1;
188176 dev_info(ctx->dev, "DRAM base: %#x", ctx->dram_base);
189
- ctx->dram = devm_ioremap_nocache(ctx->dev, ctx->dram_base,
177
+ ctx->dram = devm_ioremap(ctx->dev, ctx->dram_base,
190178 ctx->pdata->res_info->dram_size);
191179 if (!ctx->dram) {
192180 dev_err(ctx->dev, "unable to map DRAM\n");
....@@ -195,7 +183,7 @@
195183
196184 ctx->shim_phy_add = rsrc->start + ctx->pdata->res_info->shim_offset;
197185 dev_info(ctx->dev, "SHIM base: %#x", ctx->shim_phy_add);
198
- ctx->shim = devm_ioremap_nocache(ctx->dev, ctx->shim_phy_add,
186
+ ctx->shim = devm_ioremap(ctx->dev, ctx->shim_phy_add,
199187 ctx->pdata->res_info->shim_size);
200188 if (!ctx->shim) {
201189 dev_err(ctx->dev, "unable to map SHIM\n");
....@@ -208,7 +196,7 @@
208196 /* Get mailbox addr */
209197 ctx->mailbox_add = rsrc->start + ctx->pdata->res_info->mbox_offset;
210198 dev_info(ctx->dev, "Mailbox base: %#x", ctx->mailbox_add);
211
- ctx->mailbox = devm_ioremap_nocache(ctx->dev, ctx->mailbox_add,
199
+ ctx->mailbox = devm_ioremap(ctx->dev, ctx->mailbox_add,
212200 ctx->pdata->res_info->mbox_size);
213201 if (!ctx->mailbox) {
214202 dev_err(ctx->dev, "unable to map mailbox\n");
....@@ -227,7 +215,7 @@
227215 ctx->ddr_base = rsrc->start;
228216 ctx->ddr_end = rsrc->end;
229217 dev_info(ctx->dev, "DDR base: %#x", ctx->ddr_base);
230
- ctx->ddr = devm_ioremap_nocache(ctx->dev, ctx->ddr_base,
218
+ ctx->ddr = devm_ioremap(ctx->dev, ctx->ddr_base,
231219 resource_size(rsrc));
232220 if (!ctx->ddr) {
233221 dev_err(ctx->dev, "unable to map DDR\n");
....@@ -243,53 +231,6 @@
243231 return 0;
244232 }
245233
246
-static int is_byt(void)
247
-{
248
- bool status = false;
249
- static const struct x86_cpu_id cpu_ids[] = {
250
- { X86_VENDOR_INTEL, 6, 55 }, /* Valleyview, Bay Trail */
251
- {}
252
- };
253
- if (x86_match_cpu(cpu_ids))
254
- status = true;
255
- return status;
256
-}
257
-
258
-static int is_byt_cr(struct device *dev, bool *bytcr)
259
-{
260
- int status = 0;
261
-
262
- if (IS_ENABLED(CONFIG_IOSF_MBI)) {
263
- u32 bios_status;
264
-
265
- if (!is_byt() || !iosf_mbi_available()) {
266
- /* bail silently */
267
- return status;
268
- }
269
-
270
- status = iosf_mbi_read(BT_MBI_UNIT_PMC, /* 0x04 PUNIT */
271
- MBI_REG_READ, /* 0x10 */
272
- 0x006, /* BIOS_CONFIG */
273
- &bios_status);
274
-
275
- if (status) {
276
- dev_err(dev, "could not read PUNIT BIOS_CONFIG\n");
277
- } else {
278
- /* bits 26:27 mirror PMIC options */
279
- bios_status = (bios_status >> 26) & 3;
280
-
281
- if ((bios_status == 1) || (bios_status == 3))
282
- *bytcr = true;
283
- else
284
- dev_info(dev, "BYT-CR not detected\n");
285
- }
286
- } else {
287
- dev_info(dev, "IOSF_MBI not enabled, no BYT-CR detection\n");
288
- }
289
- return status;
290
-}
291
-
292
-
293234 static int sst_acpi_probe(struct platform_device *pdev)
294235 {
295236 struct device *dev = &pdev->dev;
....@@ -301,7 +242,6 @@
301242 struct platform_device *plat_dev;
302243 struct sst_platform_info *pdata;
303244 unsigned int dev_id;
304
- bool bytcr = false;
305245
306246 id = acpi_match_device(dev->driver->acpi_match_table, dev);
307247 if (!id)
....@@ -315,7 +255,7 @@
315255 return -ENODEV;
316256 }
317257
318
- if (is_byt())
258
+ if (soc_intel_is_byt())
319259 mach->pdata = &byt_rvp_platform_data;
320260 else
321261 mach->pdata = &chv_platform_data;
....@@ -333,14 +273,15 @@
333273 if (ret < 0)
334274 return ret;
335275
336
- ret = is_byt_cr(dev, &bytcr);
337
- if (!((ret < 0) || (bytcr == false))) {
338
- dev_info(dev, "Detected Baytrail-CR platform\n");
339
-
276
+ if (soc_intel_is_byt_cr(pdev)) {
340277 /* override resource info */
341278 byt_rvp_platform_data.res_info = &bytcr_res_info;
342279 }
343280
281
+ /* update machine parameters */
282
+ mach->mach_params.acpi_ipc_irq_index =
283
+ pdata->res_info->acpi_ipc_irq_index;
284
+
344285 plat_dev = platform_device_register_data(dev, pdata->platform, -1,
345286 NULL, 0);
346287 if (IS_ERR(plat_dev)) {