.. | .. |
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203 | 203 | }; |
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204 | 204 | |
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205 | 205 | /** |
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206 | | - * fsl_ssi: per-SSI private data |
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207 | | - * |
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| 206 | + * struct fsl_ssi - per-SSI private data |
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208 | 207 | * @regs: Pointer to the regmap registers |
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209 | 208 | * @irq: IRQ of this SSI |
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210 | 209 | * @cpu_dai_drv: CPU DAI driver for this device |
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211 | | - * |
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212 | 210 | * @dai_fmt: DAI configuration this device is currently used with |
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213 | 211 | * @streams: Mask of current active streams: BIT(TX) and BIT(RX) |
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214 | 212 | * @i2s_net: I2S and Network mode configurations of SCR register |
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.. | .. |
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221 | 219 | * @slot_width: Width of each DAI slot |
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222 | 220 | * @slots: Number of slots |
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223 | 221 | * @regvals: Specific RX/TX register settings |
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224 | | - * |
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225 | 222 | * @clk: Clock source to access register |
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226 | 223 | * @baudclk: Clock source to generate bit and frame-sync clocks |
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227 | 224 | * @baudclk_streams: Active streams that are using baudclk |
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228 | | - * |
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229 | 225 | * @regcache_sfcsr: Cache sfcsr register value during suspend and resume |
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230 | 226 | * @regcache_sacnt: Cache sacnt register value during suspend and resume |
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231 | | - * |
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232 | 227 | * @dma_params_tx: DMA transmit parameters |
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233 | 228 | * @dma_params_rx: DMA receive parameters |
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234 | 229 | * @ssi_phys: physical address of the SSI registers |
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235 | | - * |
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236 | 230 | * @fiq_params: FIQ stream filtering parameters |
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237 | | - * |
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238 | 231 | * @card_pdev: Platform_device pointer to register a sound card for PowerPC or |
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239 | 232 | * to register a CODEC platform device for AC97 |
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240 | 233 | * @card_name: Platform_device name to register a sound card for PowerPC or |
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241 | 234 | * to register a CODEC platform device for AC97 |
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242 | 235 | * @card_idx: The index of SSI to register a sound card for PowerPC or |
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243 | 236 | * to register a CODEC platform device for AC97 |
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244 | | - * |
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245 | 237 | * @dbg_stats: Debugging statistics |
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246 | | - * |
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247 | 238 | * @soc: SoC specific data |
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248 | 239 | * @dev: Pointer to &pdev->dev |
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249 | | - * |
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250 | 240 | * @fifo_watermark: The FIFO watermark setting. Notifies DMA when there are |
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251 | 241 | * @fifo_watermark or fewer words in TX fifo or |
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252 | 242 | * @fifo_watermark or more empty words in RX fifo. |
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253 | 243 | * @dma_maxburst: Max number of words to transfer in one go. So far, |
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254 | 244 | * this is always the same as fifo_watermark. |
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255 | | - * |
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256 | 245 | * @ac97_reg_lock: Mutex lock to serialize AC97 register access operations |
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257 | 246 | */ |
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258 | 247 | struct fsl_ssi { |
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.. | .. |
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374 | 363 | } |
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375 | 364 | |
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376 | 365 | /** |
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377 | | - * Interrupt handler to gather states |
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| 366 | + * fsl_ssi_irq - Interrupt handler to gather states |
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| 367 | + * @irq: irq number |
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| 368 | + * @dev_id: context |
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378 | 369 | */ |
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379 | 370 | static irqreturn_t fsl_ssi_isr(int irq, void *dev_id) |
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380 | 371 | { |
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.. | .. |
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395 | 386 | } |
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396 | 387 | |
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397 | 388 | /** |
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398 | | - * Set SCR, SIER, STCR and SRCR registers with cached values in regvals |
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| 389 | + * fsl_ssi_config_enable - Set SCR, SIER, STCR and SRCR registers with |
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| 390 | + * cached values in regvals |
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| 391 | + * @ssi: SSI context |
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| 392 | + * @tx: direction |
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399 | 393 | * |
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400 | 394 | * Notes: |
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401 | 395 | * 1) For offline_config SoCs, enable all necessary bits of both streams |
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.. | .. |
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474 | 468 | ssi->streams |= BIT(dir); |
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475 | 469 | } |
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476 | 470 | |
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477 | | -/** |
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| 471 | +/* |
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478 | 472 | * Exclude bits that are used by the opposite stream |
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479 | 473 | * |
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480 | 474 | * When both streams are active, disabling some bits for the current stream |
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.. | .. |
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495 | 489 | ((vals) & _ssi_xor_shared_bits(vals, avals, aactive)) |
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496 | 490 | |
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497 | 491 | /** |
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498 | | - * Unset SCR, SIER, STCR and SRCR registers with cached values in regvals |
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| 492 | + * fsl_ssi_config_disable - Unset SCR, SIER, STCR and SRCR registers |
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| 493 | + * with cached values in regvals |
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| 494 | + * @ssi: SSI context |
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| 495 | + * @tx: direction |
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499 | 496 | * |
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500 | 497 | * Notes: |
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501 | 498 | * 1) For offline_config SoCs, to avoid online reconfigurations, disable all |
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.. | .. |
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577 | 574 | } |
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578 | 575 | |
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579 | 576 | /** |
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580 | | - * Cache critical bits of SIER, SRCR, STCR and SCR to later set them safely |
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| 577 | + * fsl_ssi_setup_regvals - Cache critical bits of SIER, SRCR, STCR and |
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| 578 | + * SCR to later set them safely |
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| 579 | + * @ssi: SSI context |
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581 | 580 | */ |
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582 | 581 | static void fsl_ssi_setup_regvals(struct fsl_ssi *ssi) |
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583 | 582 | { |
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.. | .. |
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630 | 629 | static int fsl_ssi_startup(struct snd_pcm_substream *substream, |
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631 | 630 | struct snd_soc_dai *dai) |
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632 | 631 | { |
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633 | | - struct snd_soc_pcm_runtime *rtd = substream->private_data; |
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634 | | - struct fsl_ssi *ssi = snd_soc_dai_get_drvdata(rtd->cpu_dai); |
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| 632 | + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); |
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| 633 | + struct fsl_ssi *ssi = snd_soc_dai_get_drvdata(asoc_rtd_to_cpu(rtd, 0)); |
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635 | 634 | int ret; |
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636 | 635 | |
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637 | 636 | ret = clk_prepare_enable(ssi->clk); |
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.. | .. |
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654 | 653 | static void fsl_ssi_shutdown(struct snd_pcm_substream *substream, |
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655 | 654 | struct snd_soc_dai *dai) |
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656 | 655 | { |
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657 | | - struct snd_soc_pcm_runtime *rtd = substream->private_data; |
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658 | | - struct fsl_ssi *ssi = snd_soc_dai_get_drvdata(rtd->cpu_dai); |
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| 656 | + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); |
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| 657 | + struct fsl_ssi *ssi = snd_soc_dai_get_drvdata(asoc_rtd_to_cpu(rtd, 0)); |
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659 | 658 | |
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660 | 659 | clk_disable_unprepare(ssi->clk); |
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661 | 660 | } |
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662 | 661 | |
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663 | 662 | /** |
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664 | | - * Configure Digital Audio Interface bit clock |
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| 663 | + * fsl_ssi_set_bclk - Configure Digital Audio Interface bit clock |
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| 664 | + * @substream: ASoC substream |
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| 665 | + * @dai: pointer to DAI |
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| 666 | + * @hw_params: pointers to hw_params |
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665 | 667 | * |
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666 | | - * Note: This function can be only called when using SSI as DAI master |
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| 668 | + * Notes: This function can be only called when using SSI as DAI master |
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667 | 669 | * |
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668 | 670 | * Quick instruction for parameters: |
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669 | 671 | * freq: Output BCLK frequency = samplerate * slots * slot_width |
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.. | .. |
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782 | 784 | } |
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783 | 785 | |
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784 | 786 | /** |
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785 | | - * Configure SSI based on PCM hardware parameters |
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| 787 | + * fsl_ssi_hw_params - Configure SSI based on PCM hardware parameters |
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| 788 | + * @substream: ASoC substream |
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| 789 | + * @hw_params: pointers to hw_params |
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| 790 | + * @dai: pointer to DAI |
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786 | 791 | * |
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787 | 792 | * Notes: |
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788 | 793 | * 1) SxCCR.WL bits are critical bits that require SSI to be temporarily |
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.. | .. |
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858 | 863 | static int fsl_ssi_hw_free(struct snd_pcm_substream *substream, |
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859 | 864 | struct snd_soc_dai *dai) |
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860 | 865 | { |
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861 | | - struct snd_soc_pcm_runtime *rtd = substream->private_data; |
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862 | | - struct fsl_ssi *ssi = snd_soc_dai_get_drvdata(rtd->cpu_dai); |
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| 866 | + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); |
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| 867 | + struct fsl_ssi *ssi = snd_soc_dai_get_drvdata(asoc_rtd_to_cpu(rtd, 0)); |
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863 | 868 | |
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864 | 869 | if (fsl_ssi_is_i2s_master(ssi) && |
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865 | 870 | ssi->baudclk_streams & BIT(substream->stream)) { |
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.. | .. |
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894 | 899 | "missing baudclk for master mode\n"); |
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895 | 900 | return -EINVAL; |
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896 | 901 | } |
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897 | | - /* fall through */ |
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| 902 | + fallthrough; |
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898 | 903 | case SND_SOC_DAIFMT_CBM_CFS: |
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899 | 904 | ssi->i2s_net |= SSI_SCR_I2S_MODE_MASTER; |
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900 | 905 | break; |
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.. | .. |
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999 | 1004 | } |
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1000 | 1005 | |
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1001 | 1006 | /** |
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1002 | | - * Configure Digital Audio Interface (DAI) Format |
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| 1007 | + * fsl_ssi_set_dai_fmt - Configure Digital Audio Interface (DAI) Format |
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| 1008 | + * @dai: pointer to DAI |
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| 1009 | + * @fmt: format mask |
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1003 | 1010 | */ |
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1004 | 1011 | static int fsl_ssi_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) |
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1005 | 1012 | { |
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.. | .. |
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1013 | 1020 | } |
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1014 | 1021 | |
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1015 | 1022 | /** |
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1016 | | - * Set TDM slot number and slot width |
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| 1023 | + * fsl_ssi_set_dai_tdm_slot - Set TDM slot number and slot width |
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| 1024 | + * @dai: pointer to DAI |
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| 1025 | + * @tx_mask: mask for TX |
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| 1026 | + * @rx_mask: mask for RX |
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| 1027 | + * @slots: number of slots |
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| 1028 | + * @slot_width: number of bits per slot |
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1017 | 1029 | */ |
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1018 | 1030 | static int fsl_ssi_set_dai_tdm_slot(struct snd_soc_dai *dai, u32 tx_mask, |
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1019 | 1031 | u32 rx_mask, int slots, int slot_width) |
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.. | .. |
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1057 | 1069 | } |
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1058 | 1070 | |
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1059 | 1071 | /** |
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1060 | | - * Start or stop SSI and corresponding DMA transaction. |
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| 1072 | + * fsl_ssi_trigger - Start or stop SSI and corresponding DMA transaction. |
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| 1073 | + * @substream: ASoC substream |
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| 1074 | + * @cmd: trigger command |
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| 1075 | + * @dai: pointer to DAI |
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1061 | 1076 | * |
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1062 | 1077 | * The DMA channel is in external master start and pause mode, which |
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1063 | 1078 | * means the SSI completely controls the flow of data. |
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.. | .. |
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1065 | 1080 | static int fsl_ssi_trigger(struct snd_pcm_substream *substream, int cmd, |
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1066 | 1081 | struct snd_soc_dai *dai) |
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1067 | 1082 | { |
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1068 | | - struct snd_soc_pcm_runtime *rtd = substream->private_data; |
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1069 | | - struct fsl_ssi *ssi = snd_soc_dai_get_drvdata(rtd->cpu_dai); |
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| 1083 | + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); |
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| 1084 | + struct fsl_ssi *ssi = snd_soc_dai_get_drvdata(asoc_rtd_to_cpu(rtd, 0)); |
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1070 | 1085 | bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; |
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1071 | 1086 | |
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1072 | 1087 | switch (cmd) { |
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.. | .. |
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1143 | 1158 | }; |
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1144 | 1159 | |
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1145 | 1160 | static struct snd_soc_dai_driver fsl_ssi_ac97_dai = { |
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1146 | | - .bus_control = true, |
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1147 | 1161 | .symmetric_channels = 1, |
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1148 | 1162 | .probe = fsl_ssi_dai_probe, |
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1149 | 1163 | .playback = { |
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.. | .. |
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1242 | 1256 | }; |
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1243 | 1257 | |
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1244 | 1258 | /** |
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1245 | | - * Initialize SSI registers |
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| 1259 | + * fsl_ssi_hw_init - Initialize SSI registers |
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| 1260 | + * @ssi: SSI context |
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1246 | 1261 | */ |
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1247 | 1262 | static int fsl_ssi_hw_init(struct fsl_ssi *ssi) |
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1248 | 1263 | { |
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.. | .. |
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1271 | 1286 | } |
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1272 | 1287 | |
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1273 | 1288 | /** |
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1274 | | - * Clear SSI registers |
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| 1289 | + * fsl_ssi_hw_clean - Clear SSI registers |
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| 1290 | + * @ssi: SSI context |
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1275 | 1291 | */ |
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1276 | 1292 | static void fsl_ssi_hw_clean(struct fsl_ssi *ssi) |
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1277 | 1293 | { |
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.. | .. |
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1288 | 1304 | regmap_update_bits(ssi->regs, REG_SSI_SCR, SSI_SCR_SSIEN, 0); |
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1289 | 1305 | } |
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1290 | 1306 | } |
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1291 | | -/** |
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| 1307 | + |
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| 1308 | +/* |
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1292 | 1309 | * Make every character in a string lower-case |
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1293 | 1310 | */ |
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1294 | 1311 | static void make_lowercase(char *s) |
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.. | .. |
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1517 | 1534 | } |
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1518 | 1535 | |
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1519 | 1536 | ssi->irq = platform_get_irq(pdev, 0); |
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1520 | | - if (ssi->irq < 0) { |
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1521 | | - dev_err(dev, "no irq for node %s\n", pdev->name); |
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| 1537 | + if (ssi->irq < 0) |
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1522 | 1538 | return ssi->irq; |
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1523 | | - } |
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1524 | 1539 | |
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1525 | 1540 | /* Set software limitations for synchronous mode except AC97 */ |
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1526 | 1541 | if (ssi->synchronous && !fsl_ssi_is_ac97(ssi)) { |
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.. | .. |
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1589 | 1604 | } |
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1590 | 1605 | } |
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1591 | 1606 | |
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1592 | | - ret = fsl_ssi_debugfs_create(&ssi->dbg_stats, dev); |
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1593 | | - if (ret) |
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1594 | | - goto error_asoc_register; |
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| 1607 | + fsl_ssi_debugfs_create(&ssi->dbg_stats, dev); |
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1595 | 1608 | |
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1596 | 1609 | /* Initially configures SSI registers */ |
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1597 | 1610 | fsl_ssi_hw_init(ssi); |
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