| .. | .. |
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| 14 | 14 | #include <linux/clk.h> |
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| 15 | 15 | #include <linux/delay.h> |
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| 16 | 16 | #include <linux/gpio/consumer.h> |
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| 17 | | -#include <linux/of_address.h> |
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| 17 | +#include <linux/module.h> |
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| 18 | 18 | #include <linux/of_pci.h> |
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| 19 | 19 | #include <linux/phy/phy.h> |
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| 20 | 20 | #include <linux/platform_device.h> |
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| .. | .. |
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| 28 | 28 | struct device *dev = rockchip->dev; |
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| 29 | 29 | struct platform_device *pdev = to_platform_device(dev); |
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| 30 | 30 | struct device_node *node = dev->of_node; |
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| 31 | | - struct device_node *mem; |
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| 32 | | - struct resource reg; |
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| 33 | 31 | struct resource *regs; |
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| 34 | 32 | int err; |
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| 35 | 33 | |
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| .. | .. |
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| 48 | 46 | return -EINVAL; |
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| 49 | 47 | } |
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| 50 | 48 | |
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| 51 | | - regs = platform_get_resource_byname(pdev, IORESOURCE_MEM, |
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| 52 | | - "apb-base"); |
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| 53 | | - rockchip->apb_base = devm_ioremap_resource(dev, regs); |
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| 49 | + rockchip->apb_base = |
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| 50 | + devm_platform_ioremap_resource_byname(pdev, "apb-base"); |
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| 54 | 51 | if (IS_ERR(rockchip->apb_base)) |
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| 55 | 52 | return PTR_ERR(rockchip->apb_base); |
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| 56 | 53 | |
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| .. | .. |
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| 86 | 83 | } |
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| 87 | 84 | |
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| 88 | 85 | rockchip->mgmt_sticky_rst = devm_reset_control_get_exclusive(dev, |
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| 89 | | - "mgmt-sticky"); |
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| 86 | + "mgmt-sticky"); |
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| 90 | 87 | if (IS_ERR(rockchip->mgmt_sticky_rst)) { |
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| 91 | 88 | if (PTR_ERR(rockchip->mgmt_sticky_rst) != -EPROBE_DEFER) |
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| 92 | 89 | dev_err(dev, "missing mgmt-sticky reset property in node\n"); |
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| .. | .. |
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| 122 | 119 | } |
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| 123 | 120 | |
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| 124 | 121 | if (rockchip->is_rc) { |
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| 125 | | - rockchip->ep_gpio = devm_gpiod_get_optional(dev, "ep", GPIOD_OUT_HIGH); |
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| 126 | | - if (IS_ERR(rockchip->ep_gpio)) { |
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| 127 | | - dev_err(dev, "invalid ep-gpios property in node\n"); |
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| 128 | | - return PTR_ERR(rockchip->ep_gpio); |
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| 129 | | - } |
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| 122 | + rockchip->ep_gpio = devm_gpiod_get_optional(dev, "ep", |
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| 123 | + GPIOD_OUT_HIGH); |
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| 124 | + if (IS_ERR(rockchip->ep_gpio)) |
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| 125 | + return dev_err_probe(dev, PTR_ERR(rockchip->ep_gpio), |
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| 126 | + "failed to get ep GPIO\n"); |
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| 130 | 127 | } |
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| 131 | 128 | |
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| 132 | 129 | rockchip->aclk_pcie = devm_clk_get(dev, "aclk"); |
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| .. | .. |
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| 151 | 148 | if (IS_ERR(rockchip->clk_pcie_pm)) { |
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| 152 | 149 | dev_err(dev, "pm clock not found\n"); |
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| 153 | 150 | return PTR_ERR(rockchip->clk_pcie_pm); |
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| 154 | | - } |
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| 155 | | - |
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| 156 | | - if (rockchip->is_rc) { |
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| 157 | | - mem = of_parse_phandle(node, "memory-region", 0); |
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| 158 | | - if (!mem) { |
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| 159 | | - dev_warn(dev, "missing \"memory-region\" property\n"); |
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| 160 | | - return 0; |
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| 161 | | - } |
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| 162 | | - |
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| 163 | | - err = of_address_to_resource(mem, 0, ®); |
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| 164 | | - if (err < 0) { |
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| 165 | | - dev_warn(dev, "missing \"reg\" property\n"); |
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| 166 | | - return 0; |
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| 167 | | - } |
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| 168 | | - |
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| 169 | | - rockchip->mem_reserve_start = reg.start; |
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| 170 | | - rockchip->mem_reserve_size = resource_size(®); |
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| 171 | | - |
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| 172 | | - err = of_property_read_u32(node, "rockchip,dma_trx_enabled", |
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| 173 | | - &rockchip->dma_trx_enabled); |
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| 174 | | - if (err < 0) { |
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| 175 | | - dev_warn(dev, |
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| 176 | | - "missing \"rockchip,dma_trx_enabled\" property\n"); |
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| 177 | | - return 0; |
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| 178 | | - } |
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| 179 | | - |
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| 180 | | - err = of_property_read_u32(node, "rockchip,deferred", |
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| 181 | | - &rockchip->deferred); |
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| 182 | | - if (err < 0) { |
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| 183 | | - dev_warn(dev, "missing \"rockchip,deferred\" property\n"); |
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| 184 | | - return 0; |
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| 185 | | - } |
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| 186 | 151 | } |
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| 187 | 152 | |
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| 188 | 153 | return 0; |
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| .. | .. |
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| 457 | 422 | rockchip_pcie_write(rockchip, 0x0, PCIE_CORE_OB_REGION_DESC1); |
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| 458 | 423 | } |
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| 459 | 424 | EXPORT_SYMBOL_GPL(rockchip_pcie_cfg_configuration_accesses); |
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| 425 | + |
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| 426 | +MODULE_AUTHOR("Rockchip Inc"); |
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| 427 | +MODULE_DESCRIPTION("Rockchip AXI PCIe driver"); |
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| 428 | +MODULE_LICENSE("GPL v2"); |
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