forked from ~ljy/RK356X_SDK_RELEASE

hc
2023-12-11 1f93a7dfd1f8d5ff7a5c53246c7534fe2332d6f4
kernel/drivers/pci/controller/pcie-rockchip.c
....@@ -14,7 +14,7 @@
1414 #include <linux/clk.h>
1515 #include <linux/delay.h>
1616 #include <linux/gpio/consumer.h>
17
-#include <linux/of_address.h>
17
+#include <linux/module.h>
1818 #include <linux/of_pci.h>
1919 #include <linux/phy/phy.h>
2020 #include <linux/platform_device.h>
....@@ -28,8 +28,6 @@
2828 struct device *dev = rockchip->dev;
2929 struct platform_device *pdev = to_platform_device(dev);
3030 struct device_node *node = dev->of_node;
31
- struct device_node *mem;
32
- struct resource reg;
3331 struct resource *regs;
3432 int err;
3533
....@@ -48,9 +46,8 @@
4846 return -EINVAL;
4947 }
5048
51
- regs = platform_get_resource_byname(pdev, IORESOURCE_MEM,
52
- "apb-base");
53
- rockchip->apb_base = devm_ioremap_resource(dev, regs);
49
+ rockchip->apb_base =
50
+ devm_platform_ioremap_resource_byname(pdev, "apb-base");
5451 if (IS_ERR(rockchip->apb_base))
5552 return PTR_ERR(rockchip->apb_base);
5653
....@@ -86,7 +83,7 @@
8683 }
8784
8885 rockchip->mgmt_sticky_rst = devm_reset_control_get_exclusive(dev,
89
- "mgmt-sticky");
86
+ "mgmt-sticky");
9087 if (IS_ERR(rockchip->mgmt_sticky_rst)) {
9188 if (PTR_ERR(rockchip->mgmt_sticky_rst) != -EPROBE_DEFER)
9289 dev_err(dev, "missing mgmt-sticky reset property in node\n");
....@@ -122,11 +119,11 @@
122119 }
123120
124121 if (rockchip->is_rc) {
125
- rockchip->ep_gpio = devm_gpiod_get_optional(dev, "ep", GPIOD_OUT_HIGH);
126
- if (IS_ERR(rockchip->ep_gpio)) {
127
- dev_err(dev, "invalid ep-gpios property in node\n");
128
- return PTR_ERR(rockchip->ep_gpio);
129
- }
122
+ rockchip->ep_gpio = devm_gpiod_get_optional(dev, "ep",
123
+ GPIOD_OUT_HIGH);
124
+ if (IS_ERR(rockchip->ep_gpio))
125
+ return dev_err_probe(dev, PTR_ERR(rockchip->ep_gpio),
126
+ "failed to get ep GPIO\n");
130127 }
131128
132129 rockchip->aclk_pcie = devm_clk_get(dev, "aclk");
....@@ -151,38 +148,6 @@
151148 if (IS_ERR(rockchip->clk_pcie_pm)) {
152149 dev_err(dev, "pm clock not found\n");
153150 return PTR_ERR(rockchip->clk_pcie_pm);
154
- }
155
-
156
- if (rockchip->is_rc) {
157
- mem = of_parse_phandle(node, "memory-region", 0);
158
- if (!mem) {
159
- dev_warn(dev, "missing \"memory-region\" property\n");
160
- return 0;
161
- }
162
-
163
- err = of_address_to_resource(mem, 0, &reg);
164
- if (err < 0) {
165
- dev_warn(dev, "missing \"reg\" property\n");
166
- return 0;
167
- }
168
-
169
- rockchip->mem_reserve_start = reg.start;
170
- rockchip->mem_reserve_size = resource_size(&reg);
171
-
172
- err = of_property_read_u32(node, "rockchip,dma_trx_enabled",
173
- &rockchip->dma_trx_enabled);
174
- if (err < 0) {
175
- dev_warn(dev,
176
- "missing \"rockchip,dma_trx_enabled\" property\n");
177
- return 0;
178
- }
179
-
180
- err = of_property_read_u32(node, "rockchip,deferred",
181
- &rockchip->deferred);
182
- if (err < 0) {
183
- dev_warn(dev, "missing \"rockchip,deferred\" property\n");
184
- return 0;
185
- }
186151 }
187152
188153 return 0;
....@@ -457,3 +422,7 @@
457422 rockchip_pcie_write(rockchip, 0x0, PCIE_CORE_OB_REGION_DESC1);
458423 }
459424 EXPORT_SYMBOL_GPL(rockchip_pcie_cfg_configuration_accesses);
425
+
426
+MODULE_AUTHOR("Rockchip Inc");
427
+MODULE_DESCRIPTION("Rockchip AXI PCIe driver");
428
+MODULE_LICENSE("GPL v2");