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2023-12-11 1f93a7dfd1f8d5ff7a5c53246c7534fe2332d6f4

 kernel/arch/xtensa/kernel/setup.c
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@@ -37,7 +37,6 @@
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 #include <asm/bootparam.h>
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 #include <asm/kasan.h>
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 #include <asm/mmu_context.h>
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-#include <asm/pgtable.h>
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 #include <asm/processor.h>
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 #include <asm/timex.h>
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 #include <asm/platform.h>
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@@ -61,7 +60,6 @@
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 #ifdef CONFIG_BLK_DEV_INITRD
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 extern unsigned long initrd_start;
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 extern unsigned long initrd_end;
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-int initrd_is_mapped = 0;
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 extern int initrd_below_start_ok;
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 #endif
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@@ -95,7 +93,7 @@
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 } tagtable_t;
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 #define __tagtable(tag, fn) static tagtable_t __tagtable_##fn 		\
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-	__attribute__((used, section(".taglist"))) = { tag, fn }
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+	__section(".taglist") __attribute__((used)) = { tag, fn }
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 /* parse current tag */
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@@ -285,6 +283,8 @@
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 extern char _UserExceptionVector_text_end;
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 extern char _DoubleExceptionVector_text_start;
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 extern char _DoubleExceptionVector_text_end;
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+extern char _exception_text_start;
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+extern char _exception_text_end;
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 #if XCHAL_EXCM_LEVEL >= 2
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 extern char _Level2InterruptVector_text_start;
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 extern char _Level2InterruptVector_text_end;
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@@ -309,6 +309,10 @@
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 extern char _SecondaryResetVector_text_start;
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 extern char _SecondaryResetVector_text_end;
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 #endif
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+#ifdef CONFIG_XIP_KERNEL
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+extern char _xip_start[];
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+extern char _xip_end[];
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+#endif
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 static inline int __init_memblock mem_reserve(unsigned long start,
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 					      unsigned long end)
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@@ -319,9 +323,9 @@
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 void __init setup_arch(char **cmdline_p)
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 {
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 	pr_info("config ID: %08x:%08x\n",
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-		get_sr(SREG_EPC), get_sr(SREG_EXCSAVE));
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-	if (get_sr(SREG_EPC) != XCHAL_HW_CONFIGID0 ||
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-	    get_sr(SREG_EXCSAVE) != XCHAL_HW_CONFIGID1)
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+		xtensa_get_sr(SREG_EPC), xtensa_get_sr(SREG_EXCSAVE));
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+	if (xtensa_get_sr(SREG_EPC) != XCHAL_HW_CONFIGID0 ||
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+	    xtensa_get_sr(SREG_EXCSAVE) != XCHAL_HW_CONFIGID1)
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 		pr_info("built for config ID: %08x:%08x\n",
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 			XCHAL_HW_CONFIGID0, XCHAL_HW_CONFIGID1);
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@@ -332,18 +336,19 @@
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 	/* Reserve some memory regions */
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 #ifdef CONFIG_BLK_DEV_INITRD
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-	if (initrd_start < initrd_end) {
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-		initrd_is_mapped = mem_reserve(__pa(initrd_start),
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-					       __pa(initrd_end)) == 0;
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+	if (initrd_start < initrd_end &&
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+	    !mem_reserve(__pa(initrd_start), __pa(initrd_end)))
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 		initrd_below_start_ok = 1;
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-	} else {
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+	else
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 		initrd_start = 0;
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-	}
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 #endif
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 	mem_reserve(__pa(_stext), __pa(_end));
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+#ifdef CONFIG_XIP_KERNEL
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+	mem_reserve(__pa(_xip_start), __pa(_xip_end));
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+#endif
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-#ifdef CONFIG_VECTORS_OFFSET
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+#ifdef CONFIG_VECTORS_ADDR
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 	mem_reserve(__pa(&_WindowVectors_text_start),
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 		    __pa(&_WindowVectors_text_end));
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@@ -359,6 +364,8 @@
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 	mem_reserve(__pa(&_DoubleExceptionVector_text_start),
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 		    __pa(&_DoubleExceptionVector_text_end));
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+	mem_reserve(__pa(&_exception_text_start),
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+		    __pa(&_exception_text_end));
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 #if XCHAL_EXCM_LEVEL >= 2
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 	mem_reserve(__pa(&_Level2InterruptVector_text_start),
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 		    __pa(&_Level2InterruptVector_text_end));
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@@ -380,7 +387,7 @@
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 		    __pa(&_Level6InterruptVector_text_end));
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 #endif
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-#endif /* CONFIG_VECTORS_OFFSET */
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+#endif /* CONFIG_VECTORS_ADDR */
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 #ifdef CONFIG_SMP
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 	mem_reserve(__pa(&_SecondaryResetVector_text_start),
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@@ -401,13 +408,7 @@
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 #ifdef CONFIG_VT
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 # if defined(CONFIG_VGA_CONSOLE)
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 	conswitchp = &vga_con;
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-# elif defined(CONFIG_DUMMY_CONSOLE)
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-	conswitchp = &dummy_con;
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 # endif
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-#endif
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-
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-#ifdef CONFIG_PCI
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-	platform_pcibios_init();
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 #endif
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 }
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@@ -598,7 +599,7 @@
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 		      num_online_cpus(),
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 		      cpumask_pr_args(cpu_online_mask),
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 		      XCHAL_BUILD_UNIQUE_ID,
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-		      get_sr(SREG_EPC), get_sr(SREG_EXCSAVE),
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+		      xtensa_get_sr(SREG_EPC), xtensa_get_sr(SREG_EXCSAVE),
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 		      XCHAL_HAVE_BE ?  "big" : "little",
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 		      ccount_freq/1000000,
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 		      (ccount_freq/10000) % 100,
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@@ -653,6 +654,9 @@
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 #if XCHAL_HAVE_S32C1I
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 		     "s32c1i "
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 #endif
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+#if XCHAL_HAVE_EXCLUSIVE
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+		     "exclusive "
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+#endif
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 		     "\n");
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 	/* Registers. */