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2023-12-11 1f93a7dfd1f8d5ff7a5c53246c7534fe2332d6f4

 kernel/arch/xtensa/include/asm/tlb.h
..
..
@@ -14,32 +14,6 @@
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 #include <asm/cache.h>
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 #include <asm/page.h>
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-#if (DCACHE_WAY_SIZE <= PAGE_SIZE)
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-
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-/* Note, read http://lkml.org/lkml/2004/1/15/6 */
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-
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-# define tlb_start_vma(tlb,vma)			do { } while (0)
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-# define tlb_end_vma(tlb,vma)			do { } while (0)
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-
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-#else
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-
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-# define tlb_start_vma(tlb, vma)					      \
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-	do {								      \
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-		if (!tlb->fullmm)					      \
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-			flush_cache_range(vma, vma->vm_start, vma->vm_end);   \
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-	} while(0)
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-
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-# define tlb_end_vma(tlb, vma)						      \
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-	do {								      \
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-		if (!tlb->fullmm)					      \
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-			flush_tlb_range(vma, vma->vm_start, vma->vm_end);     \
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-	} while(0)
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-
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-#endif
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-
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-#define __tlb_remove_tlb_entry(tlb,pte,addr)	do { } while (0)
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-#define tlb_flush(tlb)				flush_tlb_mm((tlb)->mm)
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-
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 #include <asm-generic/tlb.h>
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 #define __pte_free_tlb(tlb, pte, address)	pte_free((tlb)->mm, pte)