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| 1 | +/* SPDX-License-Identifier: GPL-2.0-only */ |
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| 1 | 2 | /* |
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| 2 | 3 | * include/asm-xtensa/pgtable.h |
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| 3 | | - * |
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| 4 | | - * This program is free software; you can redistribute it and/or modify |
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| 5 | | - * it under the terms of the GNU General Public License version 2 as |
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| 6 | | - * published by the Free Software Foundation. |
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| 7 | 4 | * |
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| 8 | 5 | * Copyright (C) 2001 - 2013 Tensilica Inc. |
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| 9 | 6 | */ |
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| .. | .. |
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| 11 | 8 | #ifndef _XTENSA_PGTABLE_H |
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| 12 | 9 | #define _XTENSA_PGTABLE_H |
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| 13 | 10 | |
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| 14 | | -#define __ARCH_USE_5LEVEL_HACK |
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| 15 | 11 | #include <asm/page.h> |
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| 16 | 12 | #include <asm/kmem_layout.h> |
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| 17 | 13 | #include <asm-generic/pgtable-nopmd.h> |
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| .. | .. |
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| 73 | 69 | */ |
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| 74 | 70 | #define VMALLOC_START (XCHAL_KSEG_CACHED_VADDR - 0x10000000) |
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| 75 | 71 | #define VMALLOC_END (VMALLOC_START + 0x07FEFFFF) |
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| 76 | | -#define TLBTEMP_BASE_1 (VMALLOC_END + 1) |
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| 72 | +#define TLBTEMP_BASE_1 (VMALLOC_START + 0x08000000) |
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| 77 | 73 | #define TLBTEMP_BASE_2 (TLBTEMP_BASE_1 + DCACHE_WAY_SIZE) |
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| 78 | 74 | #if 2 * DCACHE_WAY_SIZE > ICACHE_WAY_SIZE |
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| 79 | 75 | #define TLBTEMP_SIZE (2 * DCACHE_WAY_SIZE) |
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| .. | .. |
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| 241 | 237 | # define swapper_pg_dir NULL |
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| 242 | 238 | static inline void paging_init(void) { } |
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| 243 | 239 | #endif |
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| 244 | | -static inline void pgtable_cache_init(void) { } |
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| 245 | 240 | |
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| 246 | 241 | /* |
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| 247 | 242 | * The pmd contains the kernel virtual address of the pte page. |
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| .. | .. |
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| 271 | 266 | static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITABLE; } |
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| 272 | 267 | static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; } |
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| 273 | 268 | static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } |
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| 274 | | -static inline int pte_special(pte_t pte) { return 0; } |
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| 275 | 269 | |
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| 276 | | -static inline pte_t pte_wrprotect(pte_t pte) |
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| 270 | +static inline pte_t pte_wrprotect(pte_t pte) |
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| 277 | 271 | { pte_val(pte) &= ~(_PAGE_WRITABLE | _PAGE_HW_WRITE); return pte; } |
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| 278 | 272 | static inline pte_t pte_mkclean(pte_t pte) |
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| 279 | 273 | { pte_val(pte) &= ~(_PAGE_DIRTY | _PAGE_HW_WRITE); return pte; } |
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| .. | .. |
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| 285 | 279 | { pte_val(pte) |= _PAGE_ACCESSED; return pte; } |
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| 286 | 280 | static inline pte_t pte_mkwrite(pte_t pte) |
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| 287 | 281 | { pte_val(pte) |= _PAGE_WRITABLE; return pte; } |
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| 288 | | -static inline pte_t pte_mkspecial(pte_t pte) |
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| 289 | | - { return pte; } |
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| 290 | 282 | |
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| 291 | 283 | #define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) & ~_PAGE_CA_MASK)) |
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| 292 | 284 | |
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| .. | .. |
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| 367 | 359 | update_pte(ptep, pte_wrprotect(pte)); |
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| 368 | 360 | } |
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| 369 | 361 | |
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| 370 | | -/* to find an entry in a kernel page-table-directory */ |
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| 371 | | -#define pgd_offset_k(address) pgd_offset(&init_mm, address) |
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| 372 | | - |
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| 373 | | -/* to find an entry in a page-table-directory */ |
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| 374 | | -#define pgd_offset(mm,address) ((mm)->pgd + pgd_index(address)) |
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| 375 | | - |
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| 376 | | -#define pgd_index(address) ((address) >> PGDIR_SHIFT) |
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| 377 | | - |
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| 378 | | -/* Find an entry in the second-level page table.. */ |
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| 379 | | -#define pmd_offset(dir,address) ((pmd_t*)(dir)) |
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| 380 | | - |
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| 381 | | -/* Find an entry in the third-level page table.. */ |
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| 382 | | -#define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) |
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| 383 | | -#define pte_offset_kernel(dir,addr) \ |
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| 384 | | - ((pte_t*) pmd_page_vaddr(*(dir)) + pte_index(addr)) |
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| 385 | | -#define pte_offset_map(dir,addr) pte_offset_kernel((dir),(addr)) |
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| 386 | | -#define pte_unmap(pte) do { } while (0) |
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| 387 | | - |
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| 388 | | - |
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| 389 | 362 | /* |
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| 390 | 363 | * Encode and decode a swap and file entry. |
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| 391 | 364 | */ |
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| .. | .. |
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| 448 | 421 | * SHM area cache aliasing for userland. |
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| 449 | 422 | */ |
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| 450 | 423 | #define HAVE_ARCH_UNMAPPED_AREA |
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| 451 | | - |
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| 452 | | -#include <asm-generic/pgtable.h> |
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| 453 | 424 | |
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| 454 | 425 | #endif /* _XTENSA_PGTABLE_H */ |
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