| .. | .. |
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| 12 | 12 | #include <linux/errno.h> |
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| 13 | 13 | #include <asm/facility.h> |
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| 14 | 14 | |
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| 15 | +asm(".include \"asm/cpu_mf-insn.h\"\n"); |
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| 16 | + |
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| 15 | 17 | #define CPU_MF_INT_SF_IAE (1 << 31) /* invalid entry address */ |
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| 16 | 18 | #define CPU_MF_INT_SF_ISE (1 << 30) /* incorrect SDBT entry */ |
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| 17 | 19 | #define CPU_MF_INT_SF_PRA (1 << 29) /* program request alert */ |
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| .. | .. |
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| 25 | 27 | #define CPU_MF_INT_SF_MASK (CPU_MF_INT_SF_IAE|CPU_MF_INT_SF_ISE| \ |
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| 26 | 28 | CPU_MF_INT_SF_PRA|CPU_MF_INT_SF_SACA| \ |
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| 27 | 29 | CPU_MF_INT_SF_LSDA) |
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| 30 | + |
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| 31 | +#define CPU_MF_SF_RIBM_NOTAV 0x1 /* Sampling unavailable */ |
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| 28 | 32 | |
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| 29 | 33 | /* CPU measurement facility support */ |
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| 30 | 34 | static inline int cpum_cf_avail(void) |
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| .. | .. |
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| 67 | 71 | unsigned long max_sampl_rate; /* 16-23: maximum sampling interval*/ |
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| 68 | 72 | unsigned long tear; /* 24-31: TEAR contents */ |
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| 69 | 73 | unsigned long dear; /* 32-39: DEAR contents */ |
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| 70 | | - unsigned int rsvrd0; /* 40-43: reserved */ |
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| 71 | | - unsigned int cpu_speed; /* 44-47: CPU speed */ |
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| 74 | + unsigned int rsvrd0:24; /* 40-42: reserved */ |
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| 75 | + unsigned int ribm:8; /* 43: Reserved by IBM */ |
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| 76 | + unsigned int cpu_speed; /* 44-47: CPU speed */ |
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| 72 | 77 | unsigned long long rsvrd1; /* 48-55: reserved */ |
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| 73 | 78 | unsigned long long rsvrd2; /* 56-63: reserved */ |
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| 74 | 79 | } __packed; |
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| .. | .. |
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| 87 | 92 | unsigned long tear; /* 16-23: TEAR contents */ |
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| 88 | 93 | unsigned long dear; /* 24-31: DEAR contents */ |
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| 89 | 94 | /* 32-63: */ |
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| 90 | | - unsigned long rsvrd1; /* reserved */ |
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| 91 | | - unsigned long rsvrd2; /* reserved */ |
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| 92 | | - unsigned long rsvrd3; /* reserved */ |
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| 93 | | - unsigned long rsvrd4; /* reserved */ |
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| 95 | + unsigned long rsvrd1; /* reserved */ |
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| 96 | + unsigned long rsvrd2; /* reserved */ |
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| 97 | + unsigned long rsvrd3; /* reserved */ |
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| 98 | + unsigned long rsvrd4; /* reserved */ |
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| 94 | 99 | } __packed; |
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| 95 | 100 | |
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| 96 | 101 | struct hws_basic_entry { |
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| .. | .. |
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| 209 | 214 | return cc; |
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| 210 | 215 | } |
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| 211 | 216 | |
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| 212 | | -/* Store CPU counter multiple for the MT utilization counter set */ |
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| 213 | | -static inline int stcctm5(u64 num, u64 *val) |
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| 217 | +/* Store CPU counter multiple for a particular counter set */ |
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| 218 | +enum stcctm_ctr_set { |
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| 219 | + EXTENDED = 0, |
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| 220 | + BASIC = 1, |
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| 221 | + PROBLEM_STATE = 2, |
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| 222 | + CRYPTO_ACTIVITY = 3, |
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| 223 | + MT_DIAG = 5, |
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| 224 | + MT_DIAG_CLEARING = 9, /* clears loss-of-MT-ctr-data alert */ |
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| 225 | +}; |
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| 226 | + |
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| 227 | +static __always_inline int stcctm(enum stcctm_ctr_set set, u64 range, u64 *dest) |
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| 214 | 228 | { |
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| 215 | 229 | int cc; |
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| 216 | 230 | |
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| 217 | 231 | asm volatile ( |
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| 218 | | - " .insn rsy,0xeb0000000017,%2,5,%1\n" |
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| 232 | + " STCCTM %2,%3,%1\n" |
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| 219 | 233 | " ipm %0\n" |
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| 220 | 234 | " srl %0,28\n" |
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| 221 | 235 | : "=d" (cc) |
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| 222 | | - : "Q" (*val), "d" (num) |
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| 236 | + : "Q" (*dest), "d" (range), "i" (set) |
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| 223 | 237 | : "cc", "memory"); |
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| 224 | 238 | return cc; |
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| 225 | 239 | } |
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| .. | .. |
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| 299 | 313 | return (unsigned long *) ret; |
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| 300 | 314 | } |
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| 301 | 315 | |
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| 302 | | -/* Return if the entry in the sample data block table (sdbt) |
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| 316 | +/* Return true if the entry in the sample data block table (sdbt) |
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| 303 | 317 | * is a link to the next sdbt */ |
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| 304 | 318 | static inline int is_link_entry(unsigned long *s) |
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| 305 | 319 | { |
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