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2023-12-11 1f93a7dfd1f8d5ff7a5c53246c7534fe2332d6f4

 kernel/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
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@@ -2,7 +2,7 @@
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 /*
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  * dts file for Xilinx ZynqMP ZCU106
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  *
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- * (C) Copyright 2016, Xilinx, Inc.
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+ * (C) Copyright 2016 - 2019, Xilinx, Inc.
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  *
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  * Michal Simek <michal.simek@xilinx.com>
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  */
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@@ -10,7 +10,7 @@
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 /dts-v1/;
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 #include "zynqmp.dtsi"
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-#include "zynqmp-clk.dtsi"
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+#include "zynqmp-clk-ccf.dtsi"
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 #include <dt-bindings/input/input.h>
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 #include <dt-bindings/gpio/gpio.h>
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@@ -46,7 +46,7 @@
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 			label = "sw19";
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 			gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
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 			linux,code = <KEY_DOWN>;
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-			gpio-key,wakeup;
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+			wakeup-source;
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 			autorepeat;
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 		};
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 	};
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@@ -58,6 +58,79 @@
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 			gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
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 			linux,default-trigger = "heartbeat";
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 		};
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+	};
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+
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+	ina226-u76 {
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+		compatible = "iio-hwmon";
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+		io-channels = <&u76 0>, <&u76 1>, <&u76 2>, <&u76 3>;
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+	};
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+	ina226-u77 {
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+		compatible = "iio-hwmon";
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+		io-channels = <&u77 0>, <&u77 1>, <&u77 2>, <&u77 3>;
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+	};
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+	ina226-u78 {
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+		compatible = "iio-hwmon";
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+		io-channels = <&u78 0>, <&u78 1>, <&u78 2>, <&u78 3>;
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+	};
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+	ina226-u87 {
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+		compatible = "iio-hwmon";
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+		io-channels = <&u87 0>, <&u87 1>, <&u87 2>, <&u87 3>;
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+	};
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+	ina226-u85 {
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+		compatible = "iio-hwmon";
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+		io-channels = <&u85 0>, <&u85 1>, <&u85 2>, <&u85 3>;
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+	};
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+	ina226-u86 {
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+		compatible = "iio-hwmon";
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+		io-channels = <&u86 0>, <&u86 1>, <&u86 2>, <&u86 3>;
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+	};
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+	ina226-u93 {
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+		compatible = "iio-hwmon";
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+		io-channels = <&u93 0>, <&u93 1>, <&u93 2>, <&u93 3>;
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+	};
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+	ina226-u88 {
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+		compatible = "iio-hwmon";
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+		io-channels = <&u88 0>, <&u88 1>, <&u88 2>, <&u88 3>;
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+	};
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+	ina226-u15 {
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+		compatible = "iio-hwmon";
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+		io-channels = <&u15 0>, <&u15 1>, <&u15 2>, <&u15 3>;
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+	};
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+	ina226-u92 {
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+		compatible = "iio-hwmon";
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+		io-channels = <&u92 0>, <&u92 1>, <&u92 2>, <&u92 3>;
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+	};
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+	ina226-u79 {
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+		compatible = "iio-hwmon";
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+		io-channels = <&u79 0>, <&u79 1>, <&u79 2>, <&u79 3>;
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+	};
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+	ina226-u81 {
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+		compatible = "iio-hwmon";
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+		io-channels = <&u81 0>, <&u81 1>, <&u81 2>, <&u81 3>;
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+	};
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+	ina226-u80 {
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+		compatible = "iio-hwmon";
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+		io-channels = <&u80 0>, <&u80 1>, <&u80 2>, <&u80 3>;
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+	};
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+	ina226-u84 {
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+		compatible = "iio-hwmon";
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+		io-channels = <&u84 0>, <&u84 1>, <&u84 2>, <&u84 3>;
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+	};
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+	ina226-u16 {
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+		compatible = "iio-hwmon";
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+		io-channels = <&u16 0>, <&u16 1>, <&u16 2>, <&u16 3>;
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+	};
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+	ina226-u65 {
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+		compatible = "iio-hwmon";
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+		io-channels = <&u65 0>, <&u65 1>, <&u65 2>, <&u65 3>;
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+	};
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+	ina226-u74 {
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+		compatible = "iio-hwmon";
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+		io-channels = <&u74 0>, <&u74 1>, <&u74 2>, <&u74 3>;
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+	};
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+	ina226-u75 {
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+		compatible = "iio-hwmon";
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+		io-channels = <&u75 0>, <&u75 1>, <&u75 2>, <&u75 3>;
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 	};
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 };
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@@ -106,11 +179,12 @@
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 	status = "okay";
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 	phy-handle = <&phy0>;
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 	phy-mode = "rgmii-id";
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-	phy0: phy@c {
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+	phy0: ethernet-phy@c {
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 		reg = <0xc>;
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 		ti,rx-internal-delay = <0x8>;
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 		ti,tx-internal-delay = <0xa>;
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 		ti,fifo-depth = <0x1>;
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+		ti,dp83867-rxctrl-strap-quirk;
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 	};
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 };
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@@ -176,53 +250,73 @@
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 			#size-cells = <0>;
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 			reg = <0>;
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 			/* PS_PMBUS */
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-			ina226@40 { /* u76 */
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+			u76: ina226@40 { /* u76 */
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 				compatible = "ti,ina226";
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+				#io-channel-cells = <1>;
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+				label = "ina226-u76";
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 				reg = <0x40>;
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 				shunt-resistor = <5000>;
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 			};
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-			ina226@41 { /* u77 */
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+			u77: ina226@41 { /* u77 */
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 				compatible = "ti,ina226";
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+				#io-channel-cells = <1>;
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+				label = "ina226-u77";
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 				reg = <0x41>;
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 				shunt-resistor = <5000>;
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 			};
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-			ina226@42 { /* u78 */
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+			u78: ina226@42 { /* u78 */
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 				compatible = "ti,ina226";
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+				#io-channel-cells = <1>;
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+				label = "ina226-u78";
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 				reg = <0x42>;
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 				shunt-resistor = <5000>;
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 			};
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-			ina226@43 { /* u87 */
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+			u87: ina226@43 { /* u87 */
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 				compatible = "ti,ina226";
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+				#io-channel-cells = <1>;
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+				label = "ina226-u87";
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 				reg = <0x43>;
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 				shunt-resistor = <5000>;
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 			};
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-			ina226@44 { /* u85 */
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+			u85: ina226@44 { /* u85 */
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 				compatible = "ti,ina226";
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+				#io-channel-cells = <1>;
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+				label = "ina226-u85";
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 				reg = <0x44>;
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 				shunt-resistor = <5000>;
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 			};
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-			ina226@45 { /* u86 */
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+			u86: ina226@45 { /* u86 */
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 				compatible = "ti,ina226";
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+				#io-channel-cells = <1>;
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+				label = "ina226-u86";
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 				reg = <0x45>;
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 				shunt-resistor = <5000>;
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 			};
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-			ina226@46 { /* u93 */
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+			u93: ina226@46 { /* u93 */
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 				compatible = "ti,ina226";
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+				#io-channel-cells = <1>;
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+				label = "ina226-u93";
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 				reg = <0x46>;
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 				shunt-resistor = <5000>;
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 			};
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-			ina226@47 { /* u88 */
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+			u88: ina226@47 { /* u88 */
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 				compatible = "ti,ina226";
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+				#io-channel-cells = <1>;
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+				label = "ina226-u88";
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 				reg = <0x47>;
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 				shunt-resistor = <5000>;
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 			};
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-			ina226@4a { /* u15 */
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+			u15: ina226@4a { /* u15 */
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 				compatible = "ti,ina226";
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+				#io-channel-cells = <1>;
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+				label = "ina226-u15";
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 				reg = <0x4a>;
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 				shunt-resistor = <5000>;
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 			};
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-			ina226@4b { /* u92 */
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+			u92: ina226@4b { /* u92 */
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 				compatible = "ti,ina226";
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+				#io-channel-cells = <1>;
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+				label = "ina226-u92";
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 				reg = <0x4b>;
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 				shunt-resistor = <5000>;
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 			};
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@@ -232,43 +326,59 @@
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 			#size-cells = <0>;
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 			reg = <1>;
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 			/* PL_PMBUS */
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-			ina226@40 { /* u79 */
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+			u79: ina226@40 { /* u79 */
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 				compatible = "ti,ina226";
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+				#io-channel-cells = <1>;
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+				label = "ina226-u79";
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 				reg = <0x40>;
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 				shunt-resistor = <2000>;
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 			};
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-			ina226@41 { /* u81 */
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+			u81: ina226@41 { /* u81 */
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 				compatible = "ti,ina226";
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+				#io-channel-cells = <1>;
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+				label = "ina226-u81";
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 				reg = <0x41>;
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 				shunt-resistor = <5000>;
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 			};
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-			ina226@42 { /* u80 */
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+			u80: ina226@42 { /* u80 */
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 				compatible = "ti,ina226";
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+				#io-channel-cells = <1>;
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+				label = "ina226-u80";
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 				reg = <0x42>;
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 				shunt-resistor = <5000>;
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 			};
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-			ina226@43 { /* u84 */
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+			u84: ina226@43 { /* u84 */
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 				compatible = "ti,ina226";
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+				#io-channel-cells = <1>;
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+				label = "ina226-u84";
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 				reg = <0x43>;
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 				shunt-resistor = <5000>;
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 			};
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-			ina226@44 { /* u16 */
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+			u16: ina226@44 { /* u16 */
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 				compatible = "ti,ina226";
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+				#io-channel-cells = <1>;
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+				label = "ina226-u16";
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 				reg = <0x44>;
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 				shunt-resistor = <5000>;
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 			};
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-			ina226@45 { /* u65 */
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+			u65: ina226@45 { /* u65 */
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 				compatible = "ti,ina226";
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+				#io-channel-cells = <1>;
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+				label = "ina226-u65";
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 				reg = <0x45>;
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 				shunt-resistor = <5000>;
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 			};
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-			ina226@46 { /* u74 */
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+			u74: ina226@46 { /* u74 */
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 				compatible = "ti,ina226";
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+				#io-channel-cells = <1>;
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+				label = "ina226-u74";
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 				reg = <0x46>;
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 				shunt-resistor = <5000>;
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 			};
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-			ina226@47 { /* u75 */
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+			u75: ina226@47 { /* u75 */
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 				compatible = "ti,ina226";
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+				#io-channel-cells = <1>;
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+				label = "ina226-u75";
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 				reg = <0x47>;
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 				shunt-resistor = <5000>;
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 			};
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@@ -387,6 +497,7 @@
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 				temperature-stability = <50>;
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 				factory-fout = <300000000>;
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 				clock-frequency = <300000000>;
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+				clock-output-names = "si570_user";
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 			};
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 		};
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 		i2c@3 {
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@@ -400,6 +511,7 @@
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 				temperature-stability = <50>; /* copy from zc702 */
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 				factory-fout = <156250000>;
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 				clock-frequency = <148500000>;
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+				clock-output-names = "si570_mgt";
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 			};
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 		};
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 		i2c@4 {
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@@ -513,6 +625,7 @@
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 /* ULPI SMSC USB3320 */
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 &usb0 {
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 	status = "okay";
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+	dr_mode = "host";
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 };
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 &watchdog0 {