forked from ~ljy/RK356X_SDK_RELEASE

hc
2023-12-11 1f93a7dfd1f8d5ff7a5c53246c7534fe2332d6f4
kernel/arch/arm64/boot/dts/rockchip/rk3568-evb1-ddr4-v10.dtsi
....@@ -8,6 +8,7 @@
88
99 #include <dt-bindings/gpio/gpio.h>
1010 #include <dt-bindings/pinctrl/rockchip.h>
11
+#include <dt-bindings/display/media-bus-format.h>
1112 #include "rk3568.dtsi"
1213 #include "rk3568-evb.dtsi"
1314
....@@ -17,7 +18,8 @@
1718
1819 rk_headset: rk-headset {
1920 compatible = "rockchip_headset";
20
- headset_gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
21
+ headset_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
22
+ spk_ctl_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;//AMP_SD_GPIO4_C2_3V3
2123 pinctrl-names = "default";
2224 pinctrl-0 = <&hp_det>;
2325 };
....@@ -82,7 +84,7 @@
8284 regulator-max-microvolt = <3300000>;
8385 vin-supply = <&vcc5v0_sys>;
8486 };
85
-
87
+#if 0
8688 vcc_camera: vcc-camera-regulator {
8789 compatible = "regulator-fixed";
8890 gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
....@@ -92,7 +94,174 @@
9294 enable-active-high;
9395 regulator-always-on;
9496 regulator-boot-on;
95
- };
97
+ };
98
+#endif
99
+ ndj_io_init {
100
+ compatible = "nk_io_control";
101
+ pinctrl-names = "default";
102
+ pinctrl-0 = <&nk_io_gpio>;
103
+
104
+ //gpio_op0 = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
105
+
106
+ vcc_5v {
107
+ gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
108
+ gpio_function = <0>;
109
+ };
110
+
111
+ vcc_12v {
112
+ gpio_num = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
113
+ gpio_function = <0>;
114
+ };
115
+
116
+ hub_host2_rst {
117
+ gpio_num = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
118
+ gpio_function = <3>;
119
+ };
120
+
121
+ hub_host3 {
122
+ gpio_num = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
123
+ gpio_function = <0>;
124
+ };
125
+
126
+ wake_4g {
127
+ gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; //4G_WAKEUP_GPIO01_B1_3V3
128
+ gpio_function = <0>;
129
+ };
130
+
131
+ air_mode_4g {
132
+ gpio_num = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; //4G_AIR_MODE_GPIO01_B0_3V3
133
+ gpio_function = <0>;
134
+ };
135
+
136
+ reset_4g {
137
+ gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>; //4G_RST_GPIO01_B2_3V3
138
+ gpio_function = <3>;
139
+ };
140
+
141
+ en_4g {
142
+ gpio_num = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
143
+ gpio_function = <0>;
144
+ };
145
+
146
+ hp_en {
147
+ gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
148
+ gpio_function = <0>;
149
+ };
150
+
151
+ usb_ogt {
152
+ gpio_num = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; //OTG_EN_OC_GPIO0_C2
153
+ gpio_function = <0>;
154
+ };
155
+
156
+ m2_wifi_pwr {
157
+ gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;//WIFI_PWREN_GPIO3_C6_1V8
158
+ gpio_function = <0>;
159
+ };
160
+
161
+
162
+ #if 0
163
+ do1 {
164
+ gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>;
165
+ gpio_function = <0>;
166
+ };
167
+
168
+ do2 {
169
+ gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
170
+ gpio_function = <0>;
171
+ };
172
+
173
+ do3 {
174
+ gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
175
+ gpio_function = <0>;
176
+ };
177
+
178
+ do4 {
179
+ gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
180
+ gpio_function = <0>;
181
+ };
182
+
183
+ do5 {
184
+ gpio_num = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>;
185
+ gpio_function = <0>;
186
+ };
187
+
188
+ do6 {
189
+ gpio_num = <&gpio2 RK_PD7 GPIO_ACTIVE_LOW>;
190
+ gpio_function = <0>;
191
+ };
192
+
193
+ do7 {
194
+ gpio_num = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>;
195
+ gpio_function = <0>;
196
+ };
197
+
198
+ di1 {
199
+ gpio_num = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
200
+ gpio_function = <1>;
201
+ };
202
+ #endif
203
+ };
204
+#if 0
205
+ nk_io_init {
206
+ compatible = "nk_io_control";
207
+// vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
208
+ hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
209
+ hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
210
+ vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
211
+ vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
212
+ en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
213
+ reset_4g_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //4G_RST_GPIO01_B2_3V3
214
+ air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3
215
+ wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3
216
+ hp_en_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
217
+// spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3
218
+ wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
219
+// pcie_power_en_gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;//PCIE_PWREN_H_GPIO0_D4
220
+ pinctrl-names = "default";
221
+ pinctrl-0 = <&nk_io_gpio>;
222
+ };
223
+#endif
224
+ panel: panel {
225
+ compatible = "simple-panel";
226
+ backlight = <&backlight>;
227
+ power-supply = <&vcc3v3_lcd0_n>;
228
+ enable-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD0_VDD_H_GPIO2_D4
229
+ edp-bl-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_PWBLK_H_GPIO0_B7
230
+ edp-bl-en = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
231
+ bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
232
+ bpc = <8>;
233
+ prepare-delay-ms = <200>;
234
+ enable-delay-ms = <20>;
235
+ lvds-gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2
236
+ lvds-gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3
237
+ lvds-gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4
238
+ lvds-gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5
239
+ nodka-lvds = <15>;
240
+
241
+ display-timings {
242
+ native-mode = <&timing>;
243
+ timing: timing {
244
+ clock-frequency = <72500000>;
245
+ hactive = <1280>;
246
+ vactive = <800>;
247
+ hfront-porch = <70>;
248
+ hsync-len = <2>;
249
+ hback-porch = <88>;
250
+ vfront-porch = <7>;
251
+ vsync-len = <4>;
252
+ vback-porch = <17>;
253
+ hsync-active = <21>;
254
+ vsync-active = <0>;
255
+ de-active = <0>;
256
+ pixelclk-active = <0>;
257
+ };
258
+ };
259
+ port {
260
+ panel_in_lvds: endpoint {
261
+ remote-endpoint = <&lvds_out>;
262
+ };
263
+ };
264
+ };
96265 };
97266
98267 &combphy0_us {
....@@ -108,11 +277,11 @@
108277 };
109278
110279 &csi2_dphy_hw {
111
- status = "okay";
280
+ status = "disabled";
112281 };
113282
114283 &csi2_dphy0 {
115
- status = "okay";
284
+ status = "disabled";
116285
117286 ports {
118287 #address-cells = <1>;
....@@ -155,8 +324,12 @@
155324 * video_phy0 needs to be enabled
156325 * when dsi0 is enabled
157326 */
327
+&video_phy0 {
328
+ status = "disabled";
329
+};
330
+
158331 &dsi0 {
159
- status = "okay";
332
+ status = "disabled";
160333 };
161334
162335 &dsi0_in_vp0 {
....@@ -164,7 +337,7 @@
164337 };
165338
166339 &dsi0_in_vp1 {
167
- status = "okay";
340
+ status = "disabled";
168341 };
169342
170343 &dsi0_panel {
....@@ -192,7 +365,30 @@
192365 };
193366
194367 &edp {
195
- hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
368
+ //hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
369
+ force-hpd;
370
+ status = "disabled";
371
+};
372
+
373
+&lvds {
374
+ status = "disabled";
375
+ ports {
376
+ port@1 {
377
+ reg = <1>;
378
+ lvds_out: endpoint {
379
+ remote-endpoint = <&panel_in_lvds>;
380
+ };
381
+ };
382
+
383
+ };
384
+};
385
+
386
+&route_lvds{
387
+ status = "disabled";
388
+ connect = <&vp2_out_lvds>;
389
+};
390
+
391
+&lvds_in_vp2 {
196392 status = "okay";
197393 };
198394
....@@ -201,18 +397,65 @@
201397 };
202398
203399 &edp_in_vp0 {
204
- status = "okay";
400
+ status = "disabled";
205401 };
206402
207403 &edp_in_vp1 {
404
+ status = "okay";
405
+
406
+};
407
+
408
+&route_edp {
409
+ status = "okay";
410
+ connect = <&vp1_out_edp>;
411
+};
412
+
413
+
414
+/*
415
+* edp_end
416
+*/
417
+
418
+/*
419
+* Hdmi_start
420
+*/
421
+
422
+&hdmi {
423
+ status = "okay";
424
+ rockchip,phy-table =
425
+ <92812500 0x8009 0x0000 0x0270>,
426
+ <165000000 0x800b 0x0000 0x026d>,
427
+ <185625000 0x800b 0x0000 0x01ed>,
428
+ <297000000 0x800b 0x0000 0x01ad>,
429
+ <594000000 0x8029 0x0000 0x0088>,
430
+ <000000000 0x0000 0x0000 0x0000>;
431
+};
432
+
433
+&route_hdmi {
434
+ status = "okay";
435
+ connect = <&vp0_out_hdmi>;
436
+};
437
+
438
+&hdmi_in_vp0 {
439
+ status = "okay";
440
+};
441
+
442
+&hdmi_in_vp1 {
208443 status = "disabled";
209444 };
445
+
446
+&hdmi_sound {
447
+ status = "okay";
448
+};
449
+
450
+/*
451
+ * Hdmi_END
452
+*/
210453
211454 &gmac0 {
212455 phy-mode = "rgmii";
213456 clock_in_out = "output";
214457
215
- snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
458
+ snps,reset-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
216459 snps,reset-active-low;
217460 /* Reset time is 20ms, 100ms for rtl8211f */
218461 snps,reset-delays-us = <0 20000 100000>;
....@@ -232,14 +475,16 @@
232475 rx_delay = <0x2f>;
233476
234477 phy-handle = <&rgmii_phy0>;
235
- status = "okay";
478
+
479
+ status = "disabled";
480
+
236481 };
237482
238483 &gmac1 {
239484 phy-mode = "rgmii";
240485 clock_in_out = "output";
241486
242
- snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
487
+ snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
243488 snps,reset-active-low;
244489 /* Reset time is 20ms, 100ms for rtl8211f */
245490 snps,reset-delays-us = <0 20000 100000>;
....@@ -266,12 +511,26 @@
266511 * power-supply should switche to vcc3v3_lcd1_n
267512 * when mipi panel is connected to dsi1.
268513 */
269
-&gt1x {
270
- power-supply = <&vcc3v3_lcd0_n>;
514
+
515
+
516
+&i2c3 {
517
+ status = "okay";
518
+ //mac eeprom
519
+ eeprom@51 {
520
+ //compatible = "atmel,24c02";
521
+ compatible = "atmel,24c256";
522
+ reg = <0x51>;
523
+ };
524
+
525
+ //nk-mcu
526
+ nkmcu@15 {
527
+ compatible = "nk_mcu";
528
+ reg = <0x15>;
529
+ };
271530 };
272531
273532 &i2c4 {
274
- status = "okay";
533
+ status = "disabled";
275534 gc8034: gc8034@37 {
276535 compatible = "galaxycore,gc8034";
277536 status = "okay";
....@@ -283,7 +542,6 @@
283542 reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
284543 pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;
285544 rockchip,grf = <&grf>;
286
- power-domains = <&power RK3568_PD_VI>;
287545 rockchip,camera-module-index = <0>;
288546 rockchip,camera-module-facing = "back";
289547 rockchip,camera-module-name = "RK-CMK-8M-2-v1";
....@@ -317,7 +575,7 @@
317575 };
318576 };
319577 ov5695: ov5695@36 {
320
- status = "okay";
578
+ status = "disabled";
321579 compatible = "ovti,ov5695";
322580 reg = <0x36>;
323581 clocks = <&cru CLK_CIF_OUT>;
....@@ -337,6 +595,19 @@
337595 data-lanes = <1 2>;
338596 };
339597 };
598
+ };
599
+};
600
+
601
+&i2c5 {
602
+ status = "okay";
603
+
604
+ hym8563: hym8563@51 {
605
+ compatible = "haoyu,hym8563";
606
+ reg = <0x51>;
607
+ #clock-cells = <0>;
608
+ clock-frequency = <32768>;
609
+ clock-output-names = "xin32k";
610
+ /* rtc_int is not connected */
340611 };
341612 };
342613
....@@ -373,42 +644,75 @@
373644 };
374645
375646 &pinctrl {
376
- cam {
377
- camera_pwr: camera-pwr {
378
- rockchip,pins =
379
- /* camera power en */
380
- <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
381
- };
382
- };
647
+// cam {
648
+// camera_pwr: camera-pwr {
649
+// rockchip,pins =
650
+// /* camera power en */
651
+// <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
652
+// };
653
+// };
383654 headphone {
384655 hp_det: hp-det {
385
- rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
656
+ rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>,
657
+ <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
386658 };
387659 };
388660
389661 wireless-wlan {
390662 wifi_host_wake_irq: wifi-host-wake-irq {
391
- rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
663
+ rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
392664 };
393665 };
394666
395667 wireless-bluetooth {
396
- uart8_gpios: uart8-gpios {
397
- rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
668
+ uart1_gpios: uart1-gpios {
669
+ rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
670
+ };
671
+ };
672
+
673
+ lcd1 {
674
+ lcd1_rst_gpio: lcd1-rst-gpio {
675
+ rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
676
+ };
677
+ };
678
+
679
+ nk_io_init{
680
+ nk_io_gpio: nk-io-gpio{
681
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
682
+ <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
683
+ <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
684
+ <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
685
+ <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
686
+ <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
687
+ <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
688
+ <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
689
+ <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
690
+ <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
691
+ <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
692
+ <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
693
+ <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
694
+ <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>,
695
+ <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
696
+ <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
697
+ <2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,//93 SPI2_CS0_M1_3V3
698
+ <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>,//94 SPI2_MOSI_M1_3V3
699
+ <2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>,//95 SPI2_MISO_M1_3V3
700
+ <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>,//96 SPI2_CLK_M1_3V3
701
+ <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
398702 };
399703 };
400704 };
401705
402706 &rkisp {
403
- status = "okay";
707
+ status = "disabled";
404708 };
405709
406710 &rkisp_mmu {
407
- status = "okay";
711
+ status = "disabled";
408712 };
409713
410714 &rkisp_vir0 {
411
- status = "okay";
715
+ status = "disabled";
412716
413717 port {
414718 #address-cells = <1>;
....@@ -421,34 +725,30 @@
421725 };
422726 };
423727
424
-&route_dsi0 {
425
- status = "okay";
426
- connect = <&vp1_out_dsi0>;
427
-};
428728
429
-&route_edp {
430
- status = "okay";
431
- connect = <&vp0_out_edp>;
432
-};
433729
434730 &sata2 {
435731 status = "okay";
436732 };
437733
438734 &sdmmc2 {
439
- max-frequency = <150000000>;
440
- supports-sdio;
441
- bus-width = <4>;
442
- disable-wp;
443
- cap-sd-highspeed;
444
- cap-sdio-irq;
445
- keep-power-in-suspend;
446
- mmc-pwrseq = <&sdio_pwrseq>;
447
- non-removable;
448
- pinctrl-names = "default";
449
- pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
450
- sd-uhs-sdr104;
451
- status = "okay";
735
+ status = "disabled";
736
+};
737
+
738
+&sdmmc1 {
739
+ max-frequency = <150000000>;
740
+ supports-sdio;
741
+ bus-width = <4>;
742
+ disable-wp;
743
+ cap-sd-highspeed;
744
+ cap-sdio-irq;
745
+ keep-power-in-suspend;
746
+ mmc-pwrseq = <&sdio_pwrseq>;
747
+ non-removable;
748
+ pinctrl-names = "default";
749
+ pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
750
+ sd-uhs-sdr104;
751
+ status = "okay";
452752 };
453753
454754 &spdif_8ch {
....@@ -458,25 +758,25 @@
458758 };
459759
460760 &uart8 {
461
- status = "okay";
761
+ status = "disabled";
462762 pinctrl-names = "default";
463763 pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>;
464764 };
465765
466766 &vcc3v3_lcd0_n {
467
- gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
767
+ gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
468768 enable-active-high;
469769 };
470770
471771 &vcc3v3_lcd1_n {
472
- gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
772
+ gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; //MIPI_3V3EN_GPIO3_A3_d_3V3
473773 enable-active-high;
474774 };
475775
476776 &wireless_wlan {
477777 pinctrl-names = "default";
478778 pinctrl-0 = <&wifi_host_wake_irq>;
479
- WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
779
+ WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
480780 };
481781
482782 &wireless_bluetooth {
....@@ -484,12 +784,47 @@
484784 clocks = <&rk809 1>;
485785 clock-names = "ext_clock";
486786 //wifi-bt-power-toggle;
487
- uart_rts_gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
787
+ uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
488788 pinctrl-names = "default", "rts_gpio";
489
- pinctrl-0 = <&uart8m0_rtsn>;
490
- pinctrl-1 = <&uart8_gpios>;
491
- BT,reset_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
492
- BT,wake_gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
493
- BT,wake_host_irq = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
789
+ pinctrl-0 = <&uart1m0_rtsn>;
790
+ pinctrl-1 = <&uart1_gpios>;
791
+ BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
792
+ BT,wake_gpio = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
793
+ BT,wake_host_irq = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
494794 status = "okay";
495795 };
796
+
797
+&uart0 {
798
+ status = "disabled";
799
+};
800
+
801
+&uart1 {
802
+ pinctrl-names = "default";
803
+ pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
804
+ status = "disabled";
805
+};
806
+
807
+&uart3 {
808
+ status = "okay";
809
+ pinctrl-0 = <&uart3m1_xfer>;
810
+};
811
+
812
+&uart4 {
813
+ status = "okay";
814
+ pinctrl-0 = <&uart4m1_xfer>;
815
+};
816
+
817
+&uart5 {
818
+ status = "okay";
819
+ pinctrl-0 = <&uart5m1_xfer>;
820
+};
821
+
822
+&uart7 {
823
+ status = "disabled";
824
+ pinctrl-0 = <&uart7m1_xfer>;
825
+};
826
+
827
+&uart9 {
828
+ status = "disabled";
829
+ pinctrl-0 = <&uart9m1_xfer>;
830
+};