add audio

hc

2023-12-11 1f93a7dfd1f8d5ff7a5c53246c7534fe2332d6f4

 kernel/arch/arm64/boot/dts/rockchip/rk3568-evb1-ddr4-v10.dtsi
..
..
@@ -8,12 +8,21 @@
8
8
 
9
9
 #include <dt-bindings/gpio/gpio.h>
10
10
 #include <dt-bindings/pinctrl/rockchip.h>
11
+#include <dt-bindings/display/media-bus-format.h>
11
12
 #include "rk3568.dtsi"
12
13
 #include "rk3568-evb.dtsi"
13
14
 
14
15
 / {
15
16
 	model = "Rockchip RK3568 EVB1 DDR4 V10 Board";
16
17
 	compatible = "rockchip,rk3568-evb1-ddr4-v10", "rockchip,rk3568";
18
+
19
+	rk_headset: rk-headset {
20
+		compatible = "rockchip_headset";
21
+		headset_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
22
+		spk_ctl_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;//AMP_SD_GPIO4_C2_3V3
23
+		pinctrl-names = "default";
24
+		pinctrl-0 = <&hp_det>;
25
+	};
17
26
 
18
27
 	vcc2v5_sys: vcc2v5-ddr {
19
28
 		compatible = "regulator-fixed";
..
..
@@ -85,9 +94,8 @@
85
94
 		enable-active-high;
86
95
 		regulator-always-on;
87
96
 		regulator-boot-on;
88
-	};
97
+    	};
89
98
 #endif
90
-
91
99
 	ndj_io_init {
92
100
          	compatible = "nk_io_control";	
93
101
 			pinctrl-names = "default";
..
..
@@ -140,10 +148,17 @@
140
148
 				gpio_function = <0>;
141
149
 			};
142
150
 			
143
-			wifi_power_en {
144
-				gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
151
+			usb_ogt {
152
+				gpio_num = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; //OTG_EN_OC_GPIO0_C2
145
153
 				gpio_function = <0>;
146
154
 			};
155
+			
156
+			m2_wifi_pwr {
157
+				gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;//WIFI_PWREN_GPIO3_C6_1V8
158
+				gpio_function = <0>;
159
+			};
160
+			
161
+			 
147
162
 	#if 0		
148
163
 			do1 {
149
164
 				gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>; 
..
..
@@ -185,7 +200,68 @@
185
200
 				gpio_function = <1>;
186
201
 			};
187
202
 	#endif
188
-};
203
+		};
204
+#if 0			
205
+	    nk_io_init {
206
+                compatible = "nk_io_control";
207
+//				vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
208
+                hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
209
+                hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
210
+                vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;   //VCC5_IO_EN_GPIO1_A4_3V3
211
+                vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
212
+                en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
213
+                reset_4g_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //4G_RST_GPIO01_B2_3V3
214
+                air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3
215
+                wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3
216
+				hp_en_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
217
+//              spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3			
218
+				wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
219
+//				pcie_power_en_gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;//PCIE_PWREN_H_GPIO0_D4				
220
+				pinctrl-names = "default";
221
+				pinctrl-0 = <&nk_io_gpio>;				
222
+        };
223
+#endif	
224
+		panel: panel {
225
+				compatible = "simple-panel";
226
+				backlight = <&backlight>;
227
+				power-supply = <&vcc3v3_lcd0_n>;
228
+				enable-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD0_VDD_H_GPIO2_D4				
229
+				edp-bl-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;  //LCD0_PWBLK_H_GPIO0_B7
230
+				edp-bl-en = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
231
+				bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
232
+				bpc = <8>;
233
+				prepare-delay-ms = <200>;
234
+				enable-delay-ms = <20>;
235
+				lvds-gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2 
236
+				lvds-gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3 
237
+				lvds-gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4 
238
+				lvds-gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5
239
+				nodka-lvds = <15>;
240
+
241
+				display-timings {
242
+                native-mode = <&timing>;
243
+                timing: timing {
244
+					clock-frequency = <72500000>;
245
+					hactive = <1280>;
246
+					vactive = <800>;
247
+					hfront-porch = <70>;
248
+					hsync-len = <2>;
249
+					hback-porch = <88>;
250
+					vfront-porch = <7>;
251
+					vsync-len = <4>;
252
+					vback-porch = <17>;
253
+					hsync-active = <21>;
254
+					vsync-active = <0>;
255
+					de-active = <0>;
256
+					pixelclk-active = <0>;			
257
+					};
258
+				};
259
+				port {
260
+					panel_in_lvds: endpoint {
261
+					remote-endpoint = <&lvds_out>;
262
+						};
263
+					};   
264
+				};
189
265
 };
190
266
 
191
267
 &combphy0_us {
..
..
@@ -248,6 +324,10 @@
248
324
  * video_phy0 needs to be enabled
249
325
  * when dsi0 is enabled
250
326
  */
327
+&video_phy0 {
328
+	status = "disabled";
329
+};
330
+
251
331
 &dsi0 {
252
332
 	status = "disabled";
253
333
 };
..
..
@@ -285,7 +365,30 @@
285
365
 };
286
366
 
287
367
 &edp {
288
-	hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
368
+	//hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;	
369
+    force-hpd;
370
+    status = "disabled";
371
+};
372
+
373
+&lvds {
374
+    status = "disabled";
375
+    ports {
376
+        port@1 {
377
+            reg = <1>;
378
+            lvds_out: endpoint {
379
+                remote-endpoint = <&panel_in_lvds>;
380
+            };
381
+        };
382
+   
383
+	};
384
+};
385
+
386
+&route_lvds{
387
+	 status = "disabled";
388
+	 connect = <&vp2_out_lvds>;
389
+};
390
+
391
+&lvds_in_vp2 {
289
392
 	status = "okay";
290
393
 };
291
394
 
..
..
@@ -294,18 +397,65 @@
294
397
 };
295
398
 
296
399
 &edp_in_vp0 {
297
-	status = "okay";
400
+    status = "disabled";
298
401
 };
299
402
 
300
403
 &edp_in_vp1 {
404
+    status = "okay";
405
+
406
+};
407
+
408
+&route_edp {
409
+    status = "okay";
410
+    connect = <&vp1_out_edp>;
411
+};
412
+
413
+
414
+/*
415
+*  edp_end
416
+*/
417
+
418
+/*
419
+*  Hdmi_start
420
+*/
421
+
422
+&hdmi {
423
+	status = "okay";
424
+	rockchip,phy-table =
425
+		<92812500  0x8009 0x0000 0x0270>,
426
+		<165000000 0x800b 0x0000 0x026d>,
427
+		<185625000 0x800b 0x0000 0x01ed>,
428
+		<297000000 0x800b 0x0000 0x01ad>,
429
+		<594000000 0x8029 0x0000 0x0088>,
430
+		<000000000 0x0000 0x0000 0x0000>;
431
+};
432
+
433
+&route_hdmi {
434
+	status = "okay";
435
+	connect = <&vp0_out_hdmi>;
436
+};
437
+
438
+&hdmi_in_vp0 {
439
+	status = "okay";
440
+};
441
+
442
+&hdmi_in_vp1 {
301
443
 	status = "disabled";
302
444
 };
445
+
446
+&hdmi_sound {
447
+	status = "okay";
448
+};
449
+
450
+/*
451
+ *  Hdmi_END
452
+*/
303
453
 
304
454
 &gmac0 {
305
455
 	phy-mode = "rgmii";
306
456
 	clock_in_out = "output";
307
457
 
308
-	snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
458
+	snps,reset-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
309
459
 	snps,reset-active-low;
310
460
 	/* Reset time is 20ms, 100ms for rtl8211f */
311
461
 	snps,reset-delays-us = <0 20000 100000>;
..
..
@@ -325,7 +475,9 @@
325
475
 	rx_delay = <0x2f>;
326
476
 
327
477
 	phy-handle = <&rgmii_phy0>;
478
+	
328
479
 	status = "disabled";
480
+	
329
481
 };
330
482
 
331
483
 &gmac1 {
..
..
@@ -359,8 +511,22 @@
359
511
  * power-supply should switche to vcc3v3_lcd1_n
360
512
  * when mipi panel is connected to dsi1.
361
513
  */
362
-&gt1x {
363
-	power-supply = <&vcc3v3_lcd0_n>;
514
+
515
+
516
+&i2c3 {
517
+	status = "okay";
518
+       //mac eeprom
519
+        eeprom@51 {
520
+                //compatible = "atmel,24c02";
521
+                compatible = "atmel,24c256";
522
+                reg = <0x51>;
523
+        };
524
+	
525
+	  //nk-mcu
526
+        nkmcu@15 {
527
+                compatible = "nk_mcu";
528
+                reg = <0x15>;
529
+        };
364
530
 };
365
531
 
366
532
 &i2c4 {
..
..
@@ -376,7 +542,6 @@
376
542
 		reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
377
543
 		pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;
378
544
 		rockchip,grf = <&grf>;
379
-		power-domains = <&power RK3568_PD_VI>;
380
545
 		rockchip,camera-module-index = <0>;
381
546
 		rockchip,camera-module-facing = "back";
382
547
 		rockchip,camera-module-name = "RK-CMK-8M-2-v1";
..
..
@@ -433,6 +598,19 @@
433
598
 	};
434
599
 };
435
600
 
601
+&i2c5 {
602
+	status = "okay";
603
+
604
+	hym8563: hym8563@51 {
605
+		compatible = "haoyu,hym8563";
606
+		reg = <0x51>;
607
+		#clock-cells = <0>;
608
+		clock-frequency = <32768>;
609
+		clock-output-names = "xin32k";
610
+		/* rtc_int is not connected */
611
+	};
612
+};
613
+
436
614
 &mdio0 {
437
615
 	rgmii_phy0: phy@0 {
438
616
 		compatible = "ethernet-phy-ieee802.3-c22";
..
..
@@ -448,7 +626,7 @@
448
626
 };
449
627
 
450
628
 &video_phy0 {
451
-	status = "disabled";
629
+	status = "okay";
452
630
 };
453
631
 
454
632
 &video_phy1 {
..
..
@@ -466,31 +644,38 @@
466
644
 };
467
645
 
468
646
 &pinctrl {
469
-	cam {
470
-		camera_pwr: camera-pwr {
471
-			rockchip,pins =
472
-				/* camera power en */
473
-				<0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
474
-		};
475
-	};
647
+//	cam {
648
+//		camera_pwr: camera-pwr {
649
+//			rockchip,pins =
650
+//				/* camera power en */
651
+//				<0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
652
+//		};
653
+//	};
476
654
 	headphone {
477
655
 		hp_det: hp-det {
478
-			rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
656
+			rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>,
657
+							<4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
479
658
 		};
480
659
 	};
481
660
 
482
661
 	wireless-wlan {
483
662
 		wifi_host_wake_irq: wifi-host-wake-irq {
484
-			rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
663
+			rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
485
664
 		};
486
665
 	};
487
666
 
488
667
 	wireless-bluetooth {
489
-		uart8_gpios: uart8-gpios {
490
-			rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
668
+		uart1_gpios: uart1-gpios {
669
+			rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
491
670
 		};
492
671
 	};
493
672
 	
673
+	lcd1 {
674
+        lcd1_rst_gpio: lcd1-rst-gpio {
675
+            rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
676
+        };
677
+    };
678
+		
494
679
 	nk_io_init{
495
680
 		nk_io_gpio: nk-io-gpio{
496
681
 			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
..
..
@@ -500,7 +685,7 @@
500
685
 							<4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
501
686
 							<1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
502
687
 							<0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
503
-							<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, 
688
+							<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
504
689
 							<1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
505
690
 							<1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
506
691
 							<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
..
..
@@ -518,10 +703,6 @@
518
703
 	};
519
704
 };
520
705
 
521
-&rk809_sound {
522
-	hp-det-gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
523
-};
524
-
525
706
 &rkisp {
526
707
 	status = "disabled";
527
708
 };
..
..
@@ -531,7 +712,7 @@
531
712
 };
532
713
 
533
714
 &rkisp_vir0 {
534
-	status = "okay";
715
+	status = "disabled";
535
716
 
536
717
 	port {
537
718
 		#address-cells = <1>;
..
..
@@ -544,34 +725,30 @@
544
725
 	};
545
726
 };
546
727
 
547
-&route_dsi0 {
548
-	status = "disabled";
549
-	connect = <&vp1_out_dsi0>;
550
-};
551
728
 
552
-&route_edp {
553
-	status = "okay";
554
-	connect = <&vp0_out_edp>;
555
-};
556
729
 
557
730
 &sata2 {
558
731
 	status = "okay";
559
732
 };
560
733
 
561
734
 &sdmmc2 {
562
-	max-frequency = <150000000>;
563
-	supports-sdio;
564
-	bus-width = <4>;
565
-	disable-wp;
566
-	cap-sd-highspeed;
567
-	cap-sdio-irq;
568
-	keep-power-in-suspend;
569
-	mmc-pwrseq = <&sdio_pwrseq>;
570
-	non-removable;
571
-	pinctrl-names = "default";
572
-	pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
573
-	sd-uhs-sdr104;
574
-	status = "okay";
735
+        status = "disabled";
736
+};
737
+
738
+&sdmmc1 {
739
+        max-frequency = <150000000>;
740
+        supports-sdio;
741
+        bus-width = <4>;
742
+        disable-wp;
743
+        cap-sd-highspeed;
744
+        cap-sdio-irq;
745
+        keep-power-in-suspend;
746
+        mmc-pwrseq = <&sdio_pwrseq>;
747
+        non-removable;
748
+        pinctrl-names = "default";
749
+        pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
750
+        sd-uhs-sdr104;
751
+        status = "okay";
575
752
 };
576
753
 
577
754
 &spdif_8ch {
..
..
@@ -581,25 +758,25 @@
581
758
 };
582
759
 
583
760
 &uart8 {
584
-	status = "okay";
761
+	status = "disabled";
585
762
 	pinctrl-names = "default";
586
763
 	pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>;
587
764
 };
588
765
 
589
766
 &vcc3v3_lcd0_n {
590
-	gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
767
+	gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; 
591
768
 	enable-active-high;
592
769
 };
593
770
 
594
771
 &vcc3v3_lcd1_n {
595
-	gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
772
+	gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; //MIPI_3V3EN_GPIO3_A3_d_3V3
596
773
 	enable-active-high;
597
774
 };
598
775
 
599
776
 &wireless_wlan {
600
777
 	pinctrl-names = "default";
601
778
 	pinctrl-0 = <&wifi_host_wake_irq>;
602
-	WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
779
+	WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
603
780
 };
604
781
 
605
782
 &wireless_bluetooth {
..
..
@@ -607,12 +784,47 @@
607
784
 	clocks = <&rk809 1>;
608
785
 	clock-names = "ext_clock";
609
786
 	//wifi-bt-power-toggle;
610
-	uart_rts_gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
787
+	uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
611
788
 	pinctrl-names = "default", "rts_gpio";
612
-	pinctrl-0 = <&uart8m0_rtsn>;
613
-	pinctrl-1 = <&uart8_gpios>;
614
-	BT,reset_gpio    = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
615
-	BT,wake_gpio     = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
616
-	BT,wake_host_irq = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
789
+	pinctrl-0 = <&uart1m0_rtsn>;
790
+	pinctrl-1 = <&uart1_gpios>;
791
+	BT,reset_gpio    = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
792
+    BT,wake_gpio     = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
793
+    BT,wake_host_irq = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
617
794
 	status = "okay";
618
795
 };
796
+
797
+&uart0 {
798
+	status = "disabled";
799
+};
800
+
801
+&uart1 {	
802
+	pinctrl-names = "default";	
803
+	pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;	
804
+	status = "disabled";		
805
+};
806
+
807
+&uart3 {
808
+	status = "okay";
809
+	pinctrl-0 = <&uart3m1_xfer>;
810
+};
811
+
812
+&uart4 {
813
+	status = "okay";
814
+	pinctrl-0 = <&uart4m1_xfer>;
815
+};
816
+
817
+&uart5 {
818
+	status = "okay";
819
+	pinctrl-0 = <&uart5m1_xfer>;
820
+};
821
+
822
+&uart7 {
823
+	status = "disabled";
824
+	pinctrl-0 = <&uart7m1_xfer>;
825
+};
826
+
827
+&uart9 {
828
+	status = "disabled";
829
+	pinctrl-0 = <&uart9m1_xfer>;
830
+};