.. | .. |
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67 | 67 | }; |
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68 | 68 | |
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69 | 69 | &csi2_dphy_hw { |
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70 | | - status = "disabled"; |
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| 70 | + status = "okay"; |
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71 | 71 | }; |
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72 | 72 | |
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73 | 73 | &csi2_dphy1 { |
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74 | | - status = "disabled"; |
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| 74 | + status = "okay"; |
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75 | 75 | |
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76 | 76 | /* |
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77 | 77 | * dphy1 only used for split mode, |
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.. | .. |
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108 | 108 | }; |
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109 | 109 | |
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110 | 110 | &csi2_dphy2 { |
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111 | | - status = "disabled"; |
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| 111 | + status = "okay"; |
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112 | 112 | |
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113 | 113 | /* |
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114 | 114 | * dphy2 only used for split mode, |
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.. | .. |
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160 | 160 | * when dsi0 is enabled |
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161 | 161 | */ |
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162 | 162 | &dsi0 { |
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163 | | - status = "disabled"; |
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| 163 | + status = "okay"; |
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164 | 164 | }; |
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165 | 165 | |
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166 | 166 | &dsi0_in_vp0 { |
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.. | .. |
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168 | 168 | }; |
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169 | 169 | |
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170 | 170 | &dsi0_in_vp1 { |
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171 | | - status = "disabled"; |
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| 171 | + status = "okay"; |
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172 | 172 | }; |
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173 | 173 | |
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174 | 174 | &dsi0_panel { |
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.. | .. |
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216 | 216 | |
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217 | 217 | &edp_in_vp1 { |
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218 | 218 | status = "disabled"; |
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219 | | -}; |
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220 | | - |
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221 | | -&gmac1 { |
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222 | | - phy-mode = "rgmii"; |
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223 | | - clock_in_out = "output"; |
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224 | | - |
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225 | | - snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; |
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226 | | - snps,reset-active-low; |
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227 | | - /* Reset time is 20ms, 100ms for rtl8211f */ |
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228 | | - snps,reset-delays-us = <0 20000 100000>; |
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229 | | - |
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230 | | - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; |
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231 | | - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; |
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232 | | - assigned-clock-rates = <0>, <125000000>; |
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233 | | - |
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234 | | - pinctrl-names = "default"; |
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235 | | - pinctrl-0 = <&gmac1m1_miim |
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236 | | - &gmac1m1_tx_bus2 |
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237 | | - &gmac1m1_rx_bus2 |
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238 | | - &gmac1m1_rgmii_clk |
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239 | | - &gmac1m1_rgmii_bus>; |
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240 | | - |
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241 | | - tx_delay = <0x4f>; |
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242 | | - rx_delay = <0x26>; |
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243 | | - |
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244 | | - phy-handle = <&rgmii_phy1>; |
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245 | | - status = "okay"; |
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246 | 219 | }; |
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247 | 220 | |
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248 | 221 | /* |
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.. | .. |
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351 | 324 | }; |
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352 | 325 | |
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353 | 326 | &video_phy0 { |
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354 | | - status = "disabled"; |
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| 327 | + status = "okay"; |
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355 | 328 | }; |
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356 | 329 | |
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357 | 330 | &video_phy1 { |
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.. | .. |
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401 | 374 | }; |
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402 | 375 | |
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403 | 376 | &rkisp { |
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404 | | - status = "disabled"; |
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| 377 | + status = "okay"; |
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405 | 378 | }; |
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406 | 379 | |
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407 | 380 | &rkisp_mmu { |
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408 | | - status = "disabled"; |
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| 381 | + status = "okay"; |
---|
409 | 382 | }; |
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410 | 383 | |
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411 | 384 | &rkisp_vir0 { |
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412 | | - status = "disabled"; |
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| 385 | + status = "okay"; |
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413 | 386 | |
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414 | 387 | port { |
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415 | 388 | #address-cells = <1>; |
---|
.. | .. |
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423 | 396 | }; |
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424 | 397 | |
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425 | 398 | &route_dsi0 { |
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426 | | - status = "disabled"; |
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| 399 | + status = "okay"; |
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427 | 400 | connect = <&vp1_out_dsi0>; |
---|
428 | 401 | }; |
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429 | 402 | |
---|
430 | 403 | &sdmmc2 { |
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431 | 404 | max-frequency = <150000000>; |
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432 | | - supports-sdio; |
---|
| 405 | + no-sd; |
---|
| 406 | + no-mmc; |
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433 | 407 | bus-width = <4>; |
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434 | 408 | disable-wp; |
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435 | 409 | cap-sd-highspeed; |
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