hc
2023-12-11 1f93a7dfd1f8d5ff7a5c53246c7534fe2332d6f4
kernel/arch/arm64/boot/dts/rockchip/rk3399pro.dtsi
....@@ -1,111 +1,22 @@
11 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
-// Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
2
+// Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
33
44 #include "rk3399.dtsi"
55
66 / {
77 compatible = "rockchip,rk3399pro";
8
-
9
- xin32k: xin32k {
10
- compatible = "fixed-clock";
11
- clock-frequency = <32768>;
12
- clock-output-names = "xin32k";
13
- #clock-cells = <0>;
14
- };
158 };
169
17
-&dfi {
18
- status = "okay";
19
-};
20
-
21
-&dmc {
22
- status = "okay";
23
- center-supply = <&vdd_log>;
24
- upthreshold = <40>;
25
- downdifferential = <20>;
26
- system-status-freq = <
27
- /*system status freq(KHz)*/
28
- SYS_STATUS_NORMAL 800000
29
- SYS_STATUS_REBOOT 528000
30
- SYS_STATUS_SUSPEND 200000
31
- SYS_STATUS_VIDEO_1080P 200000
32
- SYS_STATUS_VIDEO_4K 600000
33
- SYS_STATUS_VIDEO_4K_10B 800000
34
- SYS_STATUS_PERFORMANCE 800000
35
- SYS_STATUS_BOOST 400000
36
- SYS_STATUS_DUALVIEW 600000
37
- SYS_STATUS_ISP 600000
38
- >;
39
- vop-pn-msch-readlatency = <
40
- /* plane_number readlatency */
41
- 0 0
42
- 4 0x20
43
- >;
44
- vop-bw-dmc-freq = <
45
- /* min_bw(MB/s) max_bw(MB/s) freq(KHz) */
46
- 0 762 200000
47
- 763 1893 400000
48
- 1894 3012 528000
49
- 3013 99999 800000
50
- >;
51
- auto-min-freq = <200000>;
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-};
53
-
54
-&emmc_phy {
55
- status = "okay";
56
-};
57
-
10
+/* Default to enabled since AP talk to NPU part over pcie */
5811 &pcie_phy {
5912 status = "okay";
6013 };
6114
15
+/* Default to enabled since AP talk to NPU part over pcie */
6216 &pcie0 {
6317 ep-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
6418 num-lanes = <4>;
6519 pinctrl-names = "default";
6620 pinctrl-0 = <&pcie_clkreqn_cpm>;
67
- status = "okay";
68
-};
69
-
70
-&sdhci {
71
- bus-width = <8>;
72
- mmc-hs400-1_8v;
73
- supports-emmc;
74
- non-removable;
75
- keep-power-in-suspend;
76
- mmc-hs400-enhanced-strobe;
77
- status = "okay";
78
-};
79
-
80
-&sdio0 {
81
- clock-frequency = <150000000>;
82
- clock-freq-min-max = <200000 150000000>;
83
- supports-sdio;
84
- bus-width = <4>;
85
- disable-wp;
86
- cap-sd-highspeed;
87
- cap-sdio-irq;
88
- keep-power-in-suspend;
89
- mmc-pwrseq = <&sdio_pwrseq>;
90
- non-removable;
91
- num-slots = <1>;
92
- pinctrl-names = "default";
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- pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
94
- sd-uhs-sdr104;
95
- status = "okay";
96
-};
97
-
98
-&sdmmc {
99
- clock-frequency = <150000000>;
100
- clock-freq-min-max = <400000 150000000>;
101
- supports-sd;
102
- bus-width = <4>;
103
- cap-mmc-highspeed;
104
- cap-sd-highspeed;
105
- disable-wp;
106
- num-slots = <1>;
107
- vqmmc-supply = <&vccio_sd>;
108
- pinctrl-names = "default";
109
- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
11021 status = "okay";
11122 };