.. | .. |
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1 | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
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2 | 2 | /* |
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3 | | - * Device Tree Include file for Freescale Layerscape-1046A family SoC. |
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| 3 | + * Device Tree Include file for NXP Layerscape-1046A family SoC. |
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4 | 4 | * |
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5 | 5 | * Copyright 2016 Freescale Semiconductor, Inc. |
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| 6 | + * Copyright 2018, 2020 NXP |
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6 | 7 | * |
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7 | 8 | * Mingkai Hu <mingkai.hu@nxp.com> |
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8 | 9 | */ |
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.. | .. |
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27 | 28 | ethernet5 = &enet5; |
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28 | 29 | ethernet6 = &enet6; |
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29 | 30 | ethernet7 = &enet7; |
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| 31 | + rtc1 = &ftm_alarm0; |
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30 | 32 | }; |
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31 | 33 | |
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32 | 34 | cpus { |
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.. | .. |
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116 | 118 | }; |
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117 | 119 | |
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118 | 120 | thermal-zones { |
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119 | | - cpu_thermal: cpu-thermal { |
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| 121 | + ddr-controller { |
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120 | 122 | polling-delay-passive = <1000>; |
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121 | 123 | polling-delay = <5000>; |
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122 | | - thermal-sensors = <&tmu 3>; |
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| 124 | + thermal-sensors = <&tmu 0>; |
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123 | 125 | |
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124 | 126 | trips { |
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125 | | - cpu_alert: cpu-alert { |
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| 127 | + ddr-ctrler-alert { |
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126 | 128 | temperature = <85000>; |
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127 | 129 | hysteresis = <2000>; |
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128 | 130 | type = "passive"; |
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129 | 131 | }; |
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130 | 132 | |
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131 | | - cpu_crit: cpu-crit { |
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| 133 | + ddr-ctrler-crit { |
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| 134 | + temperature = <95000>; |
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| 135 | + hysteresis = <2000>; |
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| 136 | + type = "critical"; |
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| 137 | + }; |
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| 138 | + }; |
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| 139 | + }; |
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| 140 | + |
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| 141 | + serdes { |
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| 142 | + polling-delay-passive = <1000>; |
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| 143 | + polling-delay = <5000>; |
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| 144 | + thermal-sensors = <&tmu 1>; |
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| 145 | + |
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| 146 | + trips { |
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| 147 | + serdes-alert { |
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| 148 | + temperature = <85000>; |
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| 149 | + hysteresis = <2000>; |
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| 150 | + type = "passive"; |
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| 151 | + }; |
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| 152 | + |
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| 153 | + serdes-crit { |
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| 154 | + temperature = <95000>; |
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| 155 | + hysteresis = <2000>; |
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| 156 | + type = "critical"; |
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| 157 | + }; |
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| 158 | + }; |
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| 159 | + }; |
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| 160 | + |
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| 161 | + fman { |
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| 162 | + polling-delay-passive = <1000>; |
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| 163 | + polling-delay = <5000>; |
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| 164 | + thermal-sensors = <&tmu 2>; |
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| 165 | + |
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| 166 | + trips { |
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| 167 | + fman-alert { |
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| 168 | + temperature = <85000>; |
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| 169 | + hysteresis = <2000>; |
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| 170 | + type = "passive"; |
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| 171 | + }; |
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| 172 | + |
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| 173 | + fman-crit { |
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| 174 | + temperature = <95000>; |
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| 175 | + hysteresis = <2000>; |
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| 176 | + type = "critical"; |
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| 177 | + }; |
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| 178 | + }; |
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| 179 | + }; |
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| 180 | + |
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| 181 | + core-cluster { |
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| 182 | + polling-delay-passive = <1000>; |
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| 183 | + polling-delay = <5000>; |
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| 184 | + thermal-sensors = <&tmu 3>; |
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| 185 | + |
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| 186 | + trips { |
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| 187 | + core_cluster_alert: core-cluster-alert { |
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| 188 | + temperature = <85000>; |
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| 189 | + hysteresis = <2000>; |
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| 190 | + type = "passive"; |
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| 191 | + }; |
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| 192 | + |
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| 193 | + core_cluster_crit: core-cluster-crit { |
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132 | 194 | temperature = <95000>; |
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133 | 195 | hysteresis = <2000>; |
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134 | 196 | type = "critical"; |
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.. | .. |
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137 | 199 | |
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138 | 200 | cooling-maps { |
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139 | 201 | map0 { |
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140 | | - trip = <&cpu_alert>; |
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| 202 | + trip = <&core_cluster_alert>; |
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141 | 203 | cooling-device = |
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142 | | - <&cpu0 THERMAL_NO_LIMIT |
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143 | | - THERMAL_NO_LIMIT>; |
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| 204 | + <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
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| 205 | + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
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| 206 | + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
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| 207 | + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; |
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| 208 | + }; |
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| 209 | + }; |
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| 210 | + }; |
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| 211 | + |
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| 212 | + sec { |
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| 213 | + polling-delay-passive = <1000>; |
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| 214 | + polling-delay = <5000>; |
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| 215 | + thermal-sensors = <&tmu 4>; |
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| 216 | + |
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| 217 | + trips { |
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| 218 | + sec-alert { |
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| 219 | + temperature = <85000>; |
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| 220 | + hysteresis = <2000>; |
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| 221 | + type = "passive"; |
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| 222 | + }; |
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| 223 | + |
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| 224 | + sec-crit { |
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| 225 | + temperature = <95000>; |
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| 226 | + hysteresis = <2000>; |
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| 227 | + type = "critical"; |
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144 | 228 | }; |
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145 | 229 | }; |
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146 | 230 | }; |
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.. | .. |
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198 | 282 | ifc: ifc@1530000 { |
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199 | 283 | compatible = "fsl,ifc", "simple-bus"; |
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200 | 284 | reg = <0x0 0x1530000 0x0 0x10000>; |
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201 | | - big-endian; |
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202 | 285 | interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; |
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| 286 | + status = "disabled"; |
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203 | 287 | }; |
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204 | 288 | |
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205 | 289 | qspi: spi@1550000 { |
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.. | .. |
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212 | 296 | interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; |
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213 | 297 | clock-names = "qspi_en", "qspi"; |
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214 | 298 | clocks = <&clockgen 4 1>, <&clockgen 4 1>; |
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215 | | - big-endian; |
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216 | | - fsl,qspi-has-second-chip; |
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217 | 299 | status = "disabled"; |
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218 | 300 | }; |
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219 | 301 | |
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.. | .. |
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423 | 505 | reg = <0x00 0x21c0500 0x0 0x100>; |
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424 | 506 | interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; |
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425 | 507 | clocks = <&clockgen 4 1>; |
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| 508 | + status = "disabled"; |
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426 | 509 | }; |
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427 | 510 | |
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428 | 511 | duart1: serial@21c0600 { |
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.. | .. |
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430 | 513 | reg = <0x00 0x21c0600 0x0 0x100>; |
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431 | 514 | interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; |
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432 | 515 | clocks = <&clockgen 4 1>; |
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| 516 | + status = "disabled"; |
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433 | 517 | }; |
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434 | 518 | |
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435 | 519 | duart2: serial@21d0500 { |
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.. | .. |
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437 | 521 | reg = <0x0 0x21d0500 0x0 0x100>; |
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438 | 522 | interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; |
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439 | 523 | clocks = <&clockgen 4 1>; |
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| 524 | + status = "disabled"; |
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440 | 525 | }; |
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441 | 526 | |
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442 | 527 | duart3: serial@21d0600 { |
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.. | .. |
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444 | 529 | reg = <0x0 0x21d0600 0x0 0x100>; |
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445 | 530 | interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; |
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446 | 531 | clocks = <&clockgen 4 1>; |
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| 532 | + status = "disabled"; |
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447 | 533 | }; |
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448 | 534 | |
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449 | 535 | gpio0: gpio@2300000 { |
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.. | .. |
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571 | 657 | dr_mode = "host"; |
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572 | 658 | snps,quirk-frame-length-adjustment = <0x20>; |
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573 | 659 | snps,dis_rxdet_inp3_quirk; |
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| 660 | + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; |
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574 | 661 | }; |
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575 | 662 | |
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576 | 663 | usb1: usb@3000000 { |
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.. | .. |
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580 | 667 | dr_mode = "host"; |
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581 | 668 | snps,quirk-frame-length-adjustment = <0x20>; |
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582 | 669 | snps,dis_rxdet_inp3_quirk; |
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| 670 | + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; |
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583 | 671 | }; |
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584 | 672 | |
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585 | 673 | usb2: usb@3100000 { |
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.. | .. |
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589 | 677 | dr_mode = "host"; |
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590 | 678 | snps,quirk-frame-length-adjustment = <0x20>; |
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591 | 679 | snps,dis_rxdet_inp3_quirk; |
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| 680 | + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; |
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592 | 681 | }; |
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593 | 682 | |
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594 | 683 | sata: sata@3200000 { |
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.. | .. |
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630 | 719 | <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; |
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631 | 720 | }; |
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632 | 721 | |
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633 | | - pcie@3400000 { |
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634 | | - compatible = "fsl,ls1046a-pcie", "snps,dw-pcie"; |
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| 722 | + pcie1: pcie@3400000 { |
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| 723 | + compatible = "fsl,ls1046a-pcie"; |
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635 | 724 | reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ |
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636 | 725 | 0x40 0x00000000 0x0 0x00002000>; /* configuration space */ |
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637 | 726 | reg-names = "regs", "config"; |
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.. | .. |
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642 | 731 | #size-cells = <2>; |
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643 | 732 | device_type = "pci"; |
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644 | 733 | dma-coherent; |
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645 | | - num-lanes = <4>; |
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| 734 | + num-viewport = <8>; |
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646 | 735 | bus-range = <0x0 0xff>; |
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647 | 736 | ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */ |
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648 | 737 | 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ |
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.. | .. |
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653 | 742 | <0000 0 0 2 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, |
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654 | 743 | <0000 0 0 3 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, |
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655 | 744 | <0000 0 0 4 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; |
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| 745 | + status = "disabled"; |
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656 | 746 | }; |
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657 | 747 | |
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658 | | - pcie@3500000 { |
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659 | | - compatible = "fsl,ls1046a-pcie", "snps,dw-pcie"; |
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| 748 | + pcie_ep1: pcie_ep@3400000 { |
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| 749 | + compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep"; |
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| 750 | + reg = <0x00 0x03400000 0x0 0x00100000 |
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| 751 | + 0x40 0x00000000 0x8 0x00000000>; |
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| 752 | + reg-names = "regs", "addr_space"; |
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| 753 | + num-ib-windows = <6>; |
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| 754 | + num-ob-windows = <8>; |
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| 755 | + status = "disabled"; |
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| 756 | + }; |
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| 757 | + |
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| 758 | + pcie2: pcie@3500000 { |
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| 759 | + compatible = "fsl,ls1046a-pcie"; |
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660 | 760 | reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */ |
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661 | 761 | 0x48 0x00000000 0x0 0x00002000>; /* configuration space */ |
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662 | 762 | reg-names = "regs", "config"; |
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.. | .. |
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667 | 767 | #size-cells = <2>; |
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668 | 768 | device_type = "pci"; |
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669 | 769 | dma-coherent; |
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670 | | - num-lanes = <2>; |
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| 770 | + num-viewport = <8>; |
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671 | 771 | bus-range = <0x0 0xff>; |
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672 | 772 | ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */ |
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673 | 773 | 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ |
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.. | .. |
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678 | 778 | <0000 0 0 2 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, |
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679 | 779 | <0000 0 0 3 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, |
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680 | 780 | <0000 0 0 4 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; |
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| 781 | + status = "disabled"; |
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681 | 782 | }; |
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682 | 783 | |
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683 | | - pcie@3600000 { |
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684 | | - compatible = "fsl,ls1046a-pcie", "snps,dw-pcie"; |
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| 784 | + pcie_ep2: pcie_ep@3500000 { |
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| 785 | + compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep"; |
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| 786 | + reg = <0x00 0x03500000 0x0 0x00100000 |
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| 787 | + 0x48 0x00000000 0x8 0x00000000>; |
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| 788 | + reg-names = "regs", "addr_space"; |
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| 789 | + num-ib-windows = <6>; |
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| 790 | + num-ob-windows = <8>; |
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| 791 | + status = "disabled"; |
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| 792 | + }; |
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| 793 | + |
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| 794 | + pcie3: pcie@3600000 { |
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| 795 | + compatible = "fsl,ls1046a-pcie"; |
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685 | 796 | reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */ |
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686 | 797 | 0x50 0x00000000 0x0 0x00002000>; /* configuration space */ |
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687 | 798 | reg-names = "regs", "config"; |
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.. | .. |
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692 | 803 | #size-cells = <2>; |
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693 | 804 | device_type = "pci"; |
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694 | 805 | dma-coherent; |
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695 | | - num-lanes = <2>; |
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| 806 | + num-viewport = <8>; |
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696 | 807 | bus-range = <0x0 0xff>; |
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697 | 808 | ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */ |
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698 | 809 | 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ |
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.. | .. |
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703 | 814 | <0000 0 0 2 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>, |
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704 | 815 | <0000 0 0 3 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>, |
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705 | 816 | <0000 0 0 4 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; |
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| 817 | + status = "disabled"; |
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706 | 818 | }; |
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707 | 819 | |
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| 820 | + pcie_ep3: pcie_ep@3600000 { |
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| 821 | + compatible = "fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep"; |
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| 822 | + reg = <0x00 0x03600000 0x0 0x00100000 |
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| 823 | + 0x50 0x00000000 0x8 0x00000000>; |
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| 824 | + reg-names = "regs", "addr_space"; |
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| 825 | + num-ib-windows = <6>; |
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| 826 | + num-ob-windows = <8>; |
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| 827 | + status = "disabled"; |
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| 828 | + }; |
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| 829 | + |
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| 830 | + qdma: dma-controller@8380000 { |
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| 831 | + compatible = "fsl,ls1046a-qdma", "fsl,ls1021a-qdma"; |
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| 832 | + reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */ |
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| 833 | + <0x0 0x8390000 0x0 0x10000>, /* Status regs */ |
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| 834 | + <0x0 0x83a0000 0x0 0x40000>; /* Block regs */ |
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| 835 | + interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, |
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| 836 | + <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, |
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| 837 | + <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, |
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| 838 | + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, |
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| 839 | + <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; |
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| 840 | + interrupt-names = "qdma-error", "qdma-queue0", |
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| 841 | + "qdma-queue1", "qdma-queue2", "qdma-queue3"; |
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| 842 | + dma-channels = <8>; |
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| 843 | + block-number = <1>; |
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| 844 | + block-offset = <0x10000>; |
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| 845 | + fsl,dma-queues = <2>; |
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| 846 | + status-sizes = <64>; |
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| 847 | + queue-sizes = <64 64>; |
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| 848 | + big-endian; |
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| 849 | + }; |
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| 850 | + |
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| 851 | + rcpm: power-controller@1ee2140 { |
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| 852 | + compatible = "fsl,ls1046a-rcpm", "fsl,qoriq-rcpm-2.1+"; |
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| 853 | + reg = <0x0 0x1ee2140 0x0 0x4>; |
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| 854 | + #fsl,rcpm-wakeup-cells = <1>; |
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| 855 | + }; |
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| 856 | + |
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| 857 | + ftm_alarm0: timer@29d0000 { |
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| 858 | + compatible = "fsl,ls1046a-ftm-alarm"; |
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| 859 | + reg = <0x0 0x29d0000 0x0 0x10000>; |
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| 860 | + fsl,rcpm-wakeup = <&rcpm 0x20000>; |
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| 861 | + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; |
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| 862 | + big-endian; |
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| 863 | + }; |
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708 | 864 | }; |
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709 | 865 | |
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710 | 866 | reserved-memory { |
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