hc
2023-12-11 1f93a7dfd1f8d5ff7a5c53246c7534fe2332d6f4
kernel/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
....@@ -44,7 +44,7 @@
4444
4545 cpu@0 {
4646 device_type = "cpu";
47
- compatible = "arm,cortex-a72", "arm,armv8";
47
+ compatible = "arm,cortex-a72";
4848 reg = <0x0 0x0>;
4949 enable-method = "psci";
5050 next-level-cache = <&CLUSTER0_L2>;
....@@ -52,7 +52,7 @@
5252
5353 cpu@1 {
5454 device_type = "cpu";
55
- compatible = "arm,cortex-a72", "arm,armv8";
55
+ compatible = "arm,cortex-a72";
5656 reg = <0x0 0x1>;
5757 enable-method = "psci";
5858 next-level-cache = <&CLUSTER0_L2>;
....@@ -60,7 +60,7 @@
6060
6161 cpu@100 {
6262 device_type = "cpu";
63
- compatible = "arm,cortex-a72", "arm,armv8";
63
+ compatible = "arm,cortex-a72";
6464 reg = <0x0 0x100>;
6565 enable-method = "psci";
6666 next-level-cache = <&CLUSTER1_L2>;
....@@ -68,7 +68,7 @@
6868
6969 cpu@101 {
7070 device_type = "cpu";
71
- compatible = "arm,cortex-a72", "arm,armv8";
71
+ compatible = "arm,cortex-a72";
7272 reg = <0x0 0x101>;
7373 enable-method = "psci";
7474 next-level-cache = <&CLUSTER1_L2>;
....@@ -76,7 +76,7 @@
7676
7777 cpu@200 {
7878 device_type = "cpu";
79
- compatible = "arm,cortex-a72", "arm,armv8";
79
+ compatible = "arm,cortex-a72";
8080 reg = <0x0 0x200>;
8181 enable-method = "psci";
8282 next-level-cache = <&CLUSTER2_L2>;
....@@ -84,7 +84,7 @@
8484
8585 cpu@201 {
8686 device_type = "cpu";
87
- compatible = "arm,cortex-a72", "arm,armv8";
87
+ compatible = "arm,cortex-a72";
8888 reg = <0x0 0x201>;
8989 enable-method = "psci";
9090 next-level-cache = <&CLUSTER2_L2>;
....@@ -92,7 +92,7 @@
9292
9393 cpu@300 {
9494 device_type = "cpu";
95
- compatible = "arm,cortex-a72", "arm,armv8";
95
+ compatible = "arm,cortex-a72";
9696 reg = <0x0 0x300>;
9797 enable-method = "psci";
9898 next-level-cache = <&CLUSTER3_L2>;
....@@ -100,7 +100,7 @@
100100
101101 cpu@301 {
102102 device_type = "cpu";
103
- compatible = "arm,cortex-a72", "arm,armv8";
103
+ compatible = "arm,cortex-a72";
104104 reg = <0x0 0x301>;
105105 enable-method = "psci";
106106 next-level-cache = <&CLUSTER3_L2>;
....@@ -287,6 +287,7 @@
287287 #include "stingray-fs4.dtsi"
288288 #include "stingray-sata.dtsi"
289289 #include "stingray-pcie.dtsi"
290
+ #include "stingray-usb.dtsi"
290291
291292 hsls {
292293 compatible = "simple-bus";
....@@ -437,7 +438,7 @@
437438 reg = <0x000c0000 0x1000>;
438439 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
439440 clocks = <&hsls_25m_div2_clk>, <&hsls_div4_clk>;
440
- clock-names = "wdogclk", "apb_pclk";
441
+ clock-names = "wdog_clk", "apb_pclk";
441442 timeout-sec = <60>;
442443 };
443444
....@@ -611,4 +612,111 @@
611612 status = "disabled";
612613 };
613614 };
615
+
616
+ tmons {
617
+ compatible = "simple-bus";
618
+ #address-cells = <1>;
619
+ #size-cells = <1>;
620
+ ranges = <0x0 0x0 0x8f100000 0x100>;
621
+
622
+ tmon: tmon@0 {
623
+ compatible = "brcm,sr-thermal";
624
+ reg = <0x0 0x40>;
625
+ brcm,tmon-mask = <0x3f>;
626
+ #thermal-sensor-cells = <1>;
627
+ };
628
+ };
629
+
630
+ thermal-zones {
631
+ ihost0_thermal: ihost0-thermal {
632
+ polling-delay-passive = <0>;
633
+ polling-delay = <1000>;
634
+ thermal-sensors = <&tmon 0>;
635
+ trips {
636
+ cpu-crit {
637
+ temperature = <105000>;
638
+ hysteresis = <0>;
639
+ type = "critical";
640
+ };
641
+ };
642
+ };
643
+ ihost1_thermal: ihost1-thermal {
644
+ polling-delay-passive = <0>;
645
+ polling-delay = <1000>;
646
+ thermal-sensors = <&tmon 1>;
647
+ trips {
648
+ cpu-crit {
649
+ temperature = <105000>;
650
+ hysteresis = <0>;
651
+ type = "critical";
652
+ };
653
+ };
654
+ };
655
+ ihost2_thermal: ihost2-thermal {
656
+ polling-delay-passive = <0>;
657
+ polling-delay = <1000>;
658
+ thermal-sensors = <&tmon 2>;
659
+ trips {
660
+ cpu-crit {
661
+ temperature = <105000>;
662
+ hysteresis = <0>;
663
+ type = "critical";
664
+ };
665
+ };
666
+ };
667
+ ihost3_thermal: ihost3-thermal {
668
+ polling-delay-passive = <0>;
669
+ polling-delay = <1000>;
670
+ thermal-sensors = <&tmon 3>;
671
+ trips {
672
+ cpu-crit {
673
+ temperature = <105000>;
674
+ hysteresis = <0>;
675
+ type = "critical";
676
+ };
677
+ };
678
+ };
679
+ crmu_thermal: crmu-thermal {
680
+ polling-delay-passive = <0>;
681
+ polling-delay = <1000>;
682
+ thermal-sensors = <&tmon 4>;
683
+ trips {
684
+ cpu-crit {
685
+ temperature = <105000>;
686
+ hysteresis = <0>;
687
+ type = "critical";
688
+ };
689
+ };
690
+ };
691
+ nitro_thermal: nitro-thermal {
692
+ polling-delay-passive = <0>;
693
+ polling-delay = <1000>;
694
+ thermal-sensors = <&tmon 5>;
695
+ trips {
696
+ cpu-crit {
697
+ temperature = <105000>;
698
+ hysteresis = <0>;
699
+ type = "critical";
700
+ };
701
+ };
702
+ };
703
+ };
704
+
705
+ nic-hsls {
706
+ compatible = "simple-bus";
707
+ #address-cells = <1>;
708
+ #size-cells = <1>;
709
+ ranges = <0x0 0x0 0x0 0x7fffffff>;
710
+
711
+ nic_i2c0: i2c@60826100 {
712
+ compatible = "brcm,iproc-nic-i2c";
713
+ #address-cells = <1>;
714
+ #size-cells = <0>;
715
+ reg = <0x60826100 0x100>,
716
+ <0x60e00408 0x1000>;
717
+ brcm,ape-hsls-addr-mask = <0x03400000>;
718
+ clock-frequency = <100000>;
719
+ status = "disabled";
720
+ };
721
+ };
614722 };