.. | .. |
---|
44 | 44 | |
---|
45 | 45 | cpu@0 { |
---|
46 | 46 | device_type = "cpu"; |
---|
47 | | - compatible = "arm,cortex-a72", "arm,armv8"; |
---|
| 47 | + compatible = "arm,cortex-a72"; |
---|
48 | 48 | reg = <0x0 0x0>; |
---|
49 | 49 | enable-method = "psci"; |
---|
50 | 50 | next-level-cache = <&CLUSTER0_L2>; |
---|
.. | .. |
---|
52 | 52 | |
---|
53 | 53 | cpu@1 { |
---|
54 | 54 | device_type = "cpu"; |
---|
55 | | - compatible = "arm,cortex-a72", "arm,armv8"; |
---|
| 55 | + compatible = "arm,cortex-a72"; |
---|
56 | 56 | reg = <0x0 0x1>; |
---|
57 | 57 | enable-method = "psci"; |
---|
58 | 58 | next-level-cache = <&CLUSTER0_L2>; |
---|
.. | .. |
---|
60 | 60 | |
---|
61 | 61 | cpu@100 { |
---|
62 | 62 | device_type = "cpu"; |
---|
63 | | - compatible = "arm,cortex-a72", "arm,armv8"; |
---|
| 63 | + compatible = "arm,cortex-a72"; |
---|
64 | 64 | reg = <0x0 0x100>; |
---|
65 | 65 | enable-method = "psci"; |
---|
66 | 66 | next-level-cache = <&CLUSTER1_L2>; |
---|
.. | .. |
---|
68 | 68 | |
---|
69 | 69 | cpu@101 { |
---|
70 | 70 | device_type = "cpu"; |
---|
71 | | - compatible = "arm,cortex-a72", "arm,armv8"; |
---|
| 71 | + compatible = "arm,cortex-a72"; |
---|
72 | 72 | reg = <0x0 0x101>; |
---|
73 | 73 | enable-method = "psci"; |
---|
74 | 74 | next-level-cache = <&CLUSTER1_L2>; |
---|
.. | .. |
---|
76 | 76 | |
---|
77 | 77 | cpu@200 { |
---|
78 | 78 | device_type = "cpu"; |
---|
79 | | - compatible = "arm,cortex-a72", "arm,armv8"; |
---|
| 79 | + compatible = "arm,cortex-a72"; |
---|
80 | 80 | reg = <0x0 0x200>; |
---|
81 | 81 | enable-method = "psci"; |
---|
82 | 82 | next-level-cache = <&CLUSTER2_L2>; |
---|
.. | .. |
---|
84 | 84 | |
---|
85 | 85 | cpu@201 { |
---|
86 | 86 | device_type = "cpu"; |
---|
87 | | - compatible = "arm,cortex-a72", "arm,armv8"; |
---|
| 87 | + compatible = "arm,cortex-a72"; |
---|
88 | 88 | reg = <0x0 0x201>; |
---|
89 | 89 | enable-method = "psci"; |
---|
90 | 90 | next-level-cache = <&CLUSTER2_L2>; |
---|
.. | .. |
---|
92 | 92 | |
---|
93 | 93 | cpu@300 { |
---|
94 | 94 | device_type = "cpu"; |
---|
95 | | - compatible = "arm,cortex-a72", "arm,armv8"; |
---|
| 95 | + compatible = "arm,cortex-a72"; |
---|
96 | 96 | reg = <0x0 0x300>; |
---|
97 | 97 | enable-method = "psci"; |
---|
98 | 98 | next-level-cache = <&CLUSTER3_L2>; |
---|
.. | .. |
---|
100 | 100 | |
---|
101 | 101 | cpu@301 { |
---|
102 | 102 | device_type = "cpu"; |
---|
103 | | - compatible = "arm,cortex-a72", "arm,armv8"; |
---|
| 103 | + compatible = "arm,cortex-a72"; |
---|
104 | 104 | reg = <0x0 0x301>; |
---|
105 | 105 | enable-method = "psci"; |
---|
106 | 106 | next-level-cache = <&CLUSTER3_L2>; |
---|
.. | .. |
---|
287 | 287 | #include "stingray-fs4.dtsi" |
---|
288 | 288 | #include "stingray-sata.dtsi" |
---|
289 | 289 | #include "stingray-pcie.dtsi" |
---|
| 290 | + #include "stingray-usb.dtsi" |
---|
290 | 291 | |
---|
291 | 292 | hsls { |
---|
292 | 293 | compatible = "simple-bus"; |
---|
.. | .. |
---|
437 | 438 | reg = <0x000c0000 0x1000>; |
---|
438 | 439 | interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; |
---|
439 | 440 | clocks = <&hsls_25m_div2_clk>, <&hsls_div4_clk>; |
---|
440 | | - clock-names = "wdogclk", "apb_pclk"; |
---|
| 441 | + clock-names = "wdog_clk", "apb_pclk"; |
---|
441 | 442 | timeout-sec = <60>; |
---|
442 | 443 | }; |
---|
443 | 444 | |
---|
.. | .. |
---|
611 | 612 | status = "disabled"; |
---|
612 | 613 | }; |
---|
613 | 614 | }; |
---|
| 615 | + |
---|
| 616 | + tmons { |
---|
| 617 | + compatible = "simple-bus"; |
---|
| 618 | + #address-cells = <1>; |
---|
| 619 | + #size-cells = <1>; |
---|
| 620 | + ranges = <0x0 0x0 0x8f100000 0x100>; |
---|
| 621 | + |
---|
| 622 | + tmon: tmon@0 { |
---|
| 623 | + compatible = "brcm,sr-thermal"; |
---|
| 624 | + reg = <0x0 0x40>; |
---|
| 625 | + brcm,tmon-mask = <0x3f>; |
---|
| 626 | + #thermal-sensor-cells = <1>; |
---|
| 627 | + }; |
---|
| 628 | + }; |
---|
| 629 | + |
---|
| 630 | + thermal-zones { |
---|
| 631 | + ihost0_thermal: ihost0-thermal { |
---|
| 632 | + polling-delay-passive = <0>; |
---|
| 633 | + polling-delay = <1000>; |
---|
| 634 | + thermal-sensors = <&tmon 0>; |
---|
| 635 | + trips { |
---|
| 636 | + cpu-crit { |
---|
| 637 | + temperature = <105000>; |
---|
| 638 | + hysteresis = <0>; |
---|
| 639 | + type = "critical"; |
---|
| 640 | + }; |
---|
| 641 | + }; |
---|
| 642 | + }; |
---|
| 643 | + ihost1_thermal: ihost1-thermal { |
---|
| 644 | + polling-delay-passive = <0>; |
---|
| 645 | + polling-delay = <1000>; |
---|
| 646 | + thermal-sensors = <&tmon 1>; |
---|
| 647 | + trips { |
---|
| 648 | + cpu-crit { |
---|
| 649 | + temperature = <105000>; |
---|
| 650 | + hysteresis = <0>; |
---|
| 651 | + type = "critical"; |
---|
| 652 | + }; |
---|
| 653 | + }; |
---|
| 654 | + }; |
---|
| 655 | + ihost2_thermal: ihost2-thermal { |
---|
| 656 | + polling-delay-passive = <0>; |
---|
| 657 | + polling-delay = <1000>; |
---|
| 658 | + thermal-sensors = <&tmon 2>; |
---|
| 659 | + trips { |
---|
| 660 | + cpu-crit { |
---|
| 661 | + temperature = <105000>; |
---|
| 662 | + hysteresis = <0>; |
---|
| 663 | + type = "critical"; |
---|
| 664 | + }; |
---|
| 665 | + }; |
---|
| 666 | + }; |
---|
| 667 | + ihost3_thermal: ihost3-thermal { |
---|
| 668 | + polling-delay-passive = <0>; |
---|
| 669 | + polling-delay = <1000>; |
---|
| 670 | + thermal-sensors = <&tmon 3>; |
---|
| 671 | + trips { |
---|
| 672 | + cpu-crit { |
---|
| 673 | + temperature = <105000>; |
---|
| 674 | + hysteresis = <0>; |
---|
| 675 | + type = "critical"; |
---|
| 676 | + }; |
---|
| 677 | + }; |
---|
| 678 | + }; |
---|
| 679 | + crmu_thermal: crmu-thermal { |
---|
| 680 | + polling-delay-passive = <0>; |
---|
| 681 | + polling-delay = <1000>; |
---|
| 682 | + thermal-sensors = <&tmon 4>; |
---|
| 683 | + trips { |
---|
| 684 | + cpu-crit { |
---|
| 685 | + temperature = <105000>; |
---|
| 686 | + hysteresis = <0>; |
---|
| 687 | + type = "critical"; |
---|
| 688 | + }; |
---|
| 689 | + }; |
---|
| 690 | + }; |
---|
| 691 | + nitro_thermal: nitro-thermal { |
---|
| 692 | + polling-delay-passive = <0>; |
---|
| 693 | + polling-delay = <1000>; |
---|
| 694 | + thermal-sensors = <&tmon 5>; |
---|
| 695 | + trips { |
---|
| 696 | + cpu-crit { |
---|
| 697 | + temperature = <105000>; |
---|
| 698 | + hysteresis = <0>; |
---|
| 699 | + type = "critical"; |
---|
| 700 | + }; |
---|
| 701 | + }; |
---|
| 702 | + }; |
---|
| 703 | + }; |
---|
| 704 | + |
---|
| 705 | + nic-hsls { |
---|
| 706 | + compatible = "simple-bus"; |
---|
| 707 | + #address-cells = <1>; |
---|
| 708 | + #size-cells = <1>; |
---|
| 709 | + ranges = <0x0 0x0 0x0 0x7fffffff>; |
---|
| 710 | + |
---|
| 711 | + nic_i2c0: i2c@60826100 { |
---|
| 712 | + compatible = "brcm,iproc-nic-i2c"; |
---|
| 713 | + #address-cells = <1>; |
---|
| 714 | + #size-cells = <0>; |
---|
| 715 | + reg = <0x60826100 0x100>, |
---|
| 716 | + <0x60e00408 0x1000>; |
---|
| 717 | + brcm,ape-hsls-addr-mask = <0x03400000>; |
---|
| 718 | + clock-frequency = <100000>; |
---|
| 719 | + status = "disabled"; |
---|
| 720 | + }; |
---|
| 721 | + }; |
---|
614 | 722 | }; |
---|