hc
2023-12-11 1f93a7dfd1f8d5ff7a5c53246c7534fe2332d6f4
kernel/arch/arm64/boot/dts/arm/juno-base.dtsi
....@@ -11,14 +11,14 @@
1111 compatible = "arm,armv7-timer-mem";
1212 reg = <0x0 0x2a810000 0x0 0x10000>;
1313 clock-frequency = <50000000>;
14
- #address-cells = <2>;
15
- #size-cells = <2>;
16
- ranges;
14
+ #address-cells = <1>;
15
+ #size-cells = <1>;
16
+ ranges = <0 0x0 0x2a820000 0x20000>;
1717 status = "disabled";
1818 frame@2a830000 {
1919 frame-number = <1>;
20
- interrupts = <0 60 4>;
21
- reg = <0x0 0x2a830000 0x0 0x10000>;
20
+ interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
21
+ reg = <0x10000 0x10000>;
2222 };
2323 };
2424
....@@ -32,6 +32,18 @@
3232 #mbox-cells = <1>;
3333 clocks = <&soc_refclk100mhz>;
3434 clock-names = "apb_pclk";
35
+ };
36
+
37
+ smmu_gpu: iommu@2b400000 {
38
+ compatible = "arm,mmu-400", "arm,smmu-v1";
39
+ reg = <0x0 0x2b400000 0x0 0x10000>;
40
+ interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
41
+ <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
42
+ #iommu-cells = <1>;
43
+ #global-interrupts = <1>;
44
+ power-domains = <&scpi_devpd 1>;
45
+ dma-coherent;
46
+ status = "disabled";
3547 };
3648
3749 smmu_pcie: iommu@2b500000 {
....@@ -62,35 +74,35 @@
6274 <0x0 0x2c02f000 0 0x2000>,
6375 <0x0 0x2c04f000 0 0x2000>,
6476 <0x0 0x2c06f000 0 0x2000>;
65
- #address-cells = <2>;
77
+ #address-cells = <1>;
6678 #interrupt-cells = <3>;
67
- #size-cells = <2>;
79
+ #size-cells = <1>;
6880 interrupt-controller;
6981 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
70
- ranges = <0 0 0 0x2c1c0000 0 0x40000>;
82
+ ranges = <0 0 0x2c1c0000 0x40000>;
7183
7284 v2m_0: v2m@0 {
7385 compatible = "arm,gic-v2m-frame";
7486 msi-controller;
75
- reg = <0 0 0 0x10000>;
87
+ reg = <0 0x10000>;
7688 };
7789
7890 v2m@10000 {
7991 compatible = "arm,gic-v2m-frame";
8092 msi-controller;
81
- reg = <0 0x10000 0 0x10000>;
93
+ reg = <0x10000 0x10000>;
8294 };
8395
8496 v2m@20000 {
8597 compatible = "arm,gic-v2m-frame";
8698 msi-controller;
87
- reg = <0 0x20000 0 0x10000>;
99
+ reg = <0x20000 0x10000>;
88100 };
89101
90102 v2m@30000 {
91103 compatible = "arm,gic-v2m-frame";
92104 msi-controller;
93
- reg = <0 0x30000 0 0x10000>;
105
+ reg = <0x30000 0x10000>;
94106 };
95107 };
96108
....@@ -114,22 +126,17 @@
114126 clocks = <&soc_smc50mhz>;
115127 clock-names = "apb_pclk";
116128 power-domains = <&scpi_devpd 0>;
117
- ports {
118
- #address-cells = <1>;
119
- #size-cells = <0>;
120129
121
- /* input port */
122
- port@0 {
123
- reg = <0>;
130
+ in-ports {
131
+ port {
124132 etf0_in_port: endpoint {
125
- slave-mode;
126133 remote-endpoint = <&main_funnel_out_port>;
127134 };
128135 };
136
+ };
129137
130
- /* output port */
131
- port@1 {
132
- reg = <0>;
138
+ out-ports {
139
+ port {
133140 etf0_out_port: endpoint {
134141 };
135142 };
....@@ -143,47 +150,46 @@
143150 clocks = <&soc_smc50mhz>;
144151 clock-names = "apb_pclk";
145152 power-domains = <&scpi_devpd 0>;
146
- port {
147
- tpiu_in_port: endpoint {
148
- slave-mode;
149
- remote-endpoint = <&replicator_out_port0>;
153
+ in-ports {
154
+ port {
155
+ tpiu_in_port: endpoint {
156
+ remote-endpoint = <&replicator_out_port0>;
157
+ };
150158 };
151159 };
152160 };
153161
154162 /* main funnel on Juno r0, cssys0 funnel on Juno r1/r2 as per TRM*/
155163 main_funnel: funnel@20040000 {
156
- compatible = "arm,coresight-funnel", "arm,primecell";
164
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
157165 reg = <0 0x20040000 0 0x1000>;
158166
159167 clocks = <&soc_smc50mhz>;
160168 clock-names = "apb_pclk";
161169 power-domains = <&scpi_devpd 0>;
162
- ports {
163
- #address-cells = <1>;
164
- #size-cells = <0>;
165170
166
- /* output port */
167
- port@0 {
168
- reg = <0>;
171
+ out-ports {
172
+ port {
169173 main_funnel_out_port: endpoint {
170174 remote-endpoint = <&etf0_in_port>;
171175 };
172176 };
177
+ };
173178
174
- /* input ports */
175
- port@1 {
179
+ main_funnel_in_ports: in-ports {
180
+ #address-cells = <1>;
181
+ #size-cells = <0>;
182
+
183
+ port@0 {
176184 reg = <0>;
177185 main_funnel_in_port0: endpoint {
178
- slave-mode;
179186 remote-endpoint = <&cluster0_funnel_out_port>;
180187 };
181188 };
182189
183
- port@2 {
190
+ port@1 {
184191 reg = <1>;
185192 main_funnel_in_port1: endpoint {
186
- slave-mode;
187193 remote-endpoint = <&cluster1_funnel_out_port>;
188194 };
189195 };
....@@ -198,10 +204,12 @@
198204 clocks = <&soc_smc50mhz>;
199205 clock-names = "apb_pclk";
200206 power-domains = <&scpi_devpd 0>;
201
- port {
202
- etr_in_port: endpoint {
203
- slave-mode;
204
- remote-endpoint = <&replicator_out_port1>;
207
+ arm,scatter-gather;
208
+ in-ports {
209
+ port {
210
+ etr_in_port: endpoint {
211
+ remote-endpoint = <&replicator_out_port1>;
212
+ };
205213 };
206214 };
207215 };
....@@ -215,8 +223,45 @@
215223 clocks = <&soc_smc50mhz>;
216224 clock-names = "apb_pclk";
217225 power-domains = <&scpi_devpd 0>;
218
- port {
219
- stm_out_port: endpoint {
226
+ out-ports {
227
+ port {
228
+ stm_out_port: endpoint {
229
+ };
230
+ };
231
+ };
232
+ };
233
+
234
+ replicator@20120000 {
235
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
236
+ reg = <0 0x20120000 0 0x1000>;
237
+
238
+ clocks = <&soc_smc50mhz>;
239
+ clock-names = "apb_pclk";
240
+ power-domains = <&scpi_devpd 0>;
241
+
242
+ out-ports {
243
+ #address-cells = <1>;
244
+ #size-cells = <0>;
245
+
246
+ /* replicator output ports */
247
+ port@0 {
248
+ reg = <0>;
249
+ replicator_out_port0: endpoint {
250
+ remote-endpoint = <&tpiu_in_port>;
251
+ };
252
+ };
253
+
254
+ port@1 {
255
+ reg = <1>;
256
+ replicator_out_port1: endpoint {
257
+ remote-endpoint = <&etr_in_port>;
258
+ };
259
+ };
260
+ };
261
+ in-ports {
262
+ port {
263
+ replicator_in_port0: endpoint {
264
+ };
220265 };
221266 };
222267 };
....@@ -237,43 +282,44 @@
237282 clocks = <&soc_smc50mhz>;
238283 clock-names = "apb_pclk";
239284 power-domains = <&scpi_devpd 0>;
240
- port {
241
- cluster0_etm0_out_port: endpoint {
242
- remote-endpoint = <&cluster0_funnel_in_port0>;
285
+ out-ports {
286
+ port {
287
+ cluster0_etm0_out_port: endpoint {
288
+ remote-endpoint = <&cluster0_funnel_in_port0>;
289
+ };
243290 };
244291 };
245292 };
246293
247294 funnel@220c0000 { /* cluster0 funnel */
248
- compatible = "arm,coresight-funnel", "arm,primecell";
295
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
249296 reg = <0 0x220c0000 0 0x1000>;
250297
251298 clocks = <&soc_smc50mhz>;
252299 clock-names = "apb_pclk";
253300 power-domains = <&scpi_devpd 0>;
254
- ports {
301
+ out-ports {
302
+ port {
303
+ cluster0_funnel_out_port: endpoint {
304
+ remote-endpoint = <&main_funnel_in_port0>;
305
+ };
306
+ };
307
+ };
308
+
309
+ in-ports {
255310 #address-cells = <1>;
256311 #size-cells = <0>;
257312
258313 port@0 {
259314 reg = <0>;
260
- cluster0_funnel_out_port: endpoint {
261
- remote-endpoint = <&main_funnel_in_port0>;
262
- };
263
- };
264
-
265
- port@1 {
266
- reg = <0>;
267315 cluster0_funnel_in_port0: endpoint {
268
- slave-mode;
269316 remote-endpoint = <&cluster0_etm0_out_port>;
270317 };
271318 };
272319
273
- port@2 {
320
+ port@1 {
274321 reg = <1>;
275322 cluster0_funnel_in_port1: endpoint {
276
- slave-mode;
277323 remote-endpoint = <&cluster0_etm1_out_port>;
278324 };
279325 };
....@@ -296,9 +342,11 @@
296342 clocks = <&soc_smc50mhz>;
297343 clock-names = "apb_pclk";
298344 power-domains = <&scpi_devpd 0>;
299
- port {
300
- cluster0_etm1_out_port: endpoint {
301
- remote-endpoint = <&cluster0_funnel_in_port1>;
345
+ out-ports {
346
+ port {
347
+ cluster0_etm1_out_port: endpoint {
348
+ remote-endpoint = <&cluster0_funnel_in_port1>;
349
+ };
302350 };
303351 };
304352 };
....@@ -319,57 +367,56 @@
319367 clocks = <&soc_smc50mhz>;
320368 clock-names = "apb_pclk";
321369 power-domains = <&scpi_devpd 0>;
322
- port {
323
- cluster1_etm0_out_port: endpoint {
324
- remote-endpoint = <&cluster1_funnel_in_port0>;
370
+ out-ports {
371
+ port {
372
+ cluster1_etm0_out_port: endpoint {
373
+ remote-endpoint = <&cluster1_funnel_in_port0>;
374
+ };
325375 };
326376 };
327377 };
328378
329379 funnel@230c0000 { /* cluster1 funnel */
330
- compatible = "arm,coresight-funnel", "arm,primecell";
380
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
331381 reg = <0 0x230c0000 0 0x1000>;
332382
333383 clocks = <&soc_smc50mhz>;
334384 clock-names = "apb_pclk";
335385 power-domains = <&scpi_devpd 0>;
336
- ports {
386
+ out-ports {
387
+ port {
388
+ cluster1_funnel_out_port: endpoint {
389
+ remote-endpoint = <&main_funnel_in_port1>;
390
+ };
391
+ };
392
+ };
393
+
394
+ in-ports {
337395 #address-cells = <1>;
338396 #size-cells = <0>;
339397
340398 port@0 {
341399 reg = <0>;
342
- cluster1_funnel_out_port: endpoint {
343
- remote-endpoint = <&main_funnel_in_port1>;
344
- };
345
- };
346
-
347
- port@1 {
348
- reg = <0>;
349400 cluster1_funnel_in_port0: endpoint {
350
- slave-mode;
351401 remote-endpoint = <&cluster1_etm0_out_port>;
352402 };
353403 };
354404
355
- port@2 {
405
+ port@1 {
356406 reg = <1>;
357407 cluster1_funnel_in_port1: endpoint {
358
- slave-mode;
359408 remote-endpoint = <&cluster1_etm1_out_port>;
360409 };
361410 };
362
- port@3 {
411
+ port@2 {
363412 reg = <2>;
364413 cluster1_funnel_in_port2: endpoint {
365
- slave-mode;
366414 remote-endpoint = <&cluster1_etm2_out_port>;
367415 };
368416 };
369
- port@4 {
417
+ port@3 {
370418 reg = <3>;
371419 cluster1_funnel_in_port3: endpoint {
372
- slave-mode;
373420 remote-endpoint = <&cluster1_etm3_out_port>;
374421 };
375422 };
....@@ -392,9 +439,11 @@
392439 clocks = <&soc_smc50mhz>;
393440 clock-names = "apb_pclk";
394441 power-domains = <&scpi_devpd 0>;
395
- port {
396
- cluster1_etm1_out_port: endpoint {
397
- remote-endpoint = <&cluster1_funnel_in_port1>;
442
+ out-ports {
443
+ port {
444
+ cluster1_etm1_out_port: endpoint {
445
+ remote-endpoint = <&cluster1_funnel_in_port1>;
446
+ };
398447 };
399448 };
400449 };
....@@ -415,9 +464,11 @@
415464 clocks = <&soc_smc50mhz>;
416465 clock-names = "apb_pclk";
417466 power-domains = <&scpi_devpd 0>;
418
- port {
419
- cluster1_etm2_out_port: endpoint {
420
- remote-endpoint = <&cluster1_funnel_in_port2>;
467
+ out-ports {
468
+ port {
469
+ cluster1_etm2_out_port: endpoint {
470
+ remote-endpoint = <&cluster1_funnel_in_port2>;
471
+ };
421472 };
422473 };
423474 };
....@@ -438,48 +489,28 @@
438489 clocks = <&soc_smc50mhz>;
439490 clock-names = "apb_pclk";
440491 power-domains = <&scpi_devpd 0>;
441
- port {
442
- cluster1_etm3_out_port: endpoint {
443
- remote-endpoint = <&cluster1_funnel_in_port3>;
492
+ out-ports {
493
+ port {
494
+ cluster1_etm3_out_port: endpoint {
495
+ remote-endpoint = <&cluster1_funnel_in_port3>;
496
+ };
444497 };
445498 };
446499 };
447500
448
- replicator@20120000 {
449
- compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
450
- reg = <0 0x20120000 0 0x1000>;
451
-
452
- clocks = <&soc_smc50mhz>;
453
- clock-names = "apb_pclk";
454
- power-domains = <&scpi_devpd 0>;
455
-
456
- ports {
457
- #address-cells = <1>;
458
- #size-cells = <0>;
459
-
460
- /* replicator output ports */
461
- port@0 {
462
- reg = <0>;
463
- replicator_out_port0: endpoint {
464
- remote-endpoint = <&tpiu_in_port>;
465
- };
466
- };
467
-
468
- port@1 {
469
- reg = <1>;
470
- replicator_out_port1: endpoint {
471
- remote-endpoint = <&etr_in_port>;
472
- };
473
- };
474
-
475
- /* replicator input port */
476
- port@2 {
477
- reg = <0>;
478
- replicator_in_port0: endpoint {
479
- slave-mode;
480
- };
481
- };
482
- };
501
+ gpu: gpu@2d000000 {
502
+ compatible = "arm,juno-mali", "arm,mali-t624";
503
+ reg = <0 0x2d000000 0 0x10000>;
504
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
505
+ <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
506
+ <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
507
+ interrupt-names = "job", "mmu", "gpu";
508
+ clocks = <&scpi_dvfs 2>;
509
+ power-domains = <&scpi_devpd 1>;
510
+ dma-coherent;
511
+ /* The SMMU is only really of interest to bare-metal hypervisors */
512
+ /* iommus = <&smmu_gpu 0>; */
513
+ status = "disabled";
483514 };
484515
485516 sram: sram@2e000000 {
....@@ -490,12 +521,12 @@
490521 #size-cells = <1>;
491522 ranges = <0 0x0 0x2e000000 0x8000>;
492523
493
- cpu_scp_lpri: scp-shmem@0 {
524
+ cpu_scp_lpri: scp-sram@0 {
494525 compatible = "arm,juno-scp-shmem";
495526 reg = <0x0 0x200>;
496527 };
497528
498
- cpu_scp_hpri: scp-shmem@200 {
529
+ cpu_scp_hpri: scp-sram@200 {
499530 compatible = "arm,juno-scp-shmem";
500531 reg = <0x200 0x200>;
501532 };
....@@ -515,10 +546,10 @@
515546 <0x42000000 0x40 0x00000000 0x40 0x00000000 0x1 0x00000000>;
516547 #interrupt-cells = <1>;
517548 interrupt-map-mask = <0 0 0 7>;
518
- interrupt-map = <0 0 0 1 &gic 0 0 0 136 4>,
519
- <0 0 0 2 &gic 0 0 0 137 4>,
520
- <0 0 0 3 &gic 0 0 0 138 4>,
521
- <0 0 0 4 &gic 0 0 0 139 4>;
549
+ interrupt-map = <0 0 0 1 &gic 0 GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
550
+ <0 0 0 2 &gic 0 GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
551
+ <0 0 0 3 &gic 0 GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
552
+ <0 0 0 4 &gic 0 GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
522553 msi-parent = <&v2m_0>;
523554 status = "disabled";
524555 iommu-map-mask = <0x0>; /* RC has no means to output PCI RID */
....@@ -564,12 +595,26 @@
564595 polling-delay = <1000>;
565596 polling-delay-passive = <100>;
566597 thermal-sensors = <&scpi_sensors0 0>;
598
+ trips {
599
+ pmic_crit0: trip0 {
600
+ temperature = <90000>;
601
+ hysteresis = <2000>;
602
+ type = "critical";
603
+ };
604
+ };
567605 };
568606
569607 soc {
570608 polling-delay = <1000>;
571609 polling-delay-passive = <100>;
572610 thermal-sensors = <&scpi_sensors0 3>;
611
+ trips {
612
+ soc_crit0: trip0 {
613
+ temperature = <80000>;
614
+ hysteresis = <2000>;
615
+ type = "critical";
616
+ };
617
+ };
573618 };
574619
575620 big_cluster_thermal_zone: big-cluster {
....@@ -698,7 +743,7 @@
698743 };
699744 };
700745
701
- soc_uart0: uart@7ff80000 {
746
+ soc_uart0: serial@7ff80000 {
702747 compatible = "arm,pl011", "arm,primecell";
703748 reg = <0x0 0x7ff80000 0x0 0x1000>;
704749 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
....@@ -737,7 +782,7 @@
737782 };
738783 };
739784
740
- ohci@7ffb0000 {
785
+ usb@7ffb0000 {
741786 compatible = "generic-ohci";
742787 reg = <0x0 0x7ffb0000 0x0 0x10000>;
743788 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
....@@ -745,7 +790,7 @@
745790 clocks = <&soc_usb48mhz>;
746791 };
747792
748
- ehci@7ffc0000 {
793
+ usb@7ffc0000 {
749794 compatible = "generic-ehci";
750795 reg = <0x0 0x7ffc0000 0x0 0x10000>;
751796 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
....@@ -769,7 +814,7 @@
769814 <0x00000008 0x80000000 0x1 0x80000000>;
770815 };
771816
772
- smb@8000000 {
817
+ bus@8000000 {
773818 compatible = "simple-bus";
774819 #address-cells = <2>;
775820 #size-cells = <1>;
....@@ -782,28 +827,28 @@
782827
783828 #interrupt-cells = <1>;
784829 interrupt-map-mask = <0 0 15>;
785
- interrupt-map = <0 0 0 &gic 0 0 0 68 IRQ_TYPE_LEVEL_HIGH>,
786
- <0 0 1 &gic 0 0 0 69 IRQ_TYPE_LEVEL_HIGH>,
787
- <0 0 2 &gic 0 0 0 70 IRQ_TYPE_LEVEL_HIGH>,
788
- <0 0 3 &gic 0 0 0 160 IRQ_TYPE_LEVEL_HIGH>,
789
- <0 0 4 &gic 0 0 0 161 IRQ_TYPE_LEVEL_HIGH>,
790
- <0 0 5 &gic 0 0 0 162 IRQ_TYPE_LEVEL_HIGH>,
791
- <0 0 6 &gic 0 0 0 163 IRQ_TYPE_LEVEL_HIGH>,
792
- <0 0 7 &gic 0 0 0 164 IRQ_TYPE_LEVEL_HIGH>,
793
- <0 0 8 &gic 0 0 0 165 IRQ_TYPE_LEVEL_HIGH>,
794
- <0 0 9 &gic 0 0 0 166 IRQ_TYPE_LEVEL_HIGH>,
795
- <0 0 10 &gic 0 0 0 167 IRQ_TYPE_LEVEL_HIGH>,
796
- <0 0 11 &gic 0 0 0 168 IRQ_TYPE_LEVEL_HIGH>,
797
- <0 0 12 &gic 0 0 0 169 IRQ_TYPE_LEVEL_HIGH>;
830
+ interrupt-map = <0 0 0 &gic 0 GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
831
+ <0 0 1 &gic 0 GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
832
+ <0 0 2 &gic 0 GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
833
+ <0 0 3 &gic 0 GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
834
+ <0 0 4 &gic 0 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
835
+ <0 0 5 &gic 0 GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
836
+ <0 0 6 &gic 0 GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
837
+ <0 0 7 &gic 0 GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
838
+ <0 0 8 &gic 0 GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
839
+ <0 0 9 &gic 0 GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
840
+ <0 0 10 &gic 0 GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
841
+ <0 0 11 &gic 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
842
+ <0 0 12 &gic 0 GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
798843 };
799844
800
- site2: tlx@60000000 {
845
+ site2: tlx-bus@60000000 {
801846 compatible = "simple-bus";
802847 #address-cells = <1>;
803848 #size-cells = <1>;
804849 ranges = <0 0 0x60000000 0x10000000>;
805850 #interrupt-cells = <1>;
806851 interrupt-map-mask = <0 0>;
807
- interrupt-map = <0 0 &gic 0 0 0 168 IRQ_TYPE_LEVEL_HIGH>;
852
+ interrupt-map = <0 0 &gic 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
808853 };
809854 };