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| 1 | 1 | /* |
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| 2 | 2 | * Copyright 2013-2014 Freescale Semiconductor, Inc. |
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| 3 | + * Copyright 2018 NXP |
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| 3 | 4 | * |
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| 4 | 5 | * This file is dual-licensed: you can use it either under the terms |
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| 5 | 6 | * of the GPL or the X11 license, at your option. Note that this dual |
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| .. | .. |
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| 50 | 51 | |
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| 51 | 52 | / { |
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| 52 | 53 | model = "LS1021A TWR Board"; |
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| 54 | + compatible = "fsl,ls1021a-twr", "fsl,ls1021a"; |
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| 53 | 55 | |
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| 54 | 56 | aliases { |
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| 55 | 57 | enet2_rgmii_phy = &rgmii_phy1; |
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| .. | .. |
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| 203 | 205 | #size-cells = <1>; |
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| 204 | 206 | compatible = "cfi-flash"; |
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| 205 | 207 | reg = <0x0 0x0 0x8000000>; |
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| 208 | + big-endian; |
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| 206 | 209 | bank-width = <2>; |
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| 207 | 210 | device-width = <1>; |
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| 208 | 211 | }; |
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| .. | .. |
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| 239 | 242 | status = "okay"; |
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| 240 | 243 | }; |
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| 241 | 244 | |
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| 245 | +&qspi { |
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| 246 | + status = "okay"; |
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| 247 | + |
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| 248 | + n25q128a130: flash@0 { |
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| 249 | + compatible = "jedec,spi-nor"; |
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| 250 | + #address-cells = <1>; |
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| 251 | + #size-cells = <1>; |
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| 252 | + spi-max-frequency = <50000000>; |
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| 253 | + reg = <0>; |
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| 254 | + spi-rx-bus-width = <4>; |
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| 255 | + spi-tx-bus-width = <4>; |
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| 256 | + }; |
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| 257 | +}; |
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| 258 | + |
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| 242 | 259 | &sai1 { |
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| 243 | 260 | status = "okay"; |
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| 244 | 261 | }; |
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