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| 1 | | -/* |
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| 2 | | - * Copyright 2013 Greg Ungerer <gerg@uclinux.org> |
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| 3 | | - * Copyright 2011 Freescale Semiconductor, Inc. |
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| 4 | | - * Copyright 2011 Linaro Ltd. |
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| 5 | | - * |
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| 6 | | - * The code contained herein is licensed under the GNU General Public |
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| 7 | | - * License. You may obtain a copy of the GNU General Public License |
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| 8 | | - * Version 2 or later at the following locations: |
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| 9 | | - * |
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| 10 | | - * http://www.opensource.org/licenses/gpl-license.html |
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| 11 | | - * http://www.gnu.org/copyleft/gpl.html |
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| 12 | | - */ |
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| 1 | +// SPDX-License-Identifier: GPL-2.0+ |
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| 2 | +// |
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| 3 | +// Copyright 2013 Greg Ungerer <gerg@uclinux.org> |
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| 4 | +// Copyright 2011 Freescale Semiconductor, Inc. |
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| 5 | +// Copyright 2011 Linaro Ltd. |
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| 13 | 6 | |
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| 14 | 7 | #include "imx50-pinfunc.h" |
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| 15 | 8 | #include <dt-bindings/gpio/gpio.h> |
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| .. | .. |
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| 33 | 26 | gpio3 = &gpio4; |
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| 34 | 27 | gpio4 = &gpio5; |
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| 35 | 28 | gpio5 = &gpio6; |
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| 29 | + i2c0 = &i2c1; |
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| 30 | + i2c1 = &i2c2; |
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| 31 | + i2c2 = &i2c3; |
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| 32 | + mmc0 = &esdhc1; |
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| 33 | + mmc1 = &esdhc2; |
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| 34 | + mmc2 = &esdhc3; |
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| 35 | + mmc3 = &esdhc4; |
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| 36 | 36 | serial0 = &uart1; |
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| 37 | 37 | serial1 = &uart2; |
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| 38 | 38 | serial2 = &uart3; |
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| 39 | 39 | serial3 = &uart4; |
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| 40 | 40 | serial4 = &uart5; |
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| 41 | + spi0 = &ecspi1; |
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| 42 | + spi1 = &ecspi2; |
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| 43 | + spi2 = &cspi; |
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| 41 | 44 | }; |
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| 42 | 45 | |
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| 43 | 46 | cpus { |
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| .. | .. |
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| 83 | 86 | }; |
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| 84 | 87 | }; |
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| 85 | 88 | |
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| 89 | + usbphy0: usbphy-0 { |
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| 90 | + compatible = "usb-nop-xceiv"; |
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| 91 | + clocks = <&clks IMX5_CLK_USB_PHY1_GATE>; |
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| 92 | + clock-names = "main_clk"; |
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| 93 | + #phy-cells = <0>; |
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| 94 | + status = "okay"; |
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| 95 | + }; |
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| 96 | + |
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| 86 | 97 | soc { |
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| 87 | 98 | #address-cells = <1>; |
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| 88 | 99 | #size-cells = <1>; |
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| .. | .. |
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| 90 | 101 | interrupt-parent = <&tzic>; |
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| 91 | 102 | ranges; |
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| 92 | 103 | |
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| 93 | | - aips@50000000 { /* AIPS1 */ |
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| 104 | + bus@50000000 { /* AIPS1 */ |
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| 94 | 105 | compatible = "fsl,aips-bus", "simple-bus"; |
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| 95 | 106 | #address-cells = <1>; |
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| 96 | 107 | #size-cells = <1>; |
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| .. | .. |
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| 104 | 115 | reg = <0x50000000 0x40000>; |
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| 105 | 116 | ranges; |
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| 106 | 117 | |
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| 107 | | - esdhc1: esdhc@50004000 { |
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| 118 | + esdhc1: mmc@50004000 { |
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| 108 | 119 | compatible = "fsl,imx50-esdhc", "fsl,imx53-esdhc"; |
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| 109 | 120 | reg = <0x50004000 0x4000>; |
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| 110 | 121 | interrupts = <1>; |
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| .. | .. |
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| 116 | 127 | status = "disabled"; |
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| 117 | 128 | }; |
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| 118 | 129 | |
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| 119 | | - esdhc2: esdhc@50008000 { |
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| 130 | + esdhc2: mmc@50008000 { |
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| 120 | 131 | compatible = "fsl,imx50-esdhc", "fsl,imx53-esdhc"; |
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| 121 | 132 | reg = <0x50008000 0x4000>; |
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| 122 | 133 | interrupts = <2>; |
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| .. | .. |
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| 138 | 149 | status = "disabled"; |
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| 139 | 150 | }; |
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| 140 | 151 | |
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| 141 | | - ecspi1: ecspi@50010000 { |
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| 152 | + ecspi1: spi@50010000 { |
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| 142 | 153 | #address-cells = <1>; |
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| 143 | 154 | #size-cells = <0>; |
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| 144 | 155 | compatible = "fsl,imx50-ecspi", "fsl,imx51-ecspi"; |
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| .. | .. |
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| 165 | 176 | status = "disabled"; |
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| 166 | 177 | }; |
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| 167 | 178 | |
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| 168 | | - esdhc3: esdhc@50020000 { |
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| 179 | + esdhc3: mmc@50020000 { |
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| 169 | 180 | compatible = "fsl,imx50-esdhc", "fsl,imx53-esdhc"; |
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| 170 | 181 | reg = <0x50020000 0x4000>; |
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| 171 | 182 | interrupts = <3>; |
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| .. | .. |
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| 177 | 188 | status = "disabled"; |
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| 178 | 189 | }; |
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| 179 | 190 | |
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| 180 | | - esdhc4: esdhc@50024000 { |
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| 191 | + esdhc4: mmc@50024000 { |
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| 181 | 192 | compatible = "fsl,imx50-esdhc", "fsl,imx53-esdhc"; |
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| 182 | 193 | reg = <0x50024000 0x4000>; |
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| 183 | 194 | interrupts = <4>; |
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| .. | .. |
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| 194 | 205 | compatible = "fsl,imx50-usb", "fsl,imx27-usb"; |
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| 195 | 206 | reg = <0x53f80000 0x0200>; |
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| 196 | 207 | interrupts = <18>; |
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| 197 | | - clocks = <&clks IMX5_CLK_USB_PHY1_GATE>; |
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| 208 | + clocks = <&clks IMX5_CLK_USBOH3_GATE>; |
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| 209 | + fsl,usbphy = <&usbphy0>; |
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| 198 | 210 | status = "disabled"; |
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| 199 | 211 | }; |
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| 200 | 212 | |
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| .. | .. |
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| 276 | 288 | reg = <0x53fa8000 0x4000>; |
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| 277 | 289 | }; |
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| 278 | 290 | |
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| 279 | | - gpr: iomuxc-gpr@53fa8000 { |
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| 280 | | - compatible = "fsl,imx50-iomuxc-gpr", "syscon"; |
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| 281 | | - reg = <0x53fa8000 0xc>; |
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| 282 | | - }; |
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| 283 | | - |
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| 284 | 291 | pwm1: pwm@53fb4000 { |
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| 285 | | - #pwm-cells = <2>; |
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| 292 | + #pwm-cells = <3>; |
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| 286 | 293 | compatible = "fsl,imx50-pwm", "fsl,imx27-pwm"; |
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| 287 | 294 | reg = <0x53fb4000 0x4000>; |
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| 288 | 295 | clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>, |
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| .. | .. |
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| 292 | 299 | }; |
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| 293 | 300 | |
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| 294 | 301 | pwm2: pwm@53fb8000 { |
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| 295 | | - #pwm-cells = <2>; |
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| 302 | + #pwm-cells = <3>; |
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| 296 | 303 | compatible = "fsl,imx50-pwm", "fsl,imx27-pwm"; |
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| 297 | 304 | reg = <0x53fb8000 0x4000>; |
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| 298 | 305 | clocks = <&clks IMX5_CLK_PWM2_IPG_GATE>, |
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| .. | .. |
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| 321 | 328 | status = "disabled"; |
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| 322 | 329 | }; |
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| 323 | 330 | |
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| 324 | | - src: src@53fd0000 { |
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| 331 | + src: reset-controller@53fd0000 { |
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| 325 | 332 | compatible = "fsl,imx50-src", "fsl,imx51-src"; |
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| 326 | 333 | reg = <0x53fd0000 0x4000>; |
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| 334 | + interrupts = <75>; |
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| 327 | 335 | #reset-cells = <1>; |
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| 328 | 336 | }; |
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| 329 | 337 | |
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| .. | .. |
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| 377 | 385 | }; |
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| 378 | 386 | }; |
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| 379 | 387 | |
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| 380 | | - aips@60000000 { /* AIPS2 */ |
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| 388 | + bus@60000000 { /* AIPS2 */ |
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| 381 | 389 | compatible = "fsl,aips-bus", "simple-bus"; |
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| 382 | 390 | #address-cells = <1>; |
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| 383 | 391 | #size-cells = <1>; |
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| .. | .. |
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| 401 | 409 | status = "disabled"; |
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| 402 | 410 | }; |
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| 403 | 411 | |
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| 404 | | - ecspi2: ecspi@63fac000 { |
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| 412 | + ecspi2: spi@63fac000 { |
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| 405 | 413 | #address-cells = <1>; |
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| 406 | 414 | #size-cells = <0>; |
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| 407 | 415 | compatible = "fsl,imx50-ecspi", "fsl,imx51-ecspi"; |
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| .. | .. |
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| 424 | 432 | fsl,sdma-ram-script-name = "imx/sdma/sdma-imx50.bin"; |
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| 425 | 433 | }; |
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| 426 | 434 | |
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| 427 | | - cspi: cspi@63fc0000 { |
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| 435 | + cspi: spi@63fc0000 { |
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| 428 | 436 | #address-cells = <1>; |
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| 429 | 437 | #size-cells = <0>; |
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| 430 | 438 | compatible = "fsl,imx50-cspi", "fsl,imx35-cspi"; |
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