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2023-12-11 1f93a7dfd1f8d5ff7a5c53246c7534fe2332d6f4

 kernel/arch/arc/kernel/entry-arcv2.S
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@@ -1,11 +1,8 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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 /*
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  * ARCv2 ISA based core Low Level Intr/Traps/Exceptions(non-TLB) Handling
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  *
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  * Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com)
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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  */
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 #include <linux/linkage.h>   /* ARC_{EXTRY,EXIT} */
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@@ -70,7 +67,7 @@
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 ENTRY(handle_interrupt)
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-	INTERRUPT_PROLOGUE  irq
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+	INTERRUPT_PROLOGUE
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 	# irq control APIs local_irq_save/restore/disable/enable fiddle with
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 	# global interrupt enable bits in STATUS32 (.IE for 1 prio, .E[] for 2 prio)
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@@ -82,7 +79,7 @@
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 	#
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 	# Note this disable is only for consistent book-keeping as further interrupts
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 	# will be disabled anyways even w/o this. Hardware tracks active interrupts
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-	# seperately in AUX_IRQ_ACTIVE.active and will not take new interrupts
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+	# seperately in AUX_IRQ_ACT.active and will not take new interrupts
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 	# unless this one returns (or higher prio becomes pending in 2-prio scheme)
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 	IRQ_DISABLE
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@@ -203,17 +200,18 @@
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 	ld	r0, [sp, PT_status32]	; U/K mode at time of entry
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 	lr	r10, [AUX_IRQ_ACT]
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-	bmsk	r11, r10, 15	; AUX_IRQ_ACT.ACTIVE
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+	bmsk	r11, r10, 15		; extract AUX_IRQ_ACT.active
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 	breq	r11, 0, .Lexcept_ret	; No intr active, ret from Exception
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 ;####### Return from Intr #######
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+
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+.Lisr_ret:
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 debug_marker_l1:
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 	; bbit1.nt r0, STATUS_DE_BIT, .Lintr_ret_to_delay_slot
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 	btst	r0, STATUS_DE_BIT		; Z flag set if bit clear
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 	bnz	.Lintr_ret_to_delay_slot	; branch if STATUS_DE_BIT set
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-.Lisr_ret_fast_path:
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 	; Handle special case #1: (Entry via Exception, Return via IRQ)
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 	;
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 	; Exception in U mode, preempted in kernel, Intr taken (K mode), orig
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@@ -226,7 +224,7 @@
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 	bset.nz	r11, r11, AUX_IRQ_ACT_BIT_U	; NZ means U
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 	sr	r11, [AUX_IRQ_ACT]
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-	INTERRUPT_EPILOGUE  irq
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+	INTERRUPT_EPILOGUE
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 	rtie
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 ;####### Return from Exception / pure kernel mode #######
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@@ -247,8 +245,8 @@
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 ;
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 ; IRQ RTIE won't reliably restore DE bit and/or BTA, needs workaround
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 ;
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-; Solution is return from Intr w/o any delay slot quirks into a kernel trampoline
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-; and from pure kernel mode return to delay slot which handles DS bit/BTA correctly
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+; Solution is to drop out of interrupt context into pure kernel mode
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+; and return from pure kernel mode which does right things for delay slot
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 .Lintr_ret_to_delay_slot:
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 debug_marker_ds:
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@@ -257,48 +255,9 @@
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 	add	r2, r2, 1
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 	st	r2, [@intr_to_DE_cnt]
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-	ld	r2, [sp, PT_ret]
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-	ld	r3, [sp, PT_status32]
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-
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-	; STAT32 for Int return created from scratch
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-	; (No delay dlot, disable Further intr in trampoline)
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-
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-	bic  	r0, r3, STATUS_U_MASK|STATUS_DE_MASK|STATUS_IE_MASK|STATUS_L_MASK
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-	st	r0, [sp, PT_status32]
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-
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-	mov	r1, .Lintr_ret_to_delay_slot_2
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-	st	r1, [sp, PT_ret]
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-
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-	; Orig exception PC/STAT32 safekept @orig_r0 and @event stack slots
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-	st	r2, [sp, 0]
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-	st	r3, [sp, 4]
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-
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-	b	.Lisr_ret_fast_path
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-
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-.Lintr_ret_to_delay_slot_2:
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-	; Trampoline to restore orig exception PC/STAT32/BTA/AUX_USER_SP
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-	sub	sp, sp, SZ_PT_REGS
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-	st	r9, [sp, -4]
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-
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-	ld	r9, [sp, 0]
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-	sr	r9, [eret]
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-
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-	ld	r9, [sp, 4]
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-	sr	r9, [erstatus]
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-
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-	; restore AUX_USER_SP if returning to U mode
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-	bbit0	r9, STATUS_U_BIT, 1f
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-	ld	r9, [sp, PT_sp]
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-	sr	r9, [AUX_USER_SP]
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-
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-1:
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-	ld	r9, [sp, 8]
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-	sr	r9, [erbta]
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-
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-	ld	r9, [sp, -4]
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-	add	sp, sp, SZ_PT_REGS
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-
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-	; return from pure kernel mode to delay slot
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-	rtie
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+	; drop out of interrupt context (clear AUX_IRQ_ACT.active)
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+	bmskn	r11, r10, 15
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+	sr	r11, [AUX_IRQ_ACT]
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+	b	.Lexcept_ret
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 END(ret_from_exception)