forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-02-19 1c055e55a242a33e574e48be530e06770a210dcd
kernel/drivers/tty/serial/pch_uart.c
....@@ -2,9 +2,6 @@
22 /*
33 *Copyright (C) 2011 LAPIS Semiconductor Co., Ltd.
44 */
5
-#if defined(CONFIG_SERIAL_PCH_UART_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
6
-#define SUPPORT_SYSRQ
7
-#endif
85 #include <linux/kernel.h>
96 #include <linux/serial_reg.h>
107 #include <linux/slab.h>
....@@ -313,32 +310,32 @@
313310 if (!buf)
314311 return 0;
315312
316
- len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
313
+ len += scnprintf(buf + len, PCH_REGS_BUFSIZE - len,
317314 "PCH EG20T port[%d] regs:\n", priv->port.line);
318315
319
- len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
316
+ len += scnprintf(buf + len, PCH_REGS_BUFSIZE - len,
320317 "=================================\n");
321
- len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
318
+ len += scnprintf(buf + len, PCH_REGS_BUFSIZE - len,
322319 "IER: \t0x%02x\n", ioread8(priv->membase + UART_IER));
323
- len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
320
+ len += scnprintf(buf + len, PCH_REGS_BUFSIZE - len,
324321 "IIR: \t0x%02x\n", ioread8(priv->membase + UART_IIR));
325
- len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
322
+ len += scnprintf(buf + len, PCH_REGS_BUFSIZE - len,
326323 "LCR: \t0x%02x\n", ioread8(priv->membase + UART_LCR));
327
- len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
324
+ len += scnprintf(buf + len, PCH_REGS_BUFSIZE - len,
328325 "MCR: \t0x%02x\n", ioread8(priv->membase + UART_MCR));
329
- len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
326
+ len += scnprintf(buf + len, PCH_REGS_BUFSIZE - len,
330327 "LSR: \t0x%02x\n", ioread8(priv->membase + UART_LSR));
331
- len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
328
+ len += scnprintf(buf + len, PCH_REGS_BUFSIZE - len,
332329 "MSR: \t0x%02x\n", ioread8(priv->membase + UART_MSR));
333
- len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
330
+ len += scnprintf(buf + len, PCH_REGS_BUFSIZE - len,
334331 "BRCSR: \t0x%02x\n",
335332 ioread8(priv->membase + PCH_UART_BRCSR));
336333
337334 lcr = ioread8(priv->membase + UART_LCR);
338335 iowrite8(PCH_UART_LCR_DLAB, priv->membase + UART_LCR);
339
- len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
336
+ len += scnprintf(buf + len, PCH_REGS_BUFSIZE - len,
340337 "DLL: \t0x%02x\n", ioread8(priv->membase + UART_DLL));
341
- len += snprintf(buf + len, PCH_REGS_BUFSIZE - len,
338
+ len += scnprintf(buf + len, PCH_REGS_BUFSIZE - len,
342339 "DLM: \t0x%02x\n", ioread8(priv->membase + UART_DLM));
343340 iowrite8(lcr, priv->membase + UART_LCR);
344341
....@@ -587,12 +584,8 @@
587584 if (uart_handle_break(port))
588585 continue;
589586 }
590
-#ifdef SUPPORT_SYSRQ
591
- if (port->sysrq) {
592
- if (uart_handle_sysrq_char(port, rbr))
593
- continue;
594
- }
595
-#endif
587
+ if (uart_handle_sysrq_char(port, rbr))
588
+ continue;
596589
597590 buf[i++] = rbr;
598591 }
....@@ -633,22 +626,6 @@
633626 tty_flip_buffer_push(tport);
634627
635628 return 0;
636
-}
637
-
638
-static int pop_tx_x(struct eg20t_port *priv, unsigned char *buf)
639
-{
640
- int ret = 0;
641
- struct uart_port *port = &priv->port;
642
-
643
- if (port->x_char) {
644
- dev_dbg(priv->port.dev, "%s:X character send %02x (%lu)\n",
645
- __func__, port->x_char, jiffies);
646
- buf[0] = port->x_char;
647
- port->x_char = 0;
648
- ret = 1;
649
- }
650
-
651
- return ret;
652629 }
653630
654631 static int dma_push_rx(struct eg20t_port *priv, int size)
....@@ -734,6 +711,7 @@
734711 if (!chan) {
735712 dev_err(priv->port.dev, "%s:dma_request_channel FAILS(Tx)\n",
736713 __func__);
714
+ pci_dev_put(dma_dev);
737715 return;
738716 }
739717 priv->chan_tx = chan;
....@@ -750,6 +728,7 @@
750728 __func__);
751729 dma_release_channel(priv->chan_tx);
752730 priv->chan_tx = NULL;
731
+ pci_dev_put(dma_dev);
753732 return;
754733 }
755734
....@@ -757,6 +736,8 @@
757736 priv->rx_buf_virt = dma_alloc_coherent(port->dev, port->fifosize,
758737 &priv->rx_buf_dma, GFP_KERNEL);
759738 priv->chan_rx = chan;
739
+
740
+ pci_dev_put(dma_dev);
760741 }
761742
762743 static void pch_dma_rx_complete(void *arg)
....@@ -788,7 +769,7 @@
788769 }
789770 xmit->tail &= UART_XMIT_SIZE - 1;
790771 async_tx_ack(priv->desc_tx);
791
- dma_unmap_sg(port->dev, sg, priv->orig_nent, DMA_TO_DEVICE);
772
+ dma_unmap_sg(port->dev, priv->sg_tx_p, priv->orig_nent, DMA_TO_DEVICE);
792773 priv->tx_dma_use = 0;
793774 priv->nent = 0;
794775 priv->orig_nent = 0;
....@@ -900,9 +881,10 @@
900881
901882 fifo_size = max(priv->fifo_size, 1);
902883 tx_empty = 1;
903
- if (pop_tx_x(priv, xmit->buf)) {
904
- pch_uart_hal_write(priv, xmit->buf, 1);
884
+ if (port->x_char) {
885
+ pch_uart_hal_write(priv, &port->x_char, 1);
905886 port->icount.tx++;
887
+ port->x_char = 0;
906888 tx_empty = 0;
907889 fifo_size--;
908890 }
....@@ -933,7 +915,6 @@
933915 struct scatterlist *sg;
934916 int nent;
935917 int fifo_size;
936
- int tx_empty;
937918 struct dma_async_tx_descriptor *desc;
938919 int num;
939920 int i;
....@@ -958,11 +939,11 @@
958939 }
959940
960941 fifo_size = max(priv->fifo_size, 1);
961
- tx_empty = 1;
962
- if (pop_tx_x(priv, xmit->buf)) {
963
- pch_uart_hal_write(priv, xmit->buf, 1);
942
+
943
+ if (port->x_char) {
944
+ pch_uart_hal_write(priv, &port->x_char, 1);
964945 port->icount.tx++;
965
- tx_empty = 0;
946
+ port->x_char = 0;
966947 fifo_size--;
967948 }
968949
....@@ -991,7 +972,7 @@
991972
992973 priv->tx_dma_use = 1;
993974
994
- priv->sg_tx_p = kcalloc(num, sizeof(struct scatterlist), GFP_ATOMIC);
975
+ priv->sg_tx_p = kmalloc_array(num, sizeof(struct scatterlist), GFP_ATOMIC);
995976 if (!priv->sg_tx_p) {
996977 dev_err(priv->port.dev, "%s:kzalloc Failed\n", __func__);
997978 return 0;
....@@ -1799,6 +1780,7 @@
17991780 priv->port.flags = UPF_BOOT_AUTOCONF;
18001781 priv->port.fifosize = fifosize;
18011782 priv->port.line = board->line_no;
1783
+ priv->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_PCH_UART_CONSOLE);
18021784 priv->trigger = PCH_UART_HAL_TRIGGER_M;
18031785
18041786 snprintf(priv->irq_name, IRQ_NAME_SIZE,
....@@ -1866,41 +1848,24 @@
18661848 kfree(priv);
18671849 return;
18681850 }
1869
-#ifdef CONFIG_PM
1870
-static int pch_uart_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1851
+
1852
+static int __maybe_unused pch_uart_pci_suspend(struct device *dev)
18711853 {
1872
- struct eg20t_port *priv = pci_get_drvdata(pdev);
1854
+ struct eg20t_port *priv = dev_get_drvdata(dev);
18731855
18741856 uart_suspend_port(&pch_uart_driver, &priv->port);
18751857
1876
- pci_save_state(pdev);
1877
- pci_set_power_state(pdev, pci_choose_state(pdev, state));
18781858 return 0;
18791859 }
18801860
1881
-static int pch_uart_pci_resume(struct pci_dev *pdev)
1861
+static int __maybe_unused pch_uart_pci_resume(struct device *dev)
18821862 {
1883
- struct eg20t_port *priv = pci_get_drvdata(pdev);
1884
- int ret;
1885
-
1886
- pci_set_power_state(pdev, PCI_D0);
1887
- pci_restore_state(pdev);
1888
-
1889
- ret = pci_enable_device(pdev);
1890
- if (ret) {
1891
- dev_err(&pdev->dev,
1892
- "%s-pci_enable_device failed(ret=%d) ", __func__, ret);
1893
- return ret;
1894
- }
1863
+ struct eg20t_port *priv = dev_get_drvdata(dev);
18951864
18961865 uart_resume_port(&pch_uart_driver, &priv->port);
18971866
18981867 return 0;
18991868 }
1900
-#else
1901
-#define pch_uart_pci_suspend NULL
1902
-#define pch_uart_pci_resume NULL
1903
-#endif
19041869
19051870 static const struct pci_device_id pch_uart_pci_id[] = {
19061871 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x8811),
....@@ -1954,13 +1919,16 @@
19541919 return ret;
19551920 }
19561921
1922
+static SIMPLE_DEV_PM_OPS(pch_uart_pci_pm_ops,
1923
+ pch_uart_pci_suspend,
1924
+ pch_uart_pci_resume);
1925
+
19571926 static struct pci_driver pch_uart_pci_driver = {
19581927 .name = "pch_uart",
19591928 .id_table = pch_uart_pci_id,
19601929 .probe = pch_uart_pci_probe,
19611930 .remove = pch_uart_pci_remove,
1962
- .suspend = pch_uart_pci_suspend,
1963
- .resume = pch_uart_pci_resume,
1931
+ .driver.pm = &pch_uart_pci_pm_ops,
19641932 };
19651933
19661934 static int __init pch_uart_module_init(void)