~hc/RK356X_SDK_RELEASE.git

..	..	@@ -1,15 +1,16 @@
1		-/* SPDX-License-Identifier: GPL-2.0 */
2	1	/*
3	2	* HND Run Time Environment ioctl.
4	3	*
5		- * Copyright (C) 1999-2019, Broadcom Corporation
6		- *
	4	+ * Portions of this code are copyright (c) 2022 Cypress Semiconductor Corporation
	5	+ *
	6	+ * Copyright (C) 1999-2017, Broadcom Corporation
	7	+ *
7	8	* Unless you and Broadcom execute a separate written software license
8	9	* agreement governing use of this software, this software is licensed to you
9	10	* under the terms of the GNU General Public License version 2 (the "GPL"),
10	11	* available at http://www.broadcom.com/licenses/GPLv2.php, with the
11	12	* following added to such license:
12		- *
	13	+ *
13	14	* As a special exception, the copyright holders of this software give you
14	15	* permission to link this software with independent modules, and to copy and
15	16	* distribute the resulting executable under terms of your choice, provided that
..	..	@@ -17,7 +18,7 @@
17	18	* the license of that module. An independent module is a module which is not
18	19	* derived from this software. The special exception does not apply to any
19	20	* modifications of the software.
20		- *
	21	+ *
21	22	* Notwithstanding the above, under no circumstances may you combine this
22	23	* software in any way with any other Broadcom software provided under a license
23	24	* other than the GPL, without Broadcom's express prior written consent.
..	..	@@ -25,7 +26,7 @@
25	26	*
26	27	* <<Broadcom-WL-IPTag/Open:>>
27	28	*
28		- * $Id: rte_ioctl.h 514727 2014-11-12 03:02:48Z $
	29	+ * $Id: rte_ioctl.h 699094 2017-05-11 22:41:10Z $
29	30	*/
30	31
31	32	#ifndef _rte_ioctl_h_
..	..	@@ -45,6 +46,12 @@
45	46	#define RTEGPERMADDR 0x890B
46	47	#define RTEDEVPWRSTCHG 0x890C /* Device pwr state change for PCIedev */
47	48	#define RTEDEVPMETOGGLE 0x890D /* Toggle PME# to wake up the host */
	49	+#define RTEDEVTIMESYNC 0x890E /* Device TimeSync */
	50	+#define RTEDEVDSNOTIFY 0x890F /* Bus DS state notification */
	51	+#define RTED11DMALPBK_INIT 0x8910 /* D11 DMA loopback init */
	52	+#define RTED11DMALPBK_UNINIT 0x8911 /* D11 DMA loopback uninit */
	53	+#define RTED11DMALPBK_RUN 0x8912 /* D11 DMA loopback run */
	54	+#define RTEDEVTSBUFPOST 0x8913 /* Async interface for tsync buffer post */
48	55
49	56	#define RTE_IOCTL_QUERY 0x00
50	57	#define RTE_IOCTL_SET 0x01
..	..	@@ -62,10 +69,15 @@
62	69	BUS_FLUSH_RXREORDER_Q = 4,
63	70	BUS_SET_LTR_STATE = 5,
64	71	BUS_FLUSH_CHAINED_PKTS = 6,
65		- BUS_SET_COPY_COUNT = 7
	72	+ BUS_SET_COPY_COUNT = 7,
	73	+ BUS_UPDATE_FLOW_PKTS_MAX = 8,
	74	+ BUS_UPDATE_EXTRA_TXLFRAGS = 9,
	75	+ BUS_UPDATE_FRWD_RESRV_BUFCNT = 10,
	76	+ BUS_PCIE_CONFIG_ACCESS = 11
66	77	};
67	78
68	79	#define SDPCMDEV_SET_MAXTXPKTGLOM 1
	80	+#define RTE_MEMUSEINFO_VER 0x00
69	81
70	82	typedef struct memuse_info {
71	83	uint16 ver; /* version of this struct */
..	..	@@ -81,6 +93,13 @@
81	93	uint32 inuse_hwm; /* High watermark of memory - reclaimed memory */
82	94	uint32 inuse_overhead; /* tally of allocated mem_t blocks */
83	95	uint32 inuse_total; /* Heap in-use + Heap overhead memory */
	96	+ uint32 free_lwm; /* Least free size since reclaim */
	97	+ uint32 mf_count; /* Malloc failure count */
84	98	} memuse_info_t;
85	99
	100	+/* For D11 DMA loopback test */
	101	+typedef struct d11_dmalpbk_args {
	102	+ uint8 *buf;
	103	+ int32 len;
	104	+} d11_dmalpbk_args_t;
86	105	#endif /* _rte_ioctl_h_ */