forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-02-19 1c055e55a242a33e574e48be530e06770a210dcd
kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/include/bcmsdstd.h
....@@ -1,15 +1,16 @@
1
-/* SPDX-License-Identifier: GPL-2.0 */
21 /*
32 * 'Standard' SDIO HOST CONTROLLER driver
43 *
5
- * Copyright (C) 1999-2019, Broadcom Corporation
6
- *
4
+ * Portions of this code are copyright (c) 2022 Cypress Semiconductor Corporation
5
+ *
6
+ * Copyright (C) 1999-2017, Broadcom Corporation
7
+ *
78 * Unless you and Broadcom execute a separate written software license
89 * agreement governing use of this software, this software is licensed to you
910 * under the terms of the GNU General Public License version 2 (the "GPL"),
1011 * available at http://www.broadcom.com/licenses/GPLv2.php, with the
1112 * following added to such license:
12
- *
13
+ *
1314 * As a special exception, the copyright holders of this software give you
1415 * permission to link this software with independent modules, and to copy and
1516 * distribute the resulting executable under terms of your choice, provided that
....@@ -17,7 +18,7 @@
1718 * the license of that module. An independent module is a module which is not
1819 * derived from this software. The special exception does not apply to any
1920 * modifications of the software.
20
- *
21
+ *
2122 * Notwithstanding the above, under no circumstances may you combine this
2223 * software in any way with any other Broadcom software provided under a license
2324 * other than the GPL, without Broadcom's express prior written consent.
....@@ -25,7 +26,7 @@
2526 *
2627 * <<Broadcom-WL-IPTag/Open:>>
2728 *
28
- * $Id: bcmsdstd.h 514727 2014-11-12 03:02:48Z $
29
+ * $Id: bcmsdstd.h 663318 2016-10-04 19:02:16Z $
2930 */
3031 #ifndef _BCM_SD_STD_H
3132 #define _BCM_SD_STD_H
....@@ -82,9 +83,13 @@
8283 #define SDIOH_CMD7_EXP_STATUS 0x00001E00
8384
8485 #define RETRIES_LARGE 100000
86
+#ifdef BCMQT
87
+extern void sdstd_os_yield(sdioh_info_t *sd);
88
+#define RETRIES_SMALL 10000
89
+#else
8590 #define sdstd_os_yield(sd) do {} while (0)
8691 #define RETRIES_SMALL 100
87
-
92
+#endif // endif
8893
8994 #define USE_BLOCKMODE 0x2 /* Block mode can be single block or multi */
9095 #define USE_MULTIBLOCK 0x4
....@@ -94,7 +99,6 @@
9499 #define CLIENT_INTR 0x100 /* Get rid of this! */
95100
96101 #define HC_INTR_RETUNING 0x1000
97
-
98102
99103 #ifdef BCMSDIOH_TXGLOM
100104 /* Total glom pkt can not exceed 64K
....@@ -108,16 +112,16 @@
108112 ulong dma_phys_arr[SDIOH_MAXGLOM_SIZE]; /* DMA_MAPed address of frames */
109113 uint16 nbytes[SDIOH_MAXGLOM_SIZE]; /* Size of each frame */
110114 } glom_buf_t;
111
-#endif
115
+#endif // endif
112116
113117 struct sdioh_info {
114
- uint cfg_bar; /* pci cfg address for bar */
115
- uint32 caps; /* cached value of capabilities reg */
116
- uint32 curr_caps; /* max current capabilities reg */
118
+ uint cfg_bar; /* pci cfg address for bar */
119
+ uint32 caps; /* cached value of capabilities reg */
120
+ uint32 curr_caps; /* max current capabilities reg */
117121
118
- osl_t *osh; /* osh handler */
119
- volatile char *mem_space; /* pci device memory va */
120
- uint lockcount; /* nest count of sdstd_lock() calls */
122
+ osl_t *osh; /* osh handler */
123
+ volatile char *mem_space; /* pci device memory va */
124
+ uint lockcount; /* nest count of sdstd_lock() calls */
121125 bool client_intr_enabled; /* interrupt connnected flag */
122126 bool intr_handler_valid; /* client driver interrupt handler valid */
123127 sdioh_cb_fn_t intr_handler; /* registered interrupt handler */
....@@ -163,12 +167,12 @@
163167 ulong adma2_dscr_start_phys;
164168 uint alloced_adma2_dscr_size;
165169
166
- int r_cnt; /* rx count */
167
- int t_cnt; /* tx_count */
170
+ int r_cnt; /* rx count */
171
+ int t_cnt; /* tx_count */
168172 bool got_hcint; /* local interrupt flag */
169173 uint16 last_intrstatus; /* to cache intrstatus */
170
- int host_UHSISupported; /* whether UHSI is supported for HC. */
171
- int card_UHSI_voltage_Supported; /* whether UHSI is supported for
174
+ int host_UHSISupported; /* whether UHSI is supported for HC. */
175
+ int card_UHSI_voltage_Supported; /* whether UHSI is supported for
172176 * Card in terms of Voltage [1.8 or 3.3].
173177 */
174178 int global_UHSI_Supp; /* type of UHSI support in both host and card.
....@@ -176,14 +180,15 @@
176180 * HOST_SDR_12_25: SDR12 and SDR25 supported
177181 * HOST_SDR_50_104_DDR: one of SDR50/SDR104 or DDR50 supptd
178182 */
179
- volatile int sd3_dat_state; /* data transfer state used for retuning check */
180
- volatile int sd3_tun_state; /* tuning state used for retuning check */
181
- bool sd3_tuning_reqd; /* tuning requirement parameter */
183
+ volatile int sd3_dat_state; /* data transfer state used for retuning check */
184
+ volatile int sd3_tun_state; /* tuning state used for retuning check */
185
+ bool sd3_tuning_reqd; /* tuning requirement parameter */
186
+ bool sd3_tuning_disable; /* tuning disable due to bus sleeping */
182187 uint32 caps3; /* cached value of 32 MSbits capabilities reg (SDIO 3.0) */
183188 #ifdef BCMSDIOH_TXGLOM
184189 glom_buf_t glom_info; /* pkt information used for glomming */
185190 uint txglom_mode; /* Txglom mode: 0 - copy, 1 - multi-descriptor */
186
-#endif
191
+#endif // endif
187192 };
188193
189194 #define DMA_MODE_NONE 0
....@@ -207,12 +212,10 @@
207212 #define CHECK_TUNING_PRE_DATA 1
208213 #define CHECK_TUNING_POST_DATA 2
209214
210
-
211215 #ifdef DHD_DEBUG
212216 #define SD_DHD_DISABLE_PERIODIC_TUNING 0x01
213217 #define SD_DHD_ENABLE_PERIODIC_TUNING 0x00
214
-#endif
215
-
218
+#endif // endif
216219
217220 /************************************************************
218221 * Internal interfaces: per-port references into bcmsdstd.c
....@@ -234,7 +237,6 @@
234237
235238 /* Wait for specified interrupt and error bits to be set */
236239 extern void sdstd_spinbits(sdioh_info_t *sd, uint16 norm, uint16 err);
237
-
238240
239241 /**************************************************************
240242 * Internal interfaces: bcmsdstd.c references to per-port code