~hc/RK356X_SDK_RELEASE.git

..	..	@@ -1,18 +1,19 @@
1		-/* SPDX-License-Identifier: GPL-2.0 */
2	1	/*
3	2	* MSGBUF network driver ioctl/indication encoding
4	3	* Broadcom 802.11abg Networking Device Driver
5	4	*
6	5	* Definitions subject to change without notice.
7	6	*
8		- * Copyright (C) 1999-2019, Broadcom Corporation
9		- *
	7	+ * Portions of this code are copyright (c) 2022 Cypress Semiconductor Corporation
	8	+ *
	9	+ * Copyright (C) 1999-2017, Broadcom Corporation
	10	+ *
10	11	* Unless you and Broadcom execute a separate written software license
11	12	* agreement governing use of this software, this software is licensed to you
12	13	* under the terms of the GNU General Public License version 2 (the "GPL"),
13	14	* available at http://www.broadcom.com/licenses/GPLv2.php, with the
14	15	* following added to such license:
15		- *
	16	+ *
16	17	* As a special exception, the copyright holders of this software give you
17	18	* permission to link this software with independent modules, and to copy and
18	19	* distribute the resulting executable under terms of your choice, provided that
..	..	@@ -20,7 +21,7 @@
20	21	* the license of that module. An independent module is a module which is not
21	22	* derived from this software. The special exception does not apply to any
22	23	* modifications of the software.
23		- *
	24	+ *
24	25	* Notwithstanding the above, under no circumstances may you combine this
25	26	* software in any way with any other Broadcom software provided under a license
26	27	* other than the GPL, without Broadcom's express prior written consent.
..	..	@@ -28,12 +29,12 @@
28	29	*
29	30	* <<Broadcom-WL-IPTag/Open:>>
30	31	*
31		- * $Id: bcmmsgbuf.h 541060 2015-03-13 23:28:01Z $
	32	+ * $Id$
32	33	*/
33	34	#ifndef _bcmmsgbuf_h_
34	35	#define _bcmmsgbuf_h_
35	36
36		-#include <proto/ethernet.h>
	37	+#include <ethernet.h>
37	38	#include <wlioctl.h>
38	39	#include <bcmpcie.h>
39	40
..	..	@@ -48,15 +49,32 @@
48	49	#define H2DRING_TXPOST_ITEMSIZE 48
49	50	#define H2DRING_RXPOST_ITEMSIZE 32
50	51	#define H2DRING_CTRL_SUB_ITEMSIZE 40
51		-#define D2HRING_TXCMPLT_ITEMSIZE 16
52		-#define D2HRING_RXCMPLT_ITEMSIZE 32
	52	+
	53	+#define D2HRING_TXCMPLT_ITEMSIZE 24
	54	+#define D2HRING_RXCMPLT_ITEMSIZE 40
	55	+
	56	+#define D2HRING_TXCMPLT_ITEMSIZE_PREREV7 16
	57	+#define D2HRING_RXCMPLT_ITEMSIZE_PREREV7 32
	58	+
53	59	#define D2HRING_CTRL_CMPLT_ITEMSIZE 24
	60	+#define H2DRING_INFO_BUFPOST_ITEMSIZE H2DRING_CTRL_SUB_ITEMSIZE
	61	+#define D2HRING_INFO_BUFCMPLT_ITEMSIZE D2HRING_CTRL_CMPLT_ITEMSIZE
	62	+
	63	+#define D2HRING_SNAPSHOT_CMPLT_ITEMSIZE 20
54	64
55	65	#define H2DRING_TXPOST_MAX_ITEM 512
56	66	#define H2DRING_RXPOST_MAX_ITEM 512
57	67	#define H2DRING_CTRL_SUB_MAX_ITEM 64
58	68	#define D2HRING_TXCMPLT_MAX_ITEM 1024
59	69	#define D2HRING_RXCMPLT_MAX_ITEM 512
	70	+
	71	+#define H2DRING_DYNAMIC_INFO_MAX_ITEM 32
	72	+#define D2HRING_DYNAMIC_INFO_MAX_ITEM 32
	73	+
	74	+#define D2HRING_EDL_HDR_SIZE 48u
	75	+#define D2HRING_EDL_ITEMSIZE 2048u
	76	+#define D2HRING_EDL_MAX_ITEM 256u
	77	+#define D2HRING_EDL_WATERMARK (D2HRING_EDL_MAX_ITEM >> 5u)
60	78
61	79	#define D2HRING_CTRL_CMPLT_MAX_ITEM 64
62	80
..	..	@@ -74,6 +92,11 @@
74	92	};
75	93
76	94	#define MESSAGE_PAYLOAD(a) (a & MSG_TYPE_INTERNAL_USE_START) ? TRUE : FALSE
	95	+#define PCIEDEV_FIRMWARE_TSINFO 0x1
	96	+#define PCIEDEV_FIRMWARE_TSINFO_FIRST 0x1
	97	+#define PCIEDEV_FIRMWARE_TSINFO_MIDDLE 0x2
	98	+#define PCIEDEV_BTLOG_POST 0x3
	99	+#define PCIEDEV_BT_SNAPSHOT_POST 0x4
77	100
78	101	#ifdef PCIE_API_REV1
79	102
..	..	@@ -136,12 +159,16 @@
136	159
137	160	/** message type */
138	161	typedef enum bcmpcie_msgtype {
139		- MSG_TYPE_GEN_STATUS = 0x1,
	162	+ MSG_TYPE_GEN_STATUS = 0x1,
140	163	MSG_TYPE_RING_STATUS = 0x2,
141	164	MSG_TYPE_FLOW_RING_CREATE = 0x3,
142	165	MSG_TYPE_FLOW_RING_CREATE_CMPLT = 0x4,
	166	+ /* Enum value as copied from BISON 7.15: new generic message */
	167	+ MSG_TYPE_RING_CREATE_CMPLT = 0x4,
143	168	MSG_TYPE_FLOW_RING_DELETE = 0x5,
144	169	MSG_TYPE_FLOW_RING_DELETE_CMPLT = 0x6,
	170	+ /* Enum value as copied from BISON 7.15: new generic message */
	171	+ MSG_TYPE_RING_DELETE_CMPLT = 0x6,
145	172	MSG_TYPE_FLOW_RING_FLUSH = 0x7,
146	173	MSG_TYPE_FLOW_RING_FLUSH_CMPLT = 0x8,
147	174	MSG_TYPE_IOCTLPTR_REQ = 0x9,
..	..	@@ -154,7 +181,7 @@
154	181	MSG_TYPE_TX_STATUS = 0x10,
155	182	MSG_TYPE_RXBUF_POST = 0x11,
156	183	MSG_TYPE_RX_CMPLT = 0x12,
157		- MSG_TYPE_LPBK_DMAXFER = 0x13,
	184	+ MSG_TYPE_LPBK_DMAXFER = 0x13,
158	185	MSG_TYPE_LPBK_DMAXFER_CMPLT = 0x14,
159	186	MSG_TYPE_FLOW_RING_RESUME = 0x15,
160	187	MSG_TYPE_FLOW_RING_RESUME_CMPLT = 0x16,
..	..	@@ -172,7 +199,16 @@
172	199	MSG_TYPE_D2H_RING_CONFIG_CMPLT = 0x22,
173	200	MSG_TYPE_H2D_MAILBOX_DATA = 0x23,
174	201	MSG_TYPE_D2H_MAILBOX_DATA = 0x24,
175		-
	202	+ MSG_TYPE_TIMSTAMP_BUFPOST = 0x25,
	203	+ MSG_TYPE_HOSTTIMSTAMP = 0x26,
	204	+ MSG_TYPE_HOSTTIMSTAMP_CMPLT = 0x27,
	205	+ MSG_TYPE_FIRMWARE_TIMESTAMP = 0x28,
	206	+ MSG_TYPE_SNAPSHOT_UPLOAD = 0x29,
	207	+ MSG_TYPE_SNAPSHOT_CMPLT = 0x2A,
	208	+ MSG_TYPE_H2D_RING_DELETE = 0x2B,
	209	+ MSG_TYPE_D2H_RING_DELETE = 0x2C,
	210	+ MSG_TYPE_H2D_RING_DELETE_CMPLT = 0x2D,
	211	+ MSG_TYPE_D2H_RING_DELETE_CMPLT = 0x2E,
176	212	MSG_TYPE_API_MAX_RSVD = 0x3F
177	213	} bcmpcie_msg_type_t;
178	214
..	..	@@ -184,7 +220,14 @@
184	220	MSG_TYPE_HOST_FETCH = 0x44,
185	221	MSG_TYPE_LPBK_DMAXFER_PYLD = 0x45,
186	222	MSG_TYPE_TXMETADATA_PYLD = 0x46,
187		- MSG_TYPE_INDX_UPDATE = 0x47
	223	+ MSG_TYPE_INDX_UPDATE = 0x47,
	224	+ MSG_TYPE_INFO_PYLD = 0x48,
	225	+ MSG_TYPE_TS_EVENT_PYLD = 0x49,
	226	+ MSG_TYPE_PVT_BTLOG_CMPLT = 0x4A,
	227	+ MSG_TYPE_BTLOG_PYLD = 0x4B,
	228	+ MSG_TYPE_HMAPTEST_PYLD = 0x4C,
	229	+ MSG_TYPE_PVT_BT_SNAPSHOT_CMPLT = 0x4D,
	230	+ MSG_TYPE_BT_SNAPSHOT_PYLD = 0x4E
188	231	} bcmpcie_msgtype_int_t;
189	232
190	233	typedef enum bcmpcie_msgtype_u {
..	..	@@ -212,6 +255,44 @@
212	255	uint16 msecs; /* interrupt coalescing: timeout in millisecs */
213	256	} bcmpcie_soft_doorbell_t;
214	257
	258	+/**
	259	+ * D2H interrupt using MSI instead of INTX
	260	+ * Host configures MSI vector offset for each D2H interrupt
	261	+ *
	262	+ * D2H_RING_CONFIG_SUBTYPE_MSI_DOORBELL
	263	+ */
	264	+typedef enum bcmpcie_msi_intr_idx {
	265	+ MSI_INTR_IDX_CTRL_CMPL_RING = 0,
	266	+ MSI_INTR_IDX_TXP_CMPL_RING = 1,
	267	+ MSI_INTR_IDX_RXP_CMPL_RING = 2,
	268	+ MSI_INTR_IDX_INFO_CMPL_RING = 3,
	269	+ MSI_INTR_IDX_MAILBOX = 4,
	270	+ MSI_INTR_IDX_MAX = 5
	271	+} bcmpcie_msi_intr_idx_t;
	272	+
	273	+#define BCMPCIE_D2H_MSI_OFFSET_SINGLE 0
	274	+typedef enum bcmpcie_msi_offset_type {
	275	+ BCMPCIE_D2H_MSI_OFFSET_MB0 = 2,
	276	+ BCMPCIE_D2H_MSI_OFFSET_MB1 = 3,
	277	+ BCMPCIE_D2H_MSI_OFFSET_DB0 = 4,
	278	+ BCMPCIE_D2H_MSI_OFFSET_DB1 = 5,
	279	+ BCMPCIE_D2H_MSI_OFFSET_H1_DB0 = 6,
	280	+ BCMPCIE_D2H_MSI_OFFSET_MAX = 7
	281	+} bcmpcie_msi_offset_type_t;
	282	+
	283	+typedef struct bcmpcie_msi_offset {
	284	+ uint16 intr_idx; /* interrupt index */
	285	+ uint16 msi_offset; /* msi vector offset */
	286	+} bcmpcie_msi_offset_t;
	287	+
	288	+typedef struct bcmpcie_msi_offset_config {
	289	+ uint32 len;
	290	+ bcmpcie_msi_offset_t bcmpcie_msi_offset[MSI_INTR_IDX_MAX];
	291	+} bcmpcie_msi_offset_config_t;
	292	+
	293	+#define BCMPCIE_D2H_MSI_OFFSET_DEFAULT BCMPCIE_D2H_MSI_OFFSET_DB1
	294	+
	295	+#define BCMPCIE_D2H_MSI_SINGLE 0xFFFE
215	296
216	297	/* if_id */
217	298	#define BCMPCIE_CMNHDR_IFIDX_PHYINTF_SHFT 5
..	..	@@ -226,13 +307,14 @@
226	307	/* flags */
227	308	#define BCMPCIE_CMNHDR_FLAGS_DMA_R_IDX 0x1
228	309	#define BCMPCIE_CMNHDR_FLAGS_DMA_R_IDX_INTR 0x2
	310	+#define BCMPCIE_CMNHDR_FLAGS_TS_SEQNUM_INIT 0x4
229	311	#define BCMPCIE_CMNHDR_FLAGS_PHASE_BIT 0x80
230		-
	312	+#define BCMPCIE_CMNHDR_PHASE_BIT_INIT 0x80
231	313
232	314	/* IOCTL request message */
233	315	typedef struct ioctl_req_msg {
234	316	/** common message header */
235		- cmn_msg_hdr_t cmn_hdr;
	317	+ cmn_msg_hdr_t cmn_hdr;
236	318	/** ioctl command type */
237	319	uint32 cmd;
238	320	/** ioctl transaction ID, to pair with a ioctl response */
..	..	@@ -262,6 +344,76 @@
262	344	uint32 rsvd[4];
263	345	} ioctl_resp_evt_buf_post_msg_t;
264	346
	347	+/* buffer post messages for device to use to return dbg buffers */
	348	+typedef ioctl_resp_evt_buf_post_msg_t info_buf_post_msg_t;
	349	+
	350	+#define DHD_INFOBUF_RX_BUFPOST_PKTSZ (2 * 1024)
	351	+
	352	+#define DHD_BTLOG_RX_BUFPOST_PKTSZ (2 * 1024)
	353	+
	354	+/* An infobuf host buffer starts with a 32 bit (LE) version. */
	355	+#define PCIE_INFOBUF_V1 1
	356	+/* Infobuf v1 type MSGTRACE's data is exactly the same as the MSGTRACE data that
	357	+ * is wrapped previously/also in a WLC_E_TRACE event. See structure
	358	+ * msgrace_hdr_t in msgtrace.h.
	359	+*/
	360	+#define PCIE_INFOBUF_V1_TYPE_MSGTRACE 1
	361	+
	362	+/* Infobuf v1 type LOGTRACE data is exactly the same as the LOGTRACE data that
	363	+ * is wrapped previously/also in a WLC_E_TRACE event. See structure
	364	+ * msgrace_hdr_t in msgtrace.h. (The only difference between a MSGTRACE
	365	+ * and a LOGTRACE is the "trace type" field.)
	366	+*/
	367	+#define PCIE_INFOBUF_V1_TYPE_LOGTRACE 2
	368	+
	369	+/* An infobuf version 1 host buffer has a single TLV. The information on the
	370	+ * version 1 types follow this structure definition. (int's LE)
	371	+*/
	372	+typedef struct info_buf_payload_hdr_s {
	373	+ uint16 type;
	374	+ uint16 length;
	375	+} info_buf_payload_hdr_t;
	376	+
	377	+/* BT logs/memory to DMA directly from BT memory to host */
	378	+typedef struct info_buf_btlog_s {
	379	+ void (status_cb)(void ctx, void p, int error); / obsolete - to be removed */
	380	+ void *ctx;
	381	+ dma64addr_t src_addr;
	382	+ uint32 length;
	383	+ bool (pcie_status_cb)(osl_t osh, void *p, int error);
	384	+ uint32 bt_intstatus;
	385	+ int error;
	386	+} info_buf_btlog_t;
	387	+
	388	+/** snapshot upload request message */
	389	+typedef struct snapshot_upload_request_msg {
	390	+ /** common message header */
	391	+ cmn_msg_hdr_t cmn_hdr;
	392	+ /** length of the snaphost buffer supplied */
	393	+ uint32 snapshot_buf_len;
	394	+ /** type of snapshot */
	395	+ uint8 snapshot_type;
	396	+ /** snapshot param */
	397	+ uint8 snapshot_param;
	398	+ /** to align the host address on 8 byte boundary */
	399	+ uint8 reserved[2];
	400	+ /** always align on 8 byte boundary */
	401	+ bcm_addr64_t host_buf_addr;
	402	+ uint32 rsvd[4];
	403	+} snapshot_upload_request_msg_t;
	404	+
	405	+/** snapshot types */
	406	+typedef enum bcmpcie_snapshot_type {
	407	+ SNAPSHOT_TYPE_BT = 0, /* Bluetooth SRAM and patch RAM */
	408	+ SNAPSHOT_TYPE_WLAN_SOCRAM = 1, /* WLAN SOCRAM */
	409	+ SNAPSHOT_TYPE_WLAN_HEAP = 2, /* WLAN HEAP */
	410	+ SNAPSHOT_TYPE_WLAN_REGISTER = 3 /* WLAN registers */
	411	+} bcmpcie_snapshot_type_t;
	412	+
	413	+#define PCIE_DMA_XFER_FLG_D11_LPBK_MASK 0xF
	414	+#define PCIE_DMA_XFER_FLG_D11_LPBK_SHIFT 2
	415	+#define PCIE_DMA_XFER_FLG_CORE_NUMBER_MASK 3
	416	+#define PCIE_DMA_XFER_FLG_CORE_NUMBER_SHIFT 0
265	417
266	418	typedef struct pcie_dma_xfer_params {
267	419	/** common message header */
..	..	@@ -279,20 +431,26 @@
279	431	uint32 srcdelay;
280	432	/** delay before doing the dest txfer */
281	433	uint32 destdelay;
282		- uint32 rsvd;
	434	+ uint8 rsvd[3];
	435	+ /* bit0: D11 DMA loopback flag */
	436	+ uint8 flags;
283	437	} pcie_dma_xfer_params_t;
284	438
	439	+#define BCMPCIE_FLOW_RING_INTF_HP2P 0x1
285	440	/** Complete msgbuf hdr for flow ring update from host to dongle */
286	441	typedef struct tx_flowring_create_request {
287	442	cmn_msg_hdr_t msg;
288	443	uint8 da[ETHER_ADDR_LEN];
289	444	uint8 sa[ETHER_ADDR_LEN];
290	445	uint8 tid;
291		- uint8 if_flags;
	446	+ uint8 if_flags;
292	447	uint16 flow_ring_id;
293		- uint8 tc;
294		- uint8 priority;
295		- uint16 int_vector;
	448	+ uint8 tc;
	449	+ /* priority_ifrmmask is to define core mask in ifrm mode.
	450	+ * currently it is not used for priority. so uses solely for ifrm mask
	451	+ */
	452	+ uint8 priority_ifrmmask;
	453	+ uint16 int_vector;
296	454	uint16 max_items;
297	455	uint16 len_item;
298	456	bcm_addr64_t flow_ring_ptr;
..	..	@@ -301,14 +459,17 @@
301	459	typedef struct tx_flowring_delete_request {
302	460	cmn_msg_hdr_t msg;
303	461	uint16 flow_ring_id;
304		- uint16 reason;
	462	+ uint16 reason;
305	463	uint32 rsvd[7];
306	464	} tx_flowring_delete_request_t;
	465	+
	466	+typedef tx_flowring_delete_request_t d2h_ring_delete_req_t;
	467	+typedef tx_flowring_delete_request_t h2d_ring_delete_req_t;
307	468
308	469	typedef struct tx_flowring_flush_request {
309	470	cmn_msg_hdr_t msg;
310	471	uint16 flow_ring_id;
311		- uint16 reason;
	472	+ uint16 reason;
312	473	uint32 rsvd[7];
313	474	} tx_flowring_flush_request_t;
314	475
..	..	@@ -328,8 +489,73 @@
328	489	uint32 data[6];
329	490	/** D2H_RING_CONFIG_SUBTYPE_SOFT_DOORBELL */
330	491	bcmpcie_soft_doorbell_t soft_doorbell;
	492	+ /** D2H_RING_CONFIG_SUBTYPE_MSI_DOORBELL */
	493	+ bcmpcie_msi_offset_config_t msi_offset;
331	494	};
332	495	} ring_config_req_t;
	496	+
	497	+/* data structure to use to create on the fly d2h rings */
	498	+typedef struct d2h_ring_create_req {
	499	+ cmn_msg_hdr_t msg;
	500	+ uint16 ring_id;
	501	+ uint16 ring_type;
	502	+ uint32 flags;
	503	+ bcm_addr64_t ring_ptr;
	504	+ uint16 max_items;
	505	+ uint16 len_item;
	506	+ uint32 rsvd[3];
	507	+} d2h_ring_create_req_t;
	508	+
	509	+/* data structure to use to create on the fly h2d rings */
	510	+#define MAX_COMPLETION_RING_IDS_ASSOCIATED 4
	511	+typedef struct h2d_ring_create_req {
	512	+ cmn_msg_hdr_t msg;
	513	+ uint16 ring_id;
	514	+ uint8 ring_type;
	515	+ uint8 n_completion_ids;
	516	+ uint32 flags;
	517	+ bcm_addr64_t ring_ptr;
	518	+ uint16 max_items;
	519	+ uint16 len_item;
	520	+ uint16 completion_ring_ids[MAX_COMPLETION_RING_IDS_ASSOCIATED];
	521	+ uint32 rsvd;
	522	+} h2d_ring_create_req_t;
	523	+
	524	+typedef struct d2h_ring_config_req {
	525	+ cmn_msg_hdr_t msg;
	526	+ uint16 d2h_ring_config_subtype;
	527	+ uint16 d2h_ring_id;
	528	+ uint32 d2h_ring_config_data[4];
	529	+ uint32 rsvd[3];
	530	+} d2h_ring_config_req_t;
	531	+
	532	+typedef struct h2d_ring_config_req {
	533	+ cmn_msg_hdr_t msg;
	534	+ uint16 h2d_ring_config_subtype;
	535	+ uint16 h2d_ring_id;
	536	+ uint32 h2d_ring_config_data;
	537	+ uint32 rsvd[6];
	538	+} h2d_ring_config_req_t;
	539	+
	540	+typedef struct h2d_mailbox_data {
	541	+ cmn_msg_hdr_t msg;
	542	+ uint32 mail_box_data;
	543	+ uint32 rsvd[7];
	544	+} h2d_mailbox_data_t;
	545	+typedef struct host_timestamp_msg {
	546	+ cmn_msg_hdr_t msg;
	547	+ uint16 xt_id; /* transaction ID */
	548	+ uint16 input_data_len; /* data len at the host_buf_addr, data in TLVs */
	549	+ uint16 seqnum; /* number of times host captured the timestamp */
	550	+ uint16 rsvd;
	551	+ /* always align on 8 byte boundary */
	552	+ bcm_addr64_t host_buf_addr;
	553	+ /* rsvd */
	554	+ uint32 rsvd1[4];
	555	+} host_timestamp_msg_t;
	556	+
	557	+/* buffer post message for timestamp events MSG_TYPE_TIMSTAMP_BUFPOST */
	558	+typedef ioctl_resp_evt_buf_post_msg_t ts_buf_post_msg_t;
333	559
334	560	typedef union ctrl_submit_item {
335	561	ioctl_req_msg_t ioctl_req;
..	..	@@ -339,19 +565,77 @@
339	565	tx_flowring_delete_request_t flow_delete;
340	566	tx_flowring_flush_request_t flow_flush;
341	567	ring_config_req_t ring_config_req;
	568	+ d2h_ring_create_req_t d2h_create;
	569	+ h2d_ring_create_req_t h2d_create;
	570	+ d2h_ring_config_req_t d2h_config;
	571	+ h2d_ring_config_req_t h2d_config;
	572	+ h2d_mailbox_data_t h2d_mailbox_data;
	573	+ host_timestamp_msg_t host_ts;
	574	+ ts_buf_post_msg_t ts_buf_post;
	575	+ d2h_ring_delete_req_t d2h_delete;
	576	+ h2d_ring_delete_req_t h2d_delete;
342	577	unsigned char check[H2DRING_CTRL_SUB_ITEMSIZE];
343	578	} ctrl_submit_item_t;
	579	+
	580	+typedef struct info_ring_submit_item {
	581	+ info_buf_post_msg_t info_buf_post;
	582	+ unsigned char check[H2DRING_INFO_BUFPOST_ITEMSIZE];
	583	+} info_sumbit_item_t;
344	584
345	585	/** Control Completion messages (20 bytes) */
346	586	typedef struct compl_msg_hdr {
347	587	/** status for the completion */
348	588	int16 status;
349	589	/** submisison flow ring id which generated this status */
350		- uint16 flow_ring_id;
	590	+ union {
	591	+ uint16 ring_id;
	592	+ uint16 flow_ring_id;
	593	+ };
351	594	} compl_msg_hdr_t;
352	595
353	596	/** XOR checksum or a magic number to audit DMA done */
354	597	typedef uint32 dma_done_t;
	598	+
	599	+#define MAX_CLKSRC_ID 0xF
	600	+#define TX_PKT_RETRY_CNT_0_MASK 0x000000FF
	601	+#define TX_PKT_RETRY_CNT_0_SHIFT 0
	602	+#define TX_PKT_RETRY_CNT_1_MASK 0x0000FF00
	603	+#define TX_PKT_RETRY_CNT_1_SHIFT 8
	604	+#define TX_PKT_RETRY_CNT_2_MASK 0x00FF0000
	605	+#define TX_PKT_RETRY_CNT_2_SHIFT 16
	606	+#define TX_PKT_BAND_INFO 0x0F000000
	607	+#define TX_PKT_BAND_INFO_SHIFT 24
	608	+#define TX_PKT_VALID_INFO 0xF0000000
	609	+#define TX_PKT_VALID_INFO_SHIFT 28
	610	+
	611	+typedef struct ts_timestamp_srcid {
	612	+ union {
	613	+ uint32 ts_low; /* time stamp low 32 bits */
	614	+ uint32 rate_spec; /* use ratespec */
	615	+ };
	616	+ union {
	617	+ uint32 ts_high; /* time stamp high 28 bits */
	618	+ union {
	619	+ uint32 ts_high_ext :28; /* time stamp high 28 bits */
	620	+ uint32 clk_id_ext :3; /* clock ID source */
	621	+ uint32 phase :1; /* Phase bit */
	622	+ dma_done_t marker_ext;
	623	+ };
	624	+ uint32 tx_pkt_band_retry_info;
	625	+ };
	626	+} ts_timestamp_srcid_t;
	627	+
	628	+typedef ts_timestamp_srcid_t ipc_timestamp_t;
	629	+
	630	+typedef struct ts_timestamp {
	631	+ uint32 low;
	632	+ uint32 high;
	633	+} ts_timestamp_t;
	634	+
	635	+typedef ts_timestamp_t tick_count_64_t;
	636	+typedef ts_timestamp_t ts_timestamp_ns_64_t;
	637	+typedef ts_timestamp_t ts_correction_m_t;
	638	+typedef ts_timestamp_t ts_correction_b_t;
355	639
356	640	/* completion header status codes */
357	641	#define BCMPCIE_SUCCESS 0
..	..	@@ -366,6 +650,19 @@
366	650	#define BCMPCIE_NO_IOCTLRESP_BUF 9
367	651	#define BCMPCIE_MAX_IOCTLRESP_BUF 10
368	652	#define BCMPCIE_MAX_EVENT_BUF 11
	653	+#define BCMPCIE_BAD_PHASE 12
	654	+#define BCMPCIE_INVALID_CPL_RINGID 13
	655	+#define BCMPCIE_RING_TYPE_INVALID 14
	656	+#define BCMPCIE_NO_TS_EVENT_BUF 15
	657	+#define BCMPCIE_MAX_TS_EVENT_BUF 16
	658	+#define BCMPCIE_PCIE_NO_BTLOG_BUF 17
	659	+#define BCMPCIE_BT_DMA_ERR 18
	660	+#define BCMPCIE_BT_DMA_DESCR_FETCH_ERR 19
	661	+#define BCMPCIE_SNAPSHOT_ERR 20
	662	+#define BCMPCIE_NOT_READY 21
	663	+#define BCMPCIE_INVALID_DATA 22
	664	+#define BCMPCIE_NO_RESPONSE 23
	665	+#define BCMPCIE_NO_CLOCK 24
369	666
370	667	/** IOCTL completion response */
371	668	typedef struct ioctl_compl_resp_msg {
..	..	@@ -388,7 +685,7 @@
388	685	/** common message header */
389	686	cmn_msg_hdr_t cmn_hdr;
390	687	/** completion message header */
391		- compl_msg_hdr_t compl_hdr;
	688	+ compl_msg_hdr_t compl_hdr;
392	689	/** cmd id */
393	690	uint32 cmd;
394	691	uint32 rsvd;
..	..	@@ -447,25 +744,33 @@
447	744	dma_done_t marker;
448	745	} pcie_ring_status_t;
449	746
450		-typedef struct tx_flowring_create_response {
451		- cmn_msg_hdr_t msg;
452		- compl_msg_hdr_t cmplt;
	747	+typedef struct ring_create_response {
	748	+ cmn_msg_hdr_t cmn_hdr;
	749	+ compl_msg_hdr_t cmplt;
453	750	uint32 rsvd[2];
454	751	/** XOR checksum or a magic number to audit DMA done */
455	752	dma_done_t marker;
456		-} tx_flowring_create_response_t;
	753	+} ring_create_response_t;
	754	+
	755	+typedef ring_create_response_t tx_flowring_create_response_t;
	756	+typedef ring_create_response_t h2d_ring_create_response_t;
	757	+typedef ring_create_response_t d2h_ring_create_response_t;
457	758
458	759	typedef struct tx_flowring_delete_response {
459	760	cmn_msg_hdr_t msg;
460		- compl_msg_hdr_t cmplt;
461		- uint32 rsvd[2];
	761	+ compl_msg_hdr_t cmplt;
	762	+ uint16 read_idx;
	763	+ uint16 rsvd[3];
462	764	/** XOR checksum or a magic number to audit DMA done */
463	765	dma_done_t marker;
464	766	} tx_flowring_delete_response_t;
465	767
	768	+typedef tx_flowring_delete_response_t h2d_ring_delete_response_t;
	769	+typedef tx_flowring_delete_response_t d2h_ring_delete_response_t;
	770	+
466	771	typedef struct tx_flowring_flush_response {
467	772	cmn_msg_hdr_t msg;
468		- compl_msg_hdr_t cmplt;
	773	+ compl_msg_hdr_t cmplt;
469	774	uint32 rsvd[2];
470	775	/** XOR checksum or a magic number to audit DMA done */
471	776	dma_done_t marker;
..	..	@@ -487,10 +792,80 @@
487	792	cmn_msg_hdr_t cmn_hdr;
488	793	/** completion message header */
489	794	compl_msg_hdr_t compl_hdr;
490		- uint32 rsvd[2];
	795	+ uint16 subtype;
	796	+ uint16 rsvd[3];
491	797	/** XOR checksum or a magic number to audit DMA done */
492	798	dma_done_t marker;
493	799	} ring_config_resp_t;
	800	+
	801	+typedef struct d2h_mailbox_data {
	802	+ cmn_msg_hdr_t msg;
	803	+ compl_msg_hdr_t cmplt;
	804	+ uint32 d2h_mailbox_data;
	805	+ uint32 rsvd[1];
	806	+ /* XOR checksum or a magic number to audit DMA done */
	807	+ dma_done_t marker;
	808	+} d2h_mailbox_data_t;
	809	+
	810	+/* dbg buf completion msg: send from device to host */
	811	+typedef struct info_buf_resp {
	812	+ /* common message header */
	813	+ cmn_msg_hdr_t cmn_hdr;
	814	+ /* completion message header */
	815	+ compl_msg_hdr_t compl_hdr;
	816	+ /* event data len valid with the event buffer */
	817	+ uint16 info_data_len;
	818	+ /* sequence number */
	819	+ uint16 seqnum;
	820	+ /* destination */
	821	+ uint8 dest;
	822	+ /* rsvd */
	823	+ uint8 rsvd[3];
	824	+ /* XOR checksum or a magic number to audit DMA done */
	825	+ dma_done_t marker;
	826	+} info_buf_resp_t;
	827	+
	828	+/* snapshot completion msg: send from device to host */
	829	+typedef struct snapshot_resp {
	830	+ /* common message header */
	831	+ cmn_msg_hdr_t cmn_hdr;
	832	+ /* completion message header */
	833	+ compl_msg_hdr_t compl_hdr;
	834	+ /* snapshot length uploaded */
	835	+ uint32 resp_len;
	836	+ /* snapshot type */
	837	+ uint8 type;
	838	+ /* rsvd */
	839	+ uint8 rsvd[3];
	840	+ /* XOR checksum or a magic number to audit DMA done */
	841	+ dma_done_t marker;
	842	+} snapshot_resp_t;
	843	+
	844	+typedef struct info_ring_cpl_item {
	845	+ info_buf_resp_t info_buf_post;
	846	+ unsigned char check[D2HRING_INFO_BUFCMPLT_ITEMSIZE];
	847	+} info_cpl_item_t;
	848	+
	849	+typedef struct host_timestamp_msg_cpl {
	850	+ cmn_msg_hdr_t msg;
	851	+ compl_msg_hdr_t cmplt;
	852	+ uint16 xt_id; /* transaction ID */
	853	+ uint16 rsvd;
	854	+ uint32 rsvd1;
	855	+ /* XOR checksum or a magic number to audit DMA done */
	856	+ dma_done_t marker;
	857	+} host_timestamp_msg_cpl_t;
	858	+
	859	+typedef struct fw_timestamp_event_msg {
	860	+ cmn_msg_hdr_t msg;
	861	+ compl_msg_hdr_t cmplt;
	862	+ /* fw captures time stamp info and passed that to host in TLVs */
	863	+ uint16 buf_len; /* length of the time stamp data copied in host buf */
	864	+ uint16 seqnum; /* number of times fw captured time stamp */
	865	+ uint32 rsvd;
	866	+ /* XOR checksum or a magic number to audit DMA done */
	867	+ dma_done_t marker;
	868	+} fw_timestamp_event_msg_t;
494	869
495	870	typedef union ctrl_completion_item {
496	871	ioctl_comp_resp_msg_t ioctl_resp;
..	..	@@ -504,7 +879,15 @@
504	879	tx_flowring_flush_response_t txfl_flush_resp;
505	880	ctrl_compl_msg_t ctrl_compl;
506	881	ring_config_resp_t ring_config_resp;
507		- unsigned char check[D2HRING_CTRL_CMPLT_ITEMSIZE];
	882	+ d2h_mailbox_data_t d2h_mailbox_data;
	883	+ info_buf_resp_t dbg_resp;
	884	+ h2d_ring_create_response_t h2d_ring_create_resp;
	885	+ d2h_ring_create_response_t d2h_ring_create_resp;
	886	+ host_timestamp_msg_cpl_t host_ts_cpl;
	887	+ fw_timestamp_event_msg_t fw_ts_event;
	888	+ h2d_ring_delete_response_t h2d_ring_delete_resp;
	889	+ d2h_ring_delete_response_t d2h_ring_delete_resp;
	890	+ unsigned char ctrl_response[D2HRING_CTRL_CMPLT_ITEMSIZE];
508	891	} ctrl_completion_item_t;
509	892
510	893	/** H2D Rxpost ring work items */
..	..	@@ -528,8 +911,7 @@
528	911	unsigned char check[H2DRING_RXPOST_ITEMSIZE];
529	912	} rxbuf_submit_item_t;
530	913
531		-
532		-/** D2H Rxcompletion ring work items */
	914	+/* D2H Rxcompletion ring work items for IPC rev7 */
533	915	typedef struct host_rxbuf_cmpl {
534	916	/** common message header */
535	917	cmn_msg_hdr_t cmn_hdr;
..	..	@@ -541,20 +923,22 @@
541	923	uint16 data_len;
542	924	/** offset in the host rx buffer where the data starts */
543	925	uint16 data_offset;
544		- /** offset in the host rx buffer where the data starts */
	926	+ /** Flags */
545	927	uint16 flags;
546	928	/** rx status */
547	929	uint32 rx_status_0;
548	930	uint32 rx_status_1;
549	931	/** XOR checksum or a magic number to audit DMA done */
	932	+ /* This is for rev6 only. For IPC rev7, this is a reserved field */
550	933	dma_done_t marker;
	934	+ /* timestamp */
	935	+ ipc_timestamp_t ts;
551	936	} host_rxbuf_cmpl_t;
552	937
553	938	typedef union rxbuf_complete_item {
554	939	host_rxbuf_cmpl_t rxcmpl;
555	940	unsigned char check[D2HRING_RXCMPLT_ITEMSIZE];
556	941	} rxbuf_complete_item_t;
557		-
558	942
559	943	typedef struct host_txbuf_post {
560	944	/** common message header */
..	..	@@ -574,19 +958,41 @@
574	958	uint16 metadata_buf_len;
575	959	/** provided data buffer len to receive data */
576	960	uint16 data_len;
577		- /** XOR checksum or a magic number to audit DMA done */
578		- dma_done_t marker;
	961	+ union {
	962	+ struct {
	963	+ /** extended transmit flags */
	964	+ uint8 ext_flags;
	965	+ uint8 rsvd1;
	966	+
	967	+ /** user defined rate */
	968	+ uint8 rate;
	969	+ uint8 exp_time;
	970	+ };
	971	+ /** XOR checksum or a magic number to audit DMA done */
	972	+ dma_done_t marker;
	973	+ };
579	974	} host_txbuf_post_t;
580	975
581	976	#define BCMPCIE_PKT_FLAGS_FRAME_802_3 0x01
582	977	#define BCMPCIE_PKT_FLAGS_FRAME_802_11 0x02
583	978
	979	+#define BCMPCIE_PKT_FLAGS_FRAME_NORETRY 0x01 /* Disable retry on this frame */
	980	+#define BCMPCIE_PKT_FLAGS_FRAME_NOAGGR 0x02 /* Disable aggregation for this frame */
	981	+#define BCMPCIE_PKT_FLAGS_FRAME_UDR 0x04 /* User defined rate for this frame */
	982	+#define BCMPCIE_PKT_FLAGS_FRAME_ATTR_MASK 0x07 /* Attribute mask */
	983	+
584	984	#define BCMPCIE_PKT_FLAGS_FRAME_EXEMPT_MASK 0x03 /* Exempt uses 2 bits */
585	985	#define BCMPCIE_PKT_FLAGS_FRAME_EXEMPT_SHIFT 0x02 /* needs to be shifted past other bits */
586	986
587		-
588	987	#define BCMPCIE_PKT_FLAGS_PRIO_SHIFT 5
589	988	#define BCMPCIE_PKT_FLAGS_PRIO_MASK (7 << BCMPCIE_PKT_FLAGS_PRIO_SHIFT)
	989	+#define BCMPCIE_PKT_FLAGS_MONITOR_NO_AMSDU 0x00
	990	+#define BCMPCIE_PKT_FLAGS_MONITOR_FIRST_PKT 0x01
	991	+#define BCMPCIE_PKT_FLAGS_MONITOR_INTER_PKT 0x02
	992	+#define BCMPCIE_PKT_FLAGS_MONITOR_LAST_PKT 0x03
	993	+#define BCMPCIE_PKT_FLAGS_NO_FORWARD 0x04
	994	+#define BCMPCIE_PKT_FLAGS_MONITOR_SHIFT 8
	995	+#define BCMPCIE_PKT_FLAGS_MONITOR_MASK (3 << BCMPCIE_PKT_FLAGS_MONITOR_SHIFT)
590	996
591	997	/* These are added to fix up compile issues */
592	998	#define BCMPCIE_TXPOST_FLAGS_FRAME_802_3 BCMPCIE_PKT_FLAGS_FRAME_802_3
..	..	@@ -594,13 +1000,13 @@
594	1000	#define BCMPCIE_TXPOST_FLAGS_PRIO_SHIFT BCMPCIE_PKT_FLAGS_PRIO_SHIFT
595	1001	#define BCMPCIE_TXPOST_FLAGS_PRIO_MASK BCMPCIE_PKT_FLAGS_PRIO_MASK
596	1002
597		-/** H2D Txpost ring work items */
	1003	+/* H2D Txpost ring work items */
598	1004	typedef union txbuf_submit_item {
599	1005	host_txbuf_post_t txpost;
600	1006	unsigned char check[H2DRING_TXPOST_ITEMSIZE];
601	1007	} txbuf_submit_item_t;
602	1008
603		-/** D2H Txcompletion ring work items */
	1009	+/* D2H Txcompletion ring work items - extended for IOC rev7 */
604	1010	typedef struct host_txbuf_cmpl {
605	1011	/** common message header */
606	1012	cmn_msg_hdr_t cmn_hdr;
..	..	@@ -608,14 +1014,22 @@
608	1014	compl_msg_hdr_t compl_hdr;
609	1015	union {
610	1016	struct {
611		- /** provided meta data len */
612		- uint16 metadata_len;
	1017	+ union {
	1018	+ /** provided meta data len */
	1019	+ uint16 metadata_len;
	1020	+ /** provided extended TX status */
	1021	+ uint16 tx_status_ext;
	1022	+ };
613	1023	/** WLAN side txstatus */
614	1024	uint16 tx_status;
615	1025	};
616	1026	/** XOR checksum or a magic number to audit DMA done */
	1027	+ /* This is for rev6 only. For IPC rev7, this is not used */
617	1028	dma_done_t marker;
618	1029	};
	1030	+ /* timestamp */
	1031	+ ipc_timestamp_t ts;
	1032	+
619	1033	} host_txbuf_cmpl_t;
620	1034
621	1035	typedef union txbuf_complete_item {
..	..	@@ -632,20 +1046,19 @@
632	1046	uint32 high_addr;
633	1047	} ret_buf_t;
634	1048
635		-
636	1049	#ifdef PCIE_API_REV1
637	1050
638	1051	/* ioctl specific hdr */
639	1052	typedef struct ioctl_hdr {
640		- uint16 cmd;
	1053	+ uint16 cmd;
641	1054	uint16 retbuf_len;
642	1055	uint32 cmd_id;
643	1056	} ioctl_hdr_t;
644	1057
645	1058	typedef struct ioctlptr_hdr {
646		- uint16 cmd;
	1059	+ uint16 cmd;
647	1060	uint16 retbuf_len;
648		- uint16 buflen;
	1061	+ uint16 buflen;
649	1062	uint16 rsvd;
650	1063	uint32 cmd_id;
651	1064	} ioctlptr_hdr_t;
..	..	@@ -654,15 +1067,14 @@
654	1067
655	1068	typedef struct ioctl_req_hdr {
656	1069	uint32 pkt_id; /*< Packet ID /
657		- uint32 cmd; /*< IOCTL ID /
	1070	+ uint32 cmd; /*< IOCTL ID /
658	1071	uint16 retbuf_len;
659		- uint16 buflen;
	1072	+ uint16 buflen;
660	1073	uint16 xt_id; /*< transaction ID /
661	1074	uint16 rsvd[1];
662	1075	} ioctl_req_hdr_t;
663	1076
664	1077	#endif /* PCIE_API_REV1 */
665		-
666	1078
667	1079	/** Complete msgbuf hdr for ioctl from host to dongle */
668	1080	typedef struct ioct_reqst_hdr {
..	..	@@ -671,7 +1083,7 @@
671	1083	ioctl_hdr_t ioct_hdr;
672	1084	#else
673	1085	ioctl_req_hdr_t ioct_hdr;
674		-#endif
	1086	+#endif // endif
675	1087	ret_buf_t ret_buf;
676	1088	} ioct_reqst_hdr_t;
677	1089
..	..	@@ -681,7 +1093,7 @@
681	1093	ioctlptr_hdr_t ioct_hdr;
682	1094	#else
683	1095	ioctl_req_hdr_t ioct_hdr;
684		-#endif
	1096	+#endif // endif
685	1097	ret_buf_t ret_buf;
686	1098	ret_buf_t ioct_buf;
687	1099	} ioctptr_reqst_hdr_t;
..	..	@@ -693,7 +1105,7 @@
693	1105	uint32 cmd_id;
694	1106	#else
695	1107	uint32 pkt_id;
696		-#endif
	1108	+#endif // endif
697	1109	uint32 status;
698	1110	uint32 ret_len;
699	1111	uint32 inline_data;
..	..	@@ -701,7 +1113,7 @@
701	1113	#else
702	1114	uint16 xt_id; /*< transaction ID /
703	1115	uint16 rsvd[1];
704		-#endif
	1116	+#endif // endif
705	1117	} ioct_resp_hdr_t;
706	1118
707	1119	/* ioct resp header used in dongle */
..	..	@@ -835,30 +1247,99 @@
835	1247	#define MAX_SUSPEND_REQ 15
836	1248
837	1249	typedef struct tx_idle_flowring_suspend_request {
838		- cmn_msg_hdr_t msg;
839		- uint16 ring_id[MAX_SUSPEND_REQ]; /*< ring Id's /
840		- uint16 num; /*< number of flowid's to suspend /
	1250	+ cmn_msg_hdr_t msg;
	1251	+ uint16 ring_id[MAX_SUSPEND_REQ]; /* ring Id's */
	1252	+ uint16 num; /* number of flowid's to suspend */
841	1253	} tx_idle_flowring_suspend_request_t;
842	1254
843	1255	typedef struct tx_idle_flowring_suspend_response {
844		- cmn_msg_hdr_t msg;
845		- compl_msg_hdr_t cmplt;
	1256	+ cmn_msg_hdr_t msg;
	1257	+ compl_msg_hdr_t cmplt;
846	1258	uint32 rsvd[2];
847	1259	dma_done_t marker;
848	1260	} tx_idle_flowring_suspend_response_t;
849	1261
850	1262	typedef struct tx_idle_flowring_resume_request {
851		- cmn_msg_hdr_t msg;
	1263	+ cmn_msg_hdr_t msg;
852	1264	uint16 flow_ring_id;
853	1265	uint16 reason;
854	1266	uint32 rsvd[7];
855	1267	} tx_idle_flowring_resume_request_t;
856	1268
857	1269	typedef struct tx_idle_flowring_resume_response {
858		- cmn_msg_hdr_t msg;
859		- compl_msg_hdr_t cmplt;
	1270	+ cmn_msg_hdr_t msg;
	1271	+ compl_msg_hdr_t cmplt;
860	1272	uint32 rsvd[2];
861	1273	dma_done_t marker;
862	1274	} tx_idle_flowring_resume_response_t;
863	1275
	1276	+/* timesync related additions */
	1277	+
	1278	+typedef struct _bcm_xtlv {
	1279	+ uint16 id; /* TLV idenitifier */
	1280	+ uint16 len; /* TLV length in bytes */
	1281	+} _bcm_xtlv_t;
	1282	+
	1283	+#define BCMMSGBUF_FW_CLOCK_INFO_TAG 0
	1284	+#define BCMMSGBUF_HOST_CLOCK_INFO_TAG 1
	1285	+#define BCMMSGBUF_HOST_CLOCK_SELECT_TAG 2
	1286	+#define BCMMSGBUF_D2H_CLOCK_CORRECTION_TAG 3
	1287	+#define BCMMSGBUF_HOST_TIMESTAMPING_CONFIG_TAG 4
	1288	+#define BCMMSGBUF_MAX_TSYNC_TAG 5
	1289	+
	1290	+/* Flags in fw clock info TLV */
	1291	+#define CAP_DEVICE_TS (1 << 0)
	1292	+#define CAP_CORRECTED_TS (1 << 1)
	1293	+#define TS_CLK_ACTIVE (1 << 2)
	1294	+
	1295	+typedef struct ts_fw_clock_info {
	1296	+ _bcm_xtlv_t xtlv; /* BCMMSGBUF_FW_CLOCK_INFO_TAG */
	1297	+ ts_timestamp_srcid_t ts; /* tick count */
	1298	+ uchar clk_src[4]; /* clock source acronym ILP/AVB/TSF */
	1299	+ uint32 nominal_clock_freq;
	1300	+ uint32 reset_cnt;
	1301	+ uint8 flags;
	1302	+ uint8 rsvd[3];
	1303	+} ts_fw_clock_info_t;
	1304	+
	1305	+typedef struct ts_host_clock_info {
	1306	+ _bcm_xtlv_t xtlv; /* BCMMSGBUF_HOST_CLOCK_INFO_TAG */
	1307	+ tick_count_64_t ticks; /* 64 bit host tick counter */
	1308	+ ts_timestamp_ns_64_t ns; /* 64 bit host time in nano seconds */
	1309	+} ts_host_clock_info_t;
	1310	+
	1311	+typedef struct ts_host_clock_sel {
	1312	+ _bcm_xtlv_t xtlv; /* BCMMSGBUF_HOST_CLOCK_SELECT_TAG */
	1313	+ uint32 seqnum; /* number of times GPIO time sync toggled */
	1314	+ uint8 min_clk_idx; /* clock idenitifer configured for packet tiem stamping */
	1315	+ uint8 max_clk_idx; /* clock idenitifer configured for packet tiem stamping */
	1316	+ uint16 rsvd[1];
	1317	+} ts_host_clock_sel_t;
	1318	+
	1319	+typedef struct ts_d2h_clock_correction {
	1320	+ _bcm_xtlv_t xtlv; /* BCMMSGBUF_HOST_CLOCK_INFO_TAG */
	1321	+ uint8 clk_id; /* clock source in the device */
	1322	+ uint8 rsvd[3];
	1323	+ ts_correction_m_t m; /* y = 'm' x + b */
	1324	+ ts_correction_b_t b; /* y = 'm' x + 'c' */
	1325	+} ts_d2h_clock_correction_t;
	1326	+
	1327	+typedef struct ts_host_timestamping_config {
	1328	+ _bcm_xtlv_t xtlv; /* BCMMSGBUF_HOST_TIMESTAMPING_CONFIG_TAG */
	1329	+ /* time period to capture the device time stamp and toggle WLAN_TIME_SYNC_GPIO */
	1330	+ uint16 period_ms;
	1331	+ uint8 flags;
	1332	+ uint8 post_delay;
	1333	+ uint32 reset_cnt;
	1334	+} ts_host_timestamping_config_t;
	1335	+
	1336	+/* Flags in host timestamping config TLV */
	1337	+#define FLAG_HOST_RESET (1 << 0)
	1338	+#define IS_HOST_RESET(x) ((x) & FLAG_HOST_RESET)
	1339	+#define CLEAR_HOST_RESET(x) ((x) & ~FLAG_HOST_RESET)
	1340	+
	1341	+#define FLAG_CONFIG_NODROP (1 << 1)
	1342	+#define IS_CONFIG_NODROP(x) ((x) & FLAG_CONFIG_NODROP)
	1343	+#define CLEAR_CONFIG_NODROP(x) ((x) & ~FLAG_CONFIG_NODROP)
	1344	+
864	1345	#endif /* _bcmmsgbuf_h_ */