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2024-02-19 1c055e55a242a33e574e48be530e06770a210dcd

 kernel/drivers/infiniband/hw/vmw_pvrdma/pvrdma_dev_api.h
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@@ -57,7 +57,9 @@
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 #define PVRDMA_ROCEV1_VERSION		17
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 #define PVRDMA_ROCEV2_VERSION		18
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-#define PVRDMA_VERSION			PVRDMA_ROCEV2_VERSION
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+#define PVRDMA_PPN64_VERSION		19
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+#define PVRDMA_QPHANDLE_VERSION		20
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+#define PVRDMA_VERSION			PVRDMA_QPHANDLE_VERSION
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 #define PVRDMA_BOARD_ID			1
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 #define PVRDMA_REV_ID			1
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@@ -279,8 +281,10 @@
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 						/* W: Async ring page info. */
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 	struct pvrdma_ring_page_info cq_ring_pages;
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 						/* W: CQ ring page info. */
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-	u32 uar_pfn;				/* W: UAR pageframe. */
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-	u32 pad2;				/* Pad to 8-byte align. */
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+	union {
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+		u32 uar_pfn;			/* W: UAR pageframe. */
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+		u64 uar_pfn64;			/* W: 64-bit UAR page frame. */
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+	};
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 	struct pvrdma_device_caps caps;		/* R: Device capabilities. */
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 };
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@@ -411,8 +415,10 @@
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 struct pvrdma_cmd_create_uc {
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 	struct pvrdma_cmd_hdr hdr;
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-	u32 pfn; /* UAR page frame number */
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-	u8 reserved[4];
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+	union {
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+		u32 pfn; /* UAR page frame number */
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+		u64 pfn64; /* 64-bit UAR page frame number */
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+	};
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 };
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 struct pvrdma_cmd_create_uc_resp {
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@@ -576,6 +582,17 @@
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 	u32 max_inline_data;
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 };
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+struct pvrdma_cmd_create_qp_resp_v2 {
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+	struct pvrdma_cmd_resp_hdr hdr;
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+	u32 qpn;
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+	u32 qp_handle;
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+	u32 max_send_wr;
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+	u32 max_recv_wr;
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+	u32 max_send_sge;
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+	u32 max_recv_sge;
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+	u32 max_inline_data;
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+};
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+
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 struct pvrdma_cmd_modify_qp {
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 	struct pvrdma_cmd_hdr hdr;
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 	u32 qp_handle;
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@@ -658,6 +675,7 @@
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 	struct pvrdma_cmd_create_cq_resp create_cq_resp;
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 	struct pvrdma_cmd_resize_cq_resp resize_cq_resp;
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 	struct pvrdma_cmd_create_qp_resp create_qp_resp;
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+	struct pvrdma_cmd_create_qp_resp_v2 create_qp_resp_v2;
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 	struct pvrdma_cmd_query_qp_resp query_qp_resp;
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 	struct pvrdma_cmd_destroy_qp_resp destroy_qp_resp;
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 	struct pvrdma_cmd_create_srq_resp create_srq_resp;