~hc/RK356X_SDK_RELEASE.git

..	..	@@ -1,3 +1,4 @@
	1	+// SPDX-License-Identifier: GPL-2.0-only
1	2	/*
2	3	* Bluetooth Software UART Qualcomm protocol
3	4	*
..	..	@@ -12,34 +13,25 @@
12	13	* Written by Ohad Ben-Cohen <ohad@bencohen.org>
13	14	* which was in turn based on hci_h4.c, which was written
14	15	* by Maxim Krasnyansky and Marcel Holtmann.
15		- *
16		- * This program is free software; you can redistribute it and/or modify
17		- * it under the terms of the GNU General Public License version 2
18		- * as published by the Free Software Foundation
19		- *
20		- * This program is distributed in the hope that it will be useful,
21		- * but WITHOUT ANY WARRANTY; without even the implied warranty of
22		- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23		- * GNU General Public License for more details.
24		- *
25		- * You should have received a copy of the GNU General Public License
26		- * along with this program; if not, write to the Free Software
27		- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28		- *
29	16	*/
30	17
31	18	#include <linux/kernel.h>
32	19	#include <linux/clk.h>
	20	+#include <linux/completion.h>
33	21	#include <linux/debugfs.h>
34	22	#include <linux/delay.h>
	23	+#include <linux/devcoredump.h>
35	24	#include <linux/device.h>
36	25	#include <linux/gpio/consumer.h>
37	26	#include <linux/mod_devicetable.h>
38	27	#include <linux/module.h>
39	28	#include <linux/of_device.h>
	29	+#include <linux/acpi.h>
40	30	#include <linux/platform_device.h>
41	31	#include <linux/regulator/consumer.h>
42	32	#include <linux/serdev.h>
	33	+#include <linux/mutex.h>
	34	+#include <asm/unaligned.h>
43	35
44	36	#include <net/bluetooth/bluetooth.h>
45	37	#include <net/bluetooth/hci_core.h>
..	..	@@ -53,15 +45,47 @@
53	45	#define HCI_IBS_WAKE_ACK 0xFC
54	46	#define HCI_MAX_IBS_SIZE 10
55	47
56		-/* Controller states */
57		-#define STATE_IN_BAND_SLEEP_ENABLED 1
58		-
59	48	#define IBS_WAKE_RETRANS_TIMEOUT_MS 100
60		-#define IBS_TX_IDLE_TIMEOUT_MS 2000
61		-#define BAUDRATE_SETTLE_TIMEOUT_MS 300
	49	+#define IBS_BTSOC_TX_IDLE_TIMEOUT_MS 200
	50	+#define IBS_HOST_TX_IDLE_TIMEOUT_MS 2000
	51	+#define CMD_TRANS_TIMEOUT_MS 100
	52	+#define MEMDUMP_TIMEOUT_MS 8000
	53	+#define IBS_DISABLE_SSR_TIMEOUT_MS \
	54	+ (MEMDUMP_TIMEOUT_MS + FW_DOWNLOAD_TIMEOUT_MS)
	55	+#define FW_DOWNLOAD_TIMEOUT_MS 3000
62	56
63	57	/* susclk rate */
64	58	#define SUSCLK_RATE_32KHZ 32768
	59	+
	60	+/* Controller debug log header */
	61	+#define QCA_DEBUG_HANDLE 0x2EDC
	62	+
	63	+/* max retry count when init fails */
	64	+#define MAX_INIT_RETRIES 3
	65	+
	66	+/* Controller dump header */
	67	+#define QCA_SSR_DUMP_HANDLE 0x0108
	68	+#define QCA_DUMP_PACKET_SIZE 255
	69	+#define QCA_LAST_SEQUENCE_NUM 0xFFFF
	70	+#define QCA_CRASHBYTE_PACKET_LEN 1096
	71	+#define QCA_MEMDUMP_BYTE 0xFB
	72	+
	73	+enum qca_flags {
	74	+ QCA_IBS_DISABLED,
	75	+ QCA_DROP_VENDOR_EVENT,
	76	+ QCA_SUSPENDING,
	77	+ QCA_MEMDUMP_COLLECTION,
	78	+ QCA_HW_ERROR_EVENT,
	79	+ QCA_SSR_TRIGGERED,
	80	+ QCA_BT_OFF,
	81	+ QCA_ROM_FW,
	82	+ QCA_DEBUGFS_CREATED,
	83	+};
	84	+
	85	+enum qca_capabilities {
	86	+ QCA_CAP_WIDEBAND_SPEECH = BIT(0),
	87	+ QCA_CAP_VALID_LE_STATES = BIT(1),
	88	+};
65	89
66	90	/* HCI_IBS transmit side sleep protocol states */
67	91	enum tx_ibs_states {
..	..	@@ -85,11 +109,41 @@
85	109	HCI_IBS_RX_VOTE_CLOCK_OFF,
86	110	};
87	111
	112	+/* Controller memory dump states */
	113	+enum qca_memdump_states {
	114	+ QCA_MEMDUMP_IDLE,
	115	+ QCA_MEMDUMP_COLLECTING,
	116	+ QCA_MEMDUMP_COLLECTED,
	117	+ QCA_MEMDUMP_TIMEOUT,
	118	+};
	119	+
	120	+struct qca_memdump_data {
	121	+ char *memdump_buf_head;
	122	+ char *memdump_buf_tail;
	123	+ u32 current_seq_no;
	124	+ u32 received_dump;
	125	+ u32 ram_dump_size;
	126	+};
	127	+
	128	+struct qca_memdump_event_hdr {
	129	+ __u8 evt;
	130	+ __u8 plen;
	131	+ __u16 opcode;
	132	+ __u16 seq_no;
	133	+ __u8 reserved;
	134	+} __packed;
	135	+
	136	+
	137	+struct qca_dump_size {
	138	+ u32 dump_size;
	139	+} __packed;
	140	+
88	141	struct qca_data {
89	142	struct hci_uart *hu;
90	143	struct sk_buff *rx_skb;
91	144	struct sk_buff_head txq;
92	145	struct sk_buff_head tx_wait_q; /* HCI_IBS wait queue */
	146	+ struct sk_buff_head rx_memdump_q; /* Memdump wait queue */
93	147	spinlock_t hci_ibs_lock; /* HCI_IBS state lock */
94	148	u8 tx_ibs_state; /* HCI_IBS transmit side power state*/
95	149	u8 rx_ibs_state; /* HCI_IBS receive side power state */
..	..	@@ -104,7 +158,14 @@
104	158	struct work_struct ws_awake_device;
105	159	struct work_struct ws_rx_vote_off;
106	160	struct work_struct ws_tx_vote_off;
	161	+ struct work_struct ctrl_memdump_evt;
	162	+ struct delayed_work ctrl_memdump_timeout;
	163	+ struct qca_memdump_data *qca_memdump;
107	164	unsigned long flags;
	165	+ struct completion drop_ev_comp;
	166	+ wait_queue_head_t suspend_wait_q;
	167	+ enum qca_memdump_states memdump_state;
	168	+ struct mutex hci_memdump_lock;
108	169
109	170	/* For debugging purpose */
110	171	u64 ibs_sent_wacks;
..	..	@@ -135,15 +196,14 @@
135	196	*/
136	197	struct qca_vreg {
137	198	const char *name;
138		- unsigned int min_uV;
139		- unsigned int max_uV;
140	199	unsigned int load_uA;
141	200	};
142	201
143		-struct qca_vreg_data {
	202	+struct qca_device_data {
144	203	enum qca_btsoc_type soc_type;
145	204	struct qca_vreg *vregs;
146	205	size_t num_vregs;
	206	+ uint32_t capabilities;
147	207	};
148	208
149	209	/*
..	..	@@ -151,8 +211,8 @@
151	211	*/
152	212	struct qca_power {
153	213	struct device *dev;
154		- const struct qca_vreg_data *vreg_data;
155	214	struct regulator_bulk_data *vreg_bulk;
	215	+ int num_vregs;
156	216	bool vregs_on;
157	217	};
158	218
..	..	@@ -164,10 +224,40 @@
164	224	struct qca_power *bt_power;
165	225	u32 init_speed;
166	226	u32 oper_speed;
	227	+ const char *firmware_name;
167	228	};
168	229
169		-static int qca_power_setup(struct hci_uart *hu, bool on);
	230	+static int qca_regulator_enable(struct qca_serdev *qcadev);
	231	+static void qca_regulator_disable(struct qca_serdev *qcadev);
170	232	static void qca_power_shutdown(struct hci_uart *hu);
	233	+static int qca_power_off(struct hci_dev *hdev);
	234	+static void qca_controller_memdump(struct work_struct *work);
	235	+
	236	+static enum qca_btsoc_type qca_soc_type(struct hci_uart *hu)
	237	+{
	238	+ enum qca_btsoc_type soc_type;
	239	+
	240	+ if (hu->serdev) {
	241	+ struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev);
	242	+
	243	+ soc_type = qsd->btsoc_type;
	244	+ } else {
	245	+ soc_type = QCA_ROME;
	246	+ }
	247	+
	248	+ return soc_type;
	249	+}
	250	+
	251	+static const char qca_get_firmware_name(struct hci_uart hu)
	252	+{
	253	+ if (hu->serdev) {
	254	+ struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev);
	255	+
	256	+ return qsd->firmware_name;
	257	+ } else {
	258	+ return NULL;
	259	+ }
	260	+}
171	261
172	262	static void __serial_clock_on(struct tty_struct *tty)
173	263	{
..	..	@@ -207,31 +297,29 @@
207	297	case HCI_IBS_TX_VOTE_CLOCK_ON:
208	298	qca->tx_vote = true;
209	299	qca->tx_votes_on++;
210		- new_vote = true;
211	300	break;
212	301
213	302	case HCI_IBS_RX_VOTE_CLOCK_ON:
214	303	qca->rx_vote = true;
215	304	qca->rx_votes_on++;
216		- new_vote = true;
217	305	break;
218	306
219	307	case HCI_IBS_TX_VOTE_CLOCK_OFF:
220	308	qca->tx_vote = false;
221	309	qca->tx_votes_off++;
222		- new_vote = qca->rx_vote \| qca->tx_vote;
223	310	break;
224	311
225	312	case HCI_IBS_RX_VOTE_CLOCK_OFF:
226	313	qca->rx_vote = false;
227	314	qca->rx_votes_off++;
228		- new_vote = qca->rx_vote \| qca->tx_vote;
229	315	break;
230	316
231	317	default:
232	318	BT_ERR("Voting irregularity");
233	319	return;
234	320	}
	321	+
	322	+ new_vote = qca->rx_vote \| qca->tx_vote;
235	323
236	324	if (new_vote != old_vote) {
237	325	if (new_vote)
..	..	@@ -286,13 +374,14 @@
286	374	ws_awake_device);
287	375	struct hci_uart *hu = qca->hu;
288	376	unsigned long retrans_delay;
	377	+ unsigned long flags;
289	378
290	379	BT_DBG("hu %p wq awake device", hu);
291	380
292	381	/* Vote for serial clock */
293	382	serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_ON, hu);
294	383
295		- spin_lock(&qca->hci_ibs_lock);
	384	+ spin_lock_irqsave(&qca->hci_ibs_lock, flags);
296	385
297	386	/* Send wake indication to device */
298	387	if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0)
..	..	@@ -304,7 +393,7 @@
304	393	retrans_delay = msecs_to_jiffies(qca->wake_retrans);
305	394	mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay);
306	395
307		- spin_unlock(&qca->hci_ibs_lock);
	396	+ spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
308	397
309	398	/* Actually send the packets */
310	399	hci_uart_tx_wakeup(hu);
..	..	@@ -315,12 +404,13 @@
315	404	struct qca_data *qca = container_of(work, struct qca_data,
316	405	ws_awake_rx);
317	406	struct hci_uart *hu = qca->hu;
	407	+ unsigned long flags;
318	408
319	409	BT_DBG("hu %p wq awake rx", hu);
320	410
321	411	serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_ON, hu);
322	412
323		- spin_lock(&qca->hci_ibs_lock);
	413	+ spin_lock_irqsave(&qca->hci_ibs_lock, flags);
324	414	qca->rx_ibs_state = HCI_IBS_RX_AWAKE;
325	415
326	416	/* Always acknowledge device wake up,
..	..	@@ -331,7 +421,7 @@
331	421
332	422	qca->ibs_sent_wacks++;
333	423
334		- spin_unlock(&qca->hci_ibs_lock);
	424	+ spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
335	425
336	426	/* Actually send the packets */
337	427	hci_uart_tx_wakeup(hu);
..	..	@@ -390,8 +480,6 @@
390	480
391	481	case HCI_IBS_TX_ASLEEP:
392	482	case HCI_IBS_TX_WAKING:
393		- /* Fall through */
394		-
395	483	default:
396	484	BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state);
397	485	break;
..	..	@@ -413,6 +501,12 @@
413	501	spin_lock_irqsave_nested(&qca->hci_ibs_lock,
414	502	flags, SINGLE_DEPTH_NESTING);
415	503
	504	+ /* Don't retransmit the HCI_IBS_WAKE_IND when suspending. */
	505	+ if (test_bit(QCA_SUSPENDING, &qca->flags)) {
	506	+ spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
	507	+ return;
	508	+ }
	509	+
416	510	switch (qca->tx_ibs_state) {
417	511	case HCI_IBS_TX_WAKING:
418	512	/* No WAKE_ACK, retransmit WAKE */
..	..	@@ -428,8 +522,6 @@
428	522
429	523	case HCI_IBS_TX_ASLEEP:
430	524	case HCI_IBS_TX_AWAKE:
431		- /* Fall through */
432		-
433	525	default:
434	526	BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state);
435	527	break;
..	..	@@ -441,12 +533,33 @@
441	533	hci_uart_tx_wakeup(hu);
442	534	}
443	535
	536	+
	537	+static void qca_controller_memdump_timeout(struct work_struct *work)
	538	+{
	539	+ struct qca_data *qca = container_of(work, struct qca_data,
	540	+ ctrl_memdump_timeout.work);
	541	+ struct hci_uart *hu = qca->hu;
	542	+
	543	+ mutex_lock(&qca->hci_memdump_lock);
	544	+ if (test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) {
	545	+ qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
	546	+ if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) {
	547	+ /* Inject hw error event to reset the device
	548	+ * and driver.
	549	+ */
	550	+ hci_reset_dev(hu->hdev);
	551	+ }
	552	+ }
	553	+
	554	+ mutex_unlock(&qca->hci_memdump_lock);
	555	+}
	556	+
	557	+
444	558	/* Initialize protocol */
445	559	static int qca_open(struct hci_uart *hu)
446	560	{
447	561	struct qca_serdev *qcadev;
448	562	struct qca_data *qca;
449		- int ret;
450	563
451	564	BT_DBG("hu %p qca_open", hu);
452	565
..	..	@@ -459,7 +572,9 @@
459	572
460	573	skb_queue_head_init(&qca->txq);
461	574	skb_queue_head_init(&qca->tx_wait_q);
	575	+ skb_queue_head_init(&qca->rx_memdump_q);
462	576	spin_lock_init(&qca->hci_ibs_lock);
	577	+ mutex_init(&qca->hci_memdump_lock);
463	578	qca->workqueue = alloc_ordered_workqueue("qca_wq", 0);
464	579	if (!qca->workqueue) {
465	580	BT_ERR("QCA Workqueue not initialized properly");
..	..	@@ -471,63 +586,37 @@
471	586	INIT_WORK(&qca->ws_awake_device, qca_wq_awake_device);
472	587	INIT_WORK(&qca->ws_rx_vote_off, qca_wq_serial_rx_clock_vote_off);
473	588	INIT_WORK(&qca->ws_tx_vote_off, qca_wq_serial_tx_clock_vote_off);
	589	+ INIT_WORK(&qca->ctrl_memdump_evt, qca_controller_memdump);
	590	+ INIT_DELAYED_WORK(&qca->ctrl_memdump_timeout,
	591	+ qca_controller_memdump_timeout);
	592	+ init_waitqueue_head(&qca->suspend_wait_q);
474	593
475	594	qca->hu = hu;
	595	+ init_completion(&qca->drop_ev_comp);
476	596
477	597	/* Assume we start with both sides asleep -- extra wakes OK */
478	598	qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
479	599	qca->rx_ibs_state = HCI_IBS_RX_ASLEEP;
480	600
481		- /* clocks actually on, but we start votes off */
482		- qca->tx_vote = false;
483		- qca->rx_vote = false;
484		- qca->flags = 0;
485		-
486		- qca->ibs_sent_wacks = 0;
487		- qca->ibs_sent_slps = 0;
488		- qca->ibs_sent_wakes = 0;
489		- qca->ibs_recv_wacks = 0;
490		- qca->ibs_recv_slps = 0;
491		- qca->ibs_recv_wakes = 0;
492	601	qca->vote_last_jif = jiffies;
493		- qca->vote_on_ms = 0;
494		- qca->vote_off_ms = 0;
495		- qca->votes_on = 0;
496		- qca->votes_off = 0;
497		- qca->tx_votes_on = 0;
498		- qca->tx_votes_off = 0;
499		- qca->rx_votes_on = 0;
500		- qca->rx_votes_off = 0;
501	602
502	603	hu->priv = qca;
503	604
504	605	if (hu->serdev) {
505		- serdev_device_open(hu->serdev);
506		-
507	606	qcadev = serdev_device_get_drvdata(hu->serdev);
508		- if (qcadev->btsoc_type != QCA_WCN3990) {
509		- gpiod_set_value_cansleep(qcadev->bt_en, 1);
510		- /* Controller needs time to bootup. */
511		- msleep(150);
512		- } else {
	607	+
	608	+ if (qca_is_wcn399x(qcadev->btsoc_type))
513	609	hu->init_speed = qcadev->init_speed;
	610	+
	611	+ if (qcadev->oper_speed)
514	612	hu->oper_speed = qcadev->oper_speed;
515		- ret = qca_power_setup(hu, true);
516		- if (ret) {
517		- destroy_workqueue(qca->workqueue);
518		- kfree_skb(qca->rx_skb);
519		- hu->priv = NULL;
520		- kfree(qca);
521		- return ret;
522		- }
523		- }
524	613	}
525	614
526	615	timer_setup(&qca->wake_retrans_timer, hci_ibs_wake_retrans_timeout, 0);
527	616	qca->wake_retrans = IBS_WAKE_RETRANS_TIMEOUT_MS;
528	617
529	618	timer_setup(&qca->tx_idle_timer, hci_ibs_tx_idle_timeout, 0);
530		- qca->tx_idle_delay = IBS_TX_IDLE_TIMEOUT_MS;
	619	+ qca->tx_idle_delay = IBS_HOST_TX_IDLE_TIMEOUT_MS;
531	620
532	621	BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u",
533	622	qca->tx_idle_delay, qca->wake_retrans);
..	..	@@ -543,6 +632,9 @@
543	632	umode_t mode;
544	633
545	634	if (!hdev->debugfs)
	635	+ return;
	636	+
	637	+ if (test_and_set_bit(QCA_DEBUGFS_CREATED, &qca->flags))
546	638	return;
547	639
548	640	ibs_dir = debugfs_create_dir("ibs", hdev->debugfs);
..	..	@@ -597,7 +689,6 @@
597	689	/* Close protocol */
598	690	static int qca_close(struct hci_uart *hu)
599	691	{
600		- struct qca_serdev *qcadev;
601	692	struct qca_data *qca = hu->priv;
602	693
603	694	BT_DBG("hu %p qca close", hu);
..	..	@@ -606,20 +697,11 @@
606	697
607	698	skb_queue_purge(&qca->tx_wait_q);
608	699	skb_queue_purge(&qca->txq);
609		- del_timer(&qca->tx_idle_timer);
610		- del_timer(&qca->wake_retrans_timer);
	700	+ skb_queue_purge(&qca->rx_memdump_q);
611	701	destroy_workqueue(qca->workqueue);
	702	+ del_timer_sync(&qca->tx_idle_timer);
	703	+ del_timer_sync(&qca->wake_retrans_timer);
612	704	qca->hu = NULL;
613		-
614		- if (hu->serdev) {
615		- qcadev = serdev_device_get_drvdata(hu->serdev);
616		- if (qcadev->btsoc_type == QCA_WCN3990)
617		- qca_power_shutdown(hu);
618		- else
619		- gpiod_set_value_cansleep(qcadev->bt_en, 0);
620		-
621		- serdev_device_close(hu->serdev);
622		- }
623	705
624	706	kfree_skb(qca->rx_skb);
625	707
..	..	@@ -642,6 +724,12 @@
642	724	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
643	725
644	726	qca->ibs_recv_wakes++;
	727	+
	728	+ /* Don't wake the rx up when suspending. */
	729	+ if (test_bit(QCA_SUSPENDING, &qca->flags)) {
	730	+ spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
	731	+ return;
	732	+ }
645	733
646	734	switch (qca->rx_ibs_state) {
647	735	case HCI_IBS_RX_ASLEEP:
..	..	@@ -683,7 +771,7 @@
683	771	unsigned long flags;
684	772	struct qca_data *qca = hu->priv;
685	773
686		- BT_DBG("hu %p want to sleep", hu);
	774	+ BT_DBG("hu %p want to sleep in %d state", hu, qca->rx_ibs_state);
687	775
688	776	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
689	777
..	..	@@ -698,7 +786,7 @@
698	786	break;
699	787
700	788	case HCI_IBS_RX_ASLEEP:
701		- /* Fall through */
	789	+ break;
702	790
703	791	default:
704	792	/* Any other state is illegal */
..	..	@@ -706,6 +794,8 @@
706	794	qca->rx_ibs_state);
707	795	break;
708	796	}
	797	+
	798	+ wake_up_interruptible(&qca->suspend_wait_q);
709	799
710	800	spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
711	801	}
..	..	@@ -723,6 +813,12 @@
723	813	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
724	814
725	815	qca->ibs_recv_wacks++;
	816	+
	817	+ /* Don't react to the wake-up-acknowledgment when suspending. */
	818	+ if (test_bit(QCA_SUSPENDING, &qca->flags)) {
	819	+ spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
	820	+ return;
	821	+ }
726	822
727	823	switch (qca->tx_ibs_state) {
728	824	case HCI_IBS_TX_AWAKE:
..	..	@@ -744,8 +840,6 @@
744	840	break;
745	841
746	842	case HCI_IBS_TX_ASLEEP:
747		- /* Fall through */
748		-
749	843	default:
750	844	BT_ERR("Received HCI_IBS_WAKE_ACK in tx state %d",
751	845	qca->tx_ibs_state);
..	..	@@ -769,18 +863,28 @@
769	863	BT_DBG("hu %p qca enq skb %p tx_ibs_state %d", hu, skb,
770	864	qca->tx_ibs_state);
771	865
772		- /* Prepend skb with frame type */
773		- memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1);
774		-
775		- /* Don't go to sleep in middle of patch download or
776		- * Out-Of-Band(GPIOs control) sleep is selected.
777		- */
778		- if (!test_bit(STATE_IN_BAND_SLEEP_ENABLED, &qca->flags)) {
779		- skb_queue_tail(&qca->txq, skb);
	866	+ if (test_bit(QCA_SSR_TRIGGERED, &qca->flags)) {
	867	+ /* As SSR is in progress, ignore the packets */
	868	+ bt_dev_dbg(hu->hdev, "SSR is in progress");
	869	+ kfree_skb(skb);
780	870	return 0;
781	871	}
782	872
	873	+ /* Prepend skb with frame type */
	874	+ memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1);
	875	+
783	876	spin_lock_irqsave(&qca->hci_ibs_lock, flags);
	877	+
	878	+ /* Don't go to sleep in middle of patch download or
	879	+ * Out-Of-Band(GPIOs control) sleep is selected.
	880	+ * Don't wake the device up when suspending.
	881	+ */
	882	+ if (test_bit(QCA_IBS_DISABLED, &qca->flags) \|\|
	883	+ test_bit(QCA_SUSPENDING, &qca->flags)) {
	884	+ skb_queue_tail(&qca->txq, skb);
	885	+ spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
	886	+ return 0;
	887	+ }
784	888
785	889	/* Act according to current state */
786	890	switch (qca->tx_ibs_state) {
..	..	@@ -810,7 +914,7 @@
810	914	default:
811	915	BT_ERR("Illegal tx state: %d (losing packet)",
812	916	qca->tx_ibs_state);
813		- kfree_skb(skb);
	917	+ dev_kfree_skb_irq(skb);
814	918	break;
815	919	}
816	920
..	..	@@ -855,6 +959,232 @@
855	959	return 0;
856	960	}
857	961
	962	+static int qca_recv_acl_data(struct hci_dev hdev, struct sk_buff skb)
	963	+{
	964	+ /* We receive debug logs from chip as an ACL packets.
	965	+ * Instead of sending the data to ACL to decode the
	966	+ * received data, we are pushing them to the above layers
	967	+ * as a diagnostic packet.
	968	+ */
	969	+ if (get_unaligned_le16(skb->data) == QCA_DEBUG_HANDLE)
	970	+ return hci_recv_diag(hdev, skb);
	971	+
	972	+ return hci_recv_frame(hdev, skb);
	973	+}
	974	+
	975	+static void qca_controller_memdump(struct work_struct *work)
	976	+{
	977	+ struct qca_data *qca = container_of(work, struct qca_data,
	978	+ ctrl_memdump_evt);
	979	+ struct hci_uart *hu = qca->hu;
	980	+ struct sk_buff *skb;
	981	+ struct qca_memdump_event_hdr *cmd_hdr;
	982	+ struct qca_memdump_data *qca_memdump = qca->qca_memdump;
	983	+ struct qca_dump_size *dump;
	984	+ char *memdump_buf;
	985	+ char nullBuff[QCA_DUMP_PACKET_SIZE] = { 0 };
	986	+ u16 seq_no;
	987	+ u32 dump_size;
	988	+ u32 rx_size;
	989	+ enum qca_btsoc_type soc_type = qca_soc_type(hu);
	990	+
	991	+ while ((skb = skb_dequeue(&qca->rx_memdump_q))) {
	992	+
	993	+ mutex_lock(&qca->hci_memdump_lock);
	994	+ /* Skip processing the received packets if timeout detected
	995	+ * or memdump collection completed.
	996	+ */
	997	+ if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT \|\|
	998	+ qca->memdump_state == QCA_MEMDUMP_COLLECTED) {
	999	+ mutex_unlock(&qca->hci_memdump_lock);
	1000	+ return;
	1001	+ }
	1002	+
	1003	+ if (!qca_memdump) {
	1004	+ qca_memdump = kzalloc(sizeof(struct qca_memdump_data),
	1005	+ GFP_ATOMIC);
	1006	+ if (!qca_memdump) {
	1007	+ mutex_unlock(&qca->hci_memdump_lock);
	1008	+ return;
	1009	+ }
	1010	+
	1011	+ qca->qca_memdump = qca_memdump;
	1012	+ }
	1013	+
	1014	+ qca->memdump_state = QCA_MEMDUMP_COLLECTING;
	1015	+ cmd_hdr = (void *) skb->data;
	1016	+ seq_no = __le16_to_cpu(cmd_hdr->seq_no);
	1017	+ skb_pull(skb, sizeof(struct qca_memdump_event_hdr));
	1018	+
	1019	+ if (!seq_no) {
	1020	+
	1021	+ /* This is the first frame of memdump packet from
	1022	+ * the controller, Disable IBS to recevie dump
	1023	+ * with out any interruption, ideally time required for
	1024	+ * the controller to send the dump is 8 seconds. let us
	1025	+ * start timer to handle this asynchronous activity.
	1026	+ */
	1027	+ set_bit(QCA_IBS_DISABLED, &qca->flags);
	1028	+ set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
	1029	+ dump = (void *) skb->data;
	1030	+ dump_size = __le32_to_cpu(dump->dump_size);
	1031	+ if (!(dump_size)) {
	1032	+ bt_dev_err(hu->hdev, "Rx invalid memdump size");
	1033	+ kfree(qca_memdump);
	1034	+ kfree_skb(skb);
	1035	+ qca->qca_memdump = NULL;
	1036	+ mutex_unlock(&qca->hci_memdump_lock);
	1037	+ return;
	1038	+ }
	1039	+
	1040	+ bt_dev_info(hu->hdev, "QCA collecting dump of size:%u",
	1041	+ dump_size);
	1042	+ queue_delayed_work(qca->workqueue,
	1043	+ &qca->ctrl_memdump_timeout,
	1044	+ msecs_to_jiffies(MEMDUMP_TIMEOUT_MS)
	1045	+ );
	1046	+
	1047	+ skb_pull(skb, sizeof(dump_size));
	1048	+ memdump_buf = vmalloc(dump_size);
	1049	+ qca_memdump->ram_dump_size = dump_size;
	1050	+ qca_memdump->memdump_buf_head = memdump_buf;
	1051	+ qca_memdump->memdump_buf_tail = memdump_buf;
	1052	+ }
	1053	+
	1054	+ memdump_buf = qca_memdump->memdump_buf_tail;
	1055	+
	1056	+ /* If sequence no 0 is missed then there is no point in
	1057	+ * accepting the other sequences.
	1058	+ */
	1059	+ if (!memdump_buf) {
	1060	+ bt_dev_err(hu->hdev, "QCA: Discarding other packets");
	1061	+ kfree(qca_memdump);
	1062	+ kfree_skb(skb);
	1063	+ qca->qca_memdump = NULL;
	1064	+ mutex_unlock(&qca->hci_memdump_lock);
	1065	+ return;
	1066	+ }
	1067	+
	1068	+ /* There could be chance of missing some packets from
	1069	+ * the controller. In such cases let us store the dummy
	1070	+ * packets in the buffer.
	1071	+ */
	1072	+ /* For QCA6390, controller does not lost packets but
	1073	+ * sequence number field of packat sometimes has error
	1074	+ * bits, so skip this checking for missing packet.
	1075	+ */
	1076	+ while ((seq_no > qca_memdump->current_seq_no + 1) &&
	1077	+ (soc_type != QCA_QCA6390) &&
	1078	+ seq_no != QCA_LAST_SEQUENCE_NUM) {
	1079	+ bt_dev_err(hu->hdev, "QCA controller missed packet:%d",
	1080	+ qca_memdump->current_seq_no);
	1081	+ rx_size = qca_memdump->received_dump;
	1082	+ rx_size += QCA_DUMP_PACKET_SIZE;
	1083	+ if (rx_size > qca_memdump->ram_dump_size) {
	1084	+ bt_dev_err(hu->hdev,
	1085	+ "QCA memdump received %d, no space for missed packet",
	1086	+ qca_memdump->received_dump);
	1087	+ break;
	1088	+ }
	1089	+ memcpy(memdump_buf, nullBuff, QCA_DUMP_PACKET_SIZE);
	1090	+ memdump_buf = memdump_buf + QCA_DUMP_PACKET_SIZE;
	1091	+ qca_memdump->received_dump += QCA_DUMP_PACKET_SIZE;
	1092	+ qca_memdump->current_seq_no++;
	1093	+ }
	1094	+
	1095	+ rx_size = qca_memdump->received_dump + skb->len;
	1096	+ if (rx_size <= qca_memdump->ram_dump_size) {
	1097	+ if ((seq_no != QCA_LAST_SEQUENCE_NUM) &&
	1098	+ (seq_no != qca_memdump->current_seq_no))
	1099	+ bt_dev_err(hu->hdev,
	1100	+ "QCA memdump unexpected packet %d",
	1101	+ seq_no);
	1102	+ bt_dev_dbg(hu->hdev,
	1103	+ "QCA memdump packet %d with length %d",
	1104	+ seq_no, skb->len);
	1105	+ memcpy(memdump_buf, (unsigned char *)skb->data,
	1106	+ skb->len);
	1107	+ memdump_buf = memdump_buf + skb->len;
	1108	+ qca_memdump->memdump_buf_tail = memdump_buf;
	1109	+ qca_memdump->current_seq_no = seq_no + 1;
	1110	+ qca_memdump->received_dump += skb->len;
	1111	+ } else {
	1112	+ bt_dev_err(hu->hdev,
	1113	+ "QCA memdump received %d, no space for packet %d",
	1114	+ qca_memdump->received_dump, seq_no);
	1115	+ }
	1116	+ qca->qca_memdump = qca_memdump;
	1117	+ kfree_skb(skb);
	1118	+ if (seq_no == QCA_LAST_SEQUENCE_NUM) {
	1119	+ bt_dev_info(hu->hdev,
	1120	+ "QCA memdump Done, received %d, total %d",
	1121	+ qca_memdump->received_dump,
	1122	+ qca_memdump->ram_dump_size);
	1123	+ memdump_buf = qca_memdump->memdump_buf_head;
	1124	+ dev_coredumpv(&hu->serdev->dev, memdump_buf,
	1125	+ qca_memdump->received_dump, GFP_KERNEL);
	1126	+ cancel_delayed_work(&qca->ctrl_memdump_timeout);
	1127	+ kfree(qca->qca_memdump);
	1128	+ qca->qca_memdump = NULL;
	1129	+ qca->memdump_state = QCA_MEMDUMP_COLLECTED;
	1130	+ clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
	1131	+ }
	1132	+
	1133	+ mutex_unlock(&qca->hci_memdump_lock);
	1134	+ }
	1135	+
	1136	+}
	1137	+
	1138	+static int qca_controller_memdump_event(struct hci_dev *hdev,
	1139	+ struct sk_buff *skb)
	1140	+{
	1141	+ struct hci_uart *hu = hci_get_drvdata(hdev);
	1142	+ struct qca_data *qca = hu->priv;
	1143	+
	1144	+ set_bit(QCA_SSR_TRIGGERED, &qca->flags);
	1145	+ skb_queue_tail(&qca->rx_memdump_q, skb);
	1146	+ queue_work(qca->workqueue, &qca->ctrl_memdump_evt);
	1147	+
	1148	+ return 0;
	1149	+}
	1150	+
	1151	+static int qca_recv_event(struct hci_dev hdev, struct sk_buff skb)
	1152	+{
	1153	+ struct hci_uart *hu = hci_get_drvdata(hdev);
	1154	+ struct qca_data *qca = hu->priv;
	1155	+
	1156	+ if (test_bit(QCA_DROP_VENDOR_EVENT, &qca->flags)) {
	1157	+ struct hci_event_hdr hdr = (void )skb->data;
	1158	+
	1159	+ /* For the WCN3990 the vendor command for a baudrate change
	1160	+ * isn't sent as synchronous HCI command, because the
	1161	+ * controller sends the corresponding vendor event with the
	1162	+ * new baudrate. The event is received and properly decoded
	1163	+ * after changing the baudrate of the host port. It needs to
	1164	+ * be dropped, otherwise it can be misinterpreted as
	1165	+ * response to a later firmware download command (also a
	1166	+ * vendor command).
	1167	+ */
	1168	+
	1169	+ if (hdr->evt == HCI_EV_VENDOR)
	1170	+ complete(&qca->drop_ev_comp);
	1171	+
	1172	+ kfree_skb(skb);
	1173	+
	1174	+ return 0;
	1175	+ }
	1176	+ /* We receive chip memory dump as an event packet, With a dedicated
	1177	+ * handler followed by a hardware error event. When this event is
	1178	+ * received we store dump into a file before closing hci. This
	1179	+ * dump will help in triaging the issues.
	1180	+ */
	1181	+ if ((skb->data[0] == HCI_VENDOR_PKT) &&
	1182	+ (get_unaligned_be16(skb->data + 2) == QCA_SSR_DUMP_HANDLE))
	1183	+ return qca_controller_memdump_event(hdev, skb);
	1184	+
	1185	+ return hci_recv_frame(hdev, skb);
	1186	+}
	1187	+
858	1188	#define QCA_IBS_SLEEP_IND_EVENT \
859	1189	.type = HCI_IBS_SLEEP_IND, \
860	1190	.hlen = 0, \
..	..	@@ -877,9 +1207,9 @@
877	1207	.maxlen = HCI_MAX_IBS_SIZE
878	1208
879	1209	static const struct h4_recv_pkt qca_recv_pkts[] = {
880		- { H4_RECV_ACL, .recv = hci_recv_frame },
	1210	+ { H4_RECV_ACL, .recv = qca_recv_acl_data },
881	1211	{ H4_RECV_SCO, .recv = hci_recv_frame },
882		- { H4_RECV_EVENT, .recv = hci_recv_frame },
	1212	+ { H4_RECV_EVENT, .recv = qca_recv_event },
883	1213	{ QCA_IBS_WAKE_IND_EVENT, .recv = qca_ibs_wake_ind },
884	1214	{ QCA_IBS_WAKE_ACK_EVENT, .recv = qca_ibs_wake_ack },
885	1215	{ QCA_IBS_SLEEP_IND_EVENT, .recv = qca_ibs_sleep_ind },
..	..	@@ -952,7 +1282,6 @@
952	1282	struct hci_uart *hu = hci_get_drvdata(hdev);
953	1283	struct qca_data *qca = hu->priv;
954	1284	struct sk_buff *skb;
955		- struct qca_serdev *qcadev;
956	1285	u8 cmd[] = { 0x01, 0x48, 0xFC, 0x01, 0x00 };
957	1286
958	1287	if (baudrate > QCA_BAUDRATE_3200000)
..	..	@@ -966,13 +1295,6 @@
966	1295	return -ENOMEM;
967	1296	}
968	1297
969		- /* Disabling hardware flow control is mandatory while
970		- * sending change baudrate request to wcn3990 SoC.
971		- */
972		- qcadev = serdev_device_get_drvdata(hu->serdev);
973		- if (qcadev->btsoc_type == QCA_WCN3990)
974		- hci_uart_set_flow_control(hu, true);
975		-
976	1298	/* Assign commands to change baudrate and packet type. */
977	1299	skb_put_data(skb, cmd, sizeof(cmd));
978	1300	hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
..	..	@@ -980,16 +1302,20 @@
980	1302	skb_queue_tail(&qca->txq, skb);
981	1303	hci_uart_tx_wakeup(hu);
982	1304
983		- /* wait 300ms to change new baudrate on controller side
984		- * controller will come back after they receive this HCI command
985		- * then host can communicate with new baudrate to controller
986		- */
987		- set_current_state(TASK_UNINTERRUPTIBLE);
988		- schedule_timeout(msecs_to_jiffies(BAUDRATE_SETTLE_TIMEOUT_MS));
989		- set_current_state(TASK_RUNNING);
	1305	+ /* Wait for the baudrate change request to be sent */
990	1306
991		- if (qcadev->btsoc_type == QCA_WCN3990)
992		- hci_uart_set_flow_control(hu, false);
	1307	+ while (!skb_queue_empty(&qca->txq))
	1308	+ usleep_range(100, 200);
	1309	+
	1310	+ if (hu->serdev)
	1311	+ serdev_device_wait_until_sent(hu->serdev,
	1312	+ msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS));
	1313	+
	1314	+ /* Give the controller time to process the request */
	1315	+ if (qca_is_wcn399x(qca_soc_type(hu)))
	1316	+ msleep(10);
	1317	+ else
	1318	+ msleep(300);
993	1319
994	1320	return 0;
995	1321	}
..	..	@@ -1002,11 +1328,11 @@
1002	1328	hci_uart_set_baudrate(hu, speed);
1003	1329	}
1004	1330
1005		-static int qca_send_power_pulse(struct hci_dev *hdev, u8 cmd)
	1331	+static int qca_send_power_pulse(struct hci_uart *hu, bool on)
1006	1332	{
1007		- struct hci_uart *hu = hci_get_drvdata(hdev);
1008		- struct qca_data *qca = hu->priv;
1009		- struct sk_buff *skb;
	1333	+ int ret;
	1334	+ int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS);
	1335	+ u8 cmd = on ? QCA_WCN3990_POWERON_PULSE : QCA_WCN3990_POWEROFF_PULSE;
1010	1336
1011	1337	/* These power pulses are single byte command which are sent
1012	1338	* at required baudrate to wcn3990. On wcn3990, we have an external
..	..	@@ -1018,23 +1344,24 @@
1018	1344	* save power. Disabling hardware flow control is mandatory while
1019	1345	* sending power pulses to SoC.
1020	1346	*/
1021		- bt_dev_dbg(hdev, "sending power pulse %02x to SoC", cmd);
	1347	+ bt_dev_dbg(hu->hdev, "sending power pulse %02x to controller", cmd);
1022	1348
1023		- skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL);
1024		- if (!skb)
1025		- return -ENOMEM;
1026		-
	1349	+ serdev_device_write_flush(hu->serdev);
1027	1350	hci_uart_set_flow_control(hu, true);
	1351	+ ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd));
	1352	+ if (ret < 0) {
	1353	+ bt_dev_err(hu->hdev, "failed to send power pulse %02x", cmd);
	1354	+ return ret;
	1355	+ }
1028	1356
1029		- skb_put_u8(skb, cmd);
1030		- hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
1031		-
1032		- skb_queue_tail(&qca->txq, skb);
1033		- hci_uart_tx_wakeup(hu);
1034		-
1035		- /* Wait for 100 uS for SoC to settle down */
1036		- usleep_range(100, 200);
	1357	+ serdev_device_wait_until_sent(hu->serdev, timeout);
1037	1358	hci_uart_set_flow_control(hu, false);
	1359	+
	1360	+ /* Give to controller time to boot/shutdown */
	1361	+ if (on)
	1362	+ msleep(100);
	1363	+ else
	1364	+ msleep(10);
1038	1365
1039	1366	return 0;
1040	1367	}
..	..	@@ -1061,10 +1388,7 @@
1061	1388
1062	1389	static int qca_check_speeds(struct hci_uart *hu)
1063	1390	{
1064		- struct qca_serdev *qcadev;
1065		-
1066		- qcadev = serdev_device_get_drvdata(hu->serdev);
1067		- if (qcadev->btsoc_type == QCA_WCN3990) {
	1391	+ if (qca_is_wcn399x(qca_soc_type(hu))) {
1068	1392	if (!qca_get_speed(hu, QCA_INIT_SPEED) &&
1069	1393	!qca_get_speed(hu, QCA_OPER_SPEED))
1070	1394	return -EINVAL;
..	..	@@ -1080,47 +1404,209 @@
1080	1404	static int qca_set_speed(struct hci_uart *hu, enum qca_speed_type speed_type)
1081	1405	{
1082	1406	unsigned int speed, qca_baudrate;
1083		- int ret;
	1407	+ struct qca_data *qca = hu->priv;
	1408	+ int ret = 0;
1084	1409
1085	1410	if (speed_type == QCA_INIT_SPEED) {
1086	1411	speed = qca_get_speed(hu, QCA_INIT_SPEED);
1087	1412	if (speed)
1088	1413	host_set_baudrate(hu, speed);
1089	1414	} else {
	1415	+ enum qca_btsoc_type soc_type = qca_soc_type(hu);
	1416	+
1090	1417	speed = qca_get_speed(hu, QCA_OPER_SPEED);
1091	1418	if (!speed)
1092	1419	return 0;
	1420	+
	1421	+ /* Disable flow control for wcn3990 to deassert RTS while
	1422	+ * changing the baudrate of chip and host.
	1423	+ */
	1424	+ if (qca_is_wcn399x(soc_type))
	1425	+ hci_uart_set_flow_control(hu, true);
	1426	+
	1427	+ if (soc_type == QCA_WCN3990) {
	1428	+ reinit_completion(&qca->drop_ev_comp);
	1429	+ set_bit(QCA_DROP_VENDOR_EVENT, &qca->flags);
	1430	+ }
1093	1431
1094	1432	qca_baudrate = qca_get_baudrate_value(speed);
1095	1433	bt_dev_dbg(hu->hdev, "Set UART speed to %d", speed);
1096	1434	ret = qca_set_baudrate(hu->hdev, qca_baudrate);
1097	1435	if (ret)
1098		- return ret;
	1436	+ goto error;
1099	1437
1100	1438	host_set_baudrate(hu, speed);
	1439	+
	1440	+error:
	1441	+ if (qca_is_wcn399x(soc_type))
	1442	+ hci_uart_set_flow_control(hu, false);
	1443	+
	1444	+ if (soc_type == QCA_WCN3990) {
	1445	+ /* Wait for the controller to send the vendor event
	1446	+ * for the baudrate change command.
	1447	+ */
	1448	+ if (!wait_for_completion_timeout(&qca->drop_ev_comp,
	1449	+ msecs_to_jiffies(100))) {
	1450	+ bt_dev_err(hu->hdev,
	1451	+ "Failed to change controller baudrate\n");
	1452	+ ret = -ETIMEDOUT;
	1453	+ }
	1454	+
	1455	+ clear_bit(QCA_DROP_VENDOR_EVENT, &qca->flags);
	1456	+ }
1101	1457	}
	1458	+
	1459	+ return ret;
	1460	+}
	1461	+
	1462	+static int qca_send_crashbuffer(struct hci_uart *hu)
	1463	+{
	1464	+ struct qca_data *qca = hu->priv;
	1465	+ struct sk_buff *skb;
	1466	+
	1467	+ skb = bt_skb_alloc(QCA_CRASHBYTE_PACKET_LEN, GFP_KERNEL);
	1468	+ if (!skb) {
	1469	+ bt_dev_err(hu->hdev, "Failed to allocate memory for skb packet");
	1470	+ return -ENOMEM;
	1471	+ }
	1472	+
	1473	+ /* We forcefully crash the controller, by sending 0xfb byte for
	1474	+ * 1024 times. We also might have chance of losing data, To be
	1475	+ * on safer side we send 1096 bytes to the SoC.
	1476	+ */
	1477	+ memset(skb_put(skb, QCA_CRASHBYTE_PACKET_LEN), QCA_MEMDUMP_BYTE,
	1478	+ QCA_CRASHBYTE_PACKET_LEN);
	1479	+ hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
	1480	+ bt_dev_info(hu->hdev, "crash the soc to collect controller dump");
	1481	+ skb_queue_tail(&qca->txq, skb);
	1482	+ hci_uart_tx_wakeup(hu);
1102	1483
1103	1484	return 0;
1104	1485	}
1105	1486
	1487	+static void qca_wait_for_dump_collection(struct hci_dev *hdev)
	1488	+{
	1489	+ struct hci_uart *hu = hci_get_drvdata(hdev);
	1490	+ struct qca_data *qca = hu->priv;
	1491	+
	1492	+ wait_on_bit_timeout(&qca->flags, QCA_MEMDUMP_COLLECTION,
	1493	+ TASK_UNINTERRUPTIBLE, MEMDUMP_TIMEOUT_MS);
	1494	+
	1495	+ clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
	1496	+}
	1497	+
	1498	+static void qca_hw_error(struct hci_dev *hdev, u8 code)
	1499	+{
	1500	+ struct hci_uart *hu = hci_get_drvdata(hdev);
	1501	+ struct qca_data *qca = hu->priv;
	1502	+
	1503	+ set_bit(QCA_SSR_TRIGGERED, &qca->flags);
	1504	+ set_bit(QCA_HW_ERROR_EVENT, &qca->flags);
	1505	+ bt_dev_info(hdev, "mem_dump_status: %d", qca->memdump_state);
	1506	+
	1507	+ if (qca->memdump_state == QCA_MEMDUMP_IDLE) {
	1508	+ /* If hardware error event received for other than QCA
	1509	+ * soc memory dump event, then we need to crash the SOC
	1510	+ * and wait here for 8 seconds to get the dump packets.
	1511	+ * This will block main thread to be on hold until we
	1512	+ * collect dump.
	1513	+ */
	1514	+ set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
	1515	+ qca_send_crashbuffer(hu);
	1516	+ qca_wait_for_dump_collection(hdev);
	1517	+ } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) {
	1518	+ /* Let us wait here until memory dump collected or
	1519	+ * memory dump timer expired.
	1520	+ */
	1521	+ bt_dev_info(hdev, "waiting for dump to complete");
	1522	+ qca_wait_for_dump_collection(hdev);
	1523	+ }
	1524	+
	1525	+ mutex_lock(&qca->hci_memdump_lock);
	1526	+ if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) {
	1527	+ bt_dev_err(hu->hdev, "clearing allocated memory due to memdump timeout");
	1528	+ if (qca->qca_memdump) {
	1529	+ vfree(qca->qca_memdump->memdump_buf_head);
	1530	+ kfree(qca->qca_memdump);
	1531	+ qca->qca_memdump = NULL;
	1532	+ }
	1533	+ qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
	1534	+ cancel_delayed_work(&qca->ctrl_memdump_timeout);
	1535	+ }
	1536	+ mutex_unlock(&qca->hci_memdump_lock);
	1537	+
	1538	+ if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT \|\|
	1539	+ qca->memdump_state == QCA_MEMDUMP_COLLECTED) {
	1540	+ cancel_work_sync(&qca->ctrl_memdump_evt);
	1541	+ skb_queue_purge(&qca->rx_memdump_q);
	1542	+ }
	1543	+
	1544	+ clear_bit(QCA_HW_ERROR_EVENT, &qca->flags);
	1545	+}
	1546	+
	1547	+static void qca_cmd_timeout(struct hci_dev *hdev)
	1548	+{
	1549	+ struct hci_uart *hu = hci_get_drvdata(hdev);
	1550	+ struct qca_data *qca = hu->priv;
	1551	+
	1552	+ set_bit(QCA_SSR_TRIGGERED, &qca->flags);
	1553	+ if (qca->memdump_state == QCA_MEMDUMP_IDLE) {
	1554	+ set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
	1555	+ qca_send_crashbuffer(hu);
	1556	+ qca_wait_for_dump_collection(hdev);
	1557	+ } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) {
	1558	+ /* Let us wait here until memory dump collected or
	1559	+ * memory dump timer expired.
	1560	+ */
	1561	+ bt_dev_info(hdev, "waiting for dump to complete");
	1562	+ qca_wait_for_dump_collection(hdev);
	1563	+ }
	1564	+
	1565	+ mutex_lock(&qca->hci_memdump_lock);
	1566	+ if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) {
	1567	+ qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
	1568	+ if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) {
	1569	+ /* Inject hw error event to reset the device
	1570	+ * and driver.
	1571	+ */
	1572	+ hci_reset_dev(hu->hdev);
	1573	+ }
	1574	+ }
	1575	+ mutex_unlock(&qca->hci_memdump_lock);
	1576	+}
	1577	+
1106	1578	static int qca_wcn3990_init(struct hci_uart *hu)
1107	1579	{
1108		- struct hci_dev *hdev = hu->hdev;
	1580	+ struct qca_serdev *qcadev;
1109	1581	int ret;
	1582	+
	1583	+ /* Check for vregs status, may be hci down has turned
	1584	+ * off the voltage regulator.
	1585	+ */
	1586	+ qcadev = serdev_device_get_drvdata(hu->serdev);
	1587	+ if (!qcadev->bt_power->vregs_on) {
	1588	+ serdev_device_close(hu->serdev);
	1589	+ ret = qca_regulator_enable(qcadev);
	1590	+ if (ret)
	1591	+ return ret;
	1592	+
	1593	+ ret = serdev_device_open(hu->serdev);
	1594	+ if (ret) {
	1595	+ bt_dev_err(hu->hdev, "failed to open port");
	1596	+ return ret;
	1597	+ }
	1598	+ }
1110	1599
1111	1600	/* Forcefully enable wcn3990 to enter in to boot mode. */
1112	1601	host_set_baudrate(hu, 2400);
1113		- ret = qca_send_power_pulse(hdev, QCA_WCN3990_POWEROFF_PULSE);
	1602	+ ret = qca_send_power_pulse(hu, false);
1114	1603	if (ret)
1115	1604	return ret;
1116	1605
1117	1606	qca_set_speed(hu, QCA_INIT_SPEED);
1118		- ret = qca_send_power_pulse(hdev, QCA_WCN3990_POWERON_PULSE);
	1607	+ ret = qca_send_power_pulse(hu, true);
1119	1608	if (ret)
1120	1609	return ret;
1121		-
1122		- /* Wait for 100 ms for SoC to boot */
1123		- msleep(100);
1124	1610
1125	1611	/* Now the device is in ready state to communicate with host.
1126	1612	* To sync host with device we need to reopen port.
..	..	@@ -1139,35 +1625,78 @@
1139	1625	return 0;
1140	1626	}
1141	1627
	1628	+static int qca_power_on(struct hci_dev *hdev)
	1629	+{
	1630	+ struct hci_uart *hu = hci_get_drvdata(hdev);
	1631	+ enum qca_btsoc_type soc_type = qca_soc_type(hu);
	1632	+ struct qca_serdev *qcadev;
	1633	+ struct qca_data *qca = hu->priv;
	1634	+ int ret = 0;
	1635	+
	1636	+ /* Non-serdev device usually is powered by external power
	1637	+ * and don't need additional action in driver for power on
	1638	+ */
	1639	+ if (!hu->serdev)
	1640	+ return 0;
	1641	+
	1642	+ if (qca_is_wcn399x(soc_type)) {
	1643	+ ret = qca_wcn3990_init(hu);
	1644	+ } else {
	1645	+ qcadev = serdev_device_get_drvdata(hu->serdev);
	1646	+ if (qcadev->bt_en) {
	1647	+ gpiod_set_value_cansleep(qcadev->bt_en, 1);
	1648	+ /* Controller needs time to bootup. */
	1649	+ msleep(150);
	1650	+ }
	1651	+ }
	1652	+
	1653	+ clear_bit(QCA_BT_OFF, &qca->flags);
	1654	+ return ret;
	1655	+}
	1656	+
1142	1657	static int qca_setup(struct hci_uart *hu)
1143	1658	{
1144	1659	struct hci_dev *hdev = hu->hdev;
1145	1660	struct qca_data *qca = hu->priv;
1146	1661	unsigned int speed, qca_baudrate = QCA_BAUDRATE_115200;
1147		- struct qca_serdev *qcadev;
	1662	+ unsigned int retries = 0;
	1663	+ enum qca_btsoc_type soc_type = qca_soc_type(hu);
	1664	+ const char *firmware_name = qca_get_firmware_name(hu);
1148	1665	int ret;
1149	1666	int soc_ver = 0;
1150		-
1151		- qcadev = serdev_device_get_drvdata(hu->serdev);
1152	1667
1153	1668	ret = qca_check_speeds(hu);
1154	1669	if (ret)
1155	1670	return ret;
1156	1671
	1672	+ clear_bit(QCA_ROM_FW, &qca->flags);
1157	1673	/* Patch downloading has to be done without IBS mode */
1158		- clear_bit(STATE_IN_BAND_SLEEP_ENABLED, &qca->flags);
	1674	+ set_bit(QCA_IBS_DISABLED, &qca->flags);
1159	1675
1160		- if (qcadev->btsoc_type == QCA_WCN3990) {
1161		- bt_dev_info(hdev, "setting up wcn3990");
1162		- ret = qca_wcn3990_init(hu);
1163		- if (ret)
1164		- return ret;
	1676	+ /* Enable controller to do both LE scan and BR/EDR inquiry
	1677	+ * simultaneously.
	1678	+ */
	1679	+ set_bit(HCI_QUIRK_SIMULTANEOUS_DISCOVERY, &hdev->quirks);
1165	1680
1166		- ret = qca_read_soc_version(hdev, &soc_ver);
	1681	+ bt_dev_info(hdev, "setting up %s",
	1682	+ qca_is_wcn399x(soc_type) ? "wcn399x" : "ROME/QCA6390");
	1683	+
	1684	+ qca->memdump_state = QCA_MEMDUMP_IDLE;
	1685	+
	1686	+retry:
	1687	+ ret = qca_power_on(hdev);
	1688	+ if (ret)
	1689	+ return ret;
	1690	+
	1691	+ clear_bit(QCA_SSR_TRIGGERED, &qca->flags);
	1692	+
	1693	+ if (qca_is_wcn399x(soc_type)) {
	1694	+ set_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks);
	1695	+
	1696	+ ret = qca_read_soc_version(hdev, &soc_ver, soc_type);
1167	1697	if (ret)
1168	1698	return ret;
1169	1699	} else {
1170		- bt_dev_info(hdev, "ROME setup");
1171	1700	qca_set_speed(hu, QCA_INIT_SPEED);
1172	1701	}
1173	1702
..	..	@@ -1181,37 +1710,59 @@
1181	1710	qca_baudrate = qca_get_baudrate_value(speed);
1182	1711	}
1183	1712
1184		- if (qcadev->btsoc_type != QCA_WCN3990) {
	1713	+ if (!qca_is_wcn399x(soc_type)) {
1185	1714	/* Get QCA version information */
1186		- ret = qca_read_soc_version(hdev, &soc_ver);
	1715	+ ret = qca_read_soc_version(hdev, &soc_ver, soc_type);
1187	1716	if (ret)
1188	1717	return ret;
1189	1718	}
1190	1719
1191	1720	bt_dev_info(hdev, "QCA controller version 0x%08x", soc_ver);
1192	1721	/* Setup patch / NVM configurations */
1193		- ret = qca_uart_setup(hdev, qca_baudrate, qcadev->btsoc_type, soc_ver);
	1722	+ ret = qca_uart_setup(hdev, qca_baudrate, soc_type, soc_ver,
	1723	+ firmware_name);
1194	1724	if (!ret) {
1195		- set_bit(STATE_IN_BAND_SLEEP_ENABLED, &qca->flags);
	1725	+ clear_bit(QCA_IBS_DISABLED, &qca->flags);
1196	1726	qca_debugfs_init(hdev);
	1727	+ hu->hdev->hw_error = qca_hw_error;
	1728	+ hu->hdev->cmd_timeout = qca_cmd_timeout;
1197	1729	} else if (ret == -ENOENT) {
1198	1730	/* No patch/nvm-config found, run with original fw/config */
	1731	+ set_bit(QCA_ROM_FW, &qca->flags);
1199	1732	ret = 0;
1200	1733	} else if (ret == -EAGAIN) {
1201	1734	/*
1202	1735	* Userspace firmware loader will return -EAGAIN in case no
1203	1736	* patch/nvm-config is found, so run with original fw/config.
1204	1737	*/
	1738	+ set_bit(QCA_ROM_FW, &qca->flags);
1205	1739	ret = 0;
	1740	+ } else {
	1741	+ if (retries < MAX_INIT_RETRIES) {
	1742	+ qca_power_shutdown(hu);
	1743	+ if (hu->serdev) {
	1744	+ serdev_device_close(hu->serdev);
	1745	+ ret = serdev_device_open(hu->serdev);
	1746	+ if (ret) {
	1747	+ bt_dev_err(hdev, "failed to open port");
	1748	+ return ret;
	1749	+ }
	1750	+ }
	1751	+ retries++;
	1752	+ goto retry;
	1753	+ }
1206	1754	}
1207	1755
1208	1756	/* Setup bdaddr */
1209		- hu->hdev->set_bdaddr = qca_set_bdaddr_rome;
	1757	+ if (soc_type == QCA_ROME)
	1758	+ hu->hdev->set_bdaddr = qca_set_bdaddr_rome;
	1759	+ else
	1760	+ hu->hdev->set_bdaddr = qca_set_bdaddr;
1210	1761
1211	1762	return ret;
1212	1763	}
1213	1764
1214		-static struct hci_uart_proto qca_proto = {
	1765	+static const struct hci_uart_proto qca_proto = {
1215	1766	.id = HCI_UART_QCA,
1216	1767	.name = "QCA",
1217	1768	.manufacturer = 29,
..	..	@@ -1226,137 +1777,200 @@
1226	1777	.dequeue = qca_dequeue,
1227	1778	};
1228	1779
1229		-static const struct qca_vreg_data qca_soc_data = {
	1780	+static const struct qca_device_data qca_soc_data_wcn3990 = {
1230	1781	.soc_type = QCA_WCN3990,
1231	1782	.vregs = (struct qca_vreg []) {
1232		- { "vddio", 1800000, 1900000, 15000 },
1233		- { "vddxo", 1800000, 1900000, 80000 },
1234		- { "vddrf", 1300000, 1350000, 300000 },
1235		- { "vddch0", 3300000, 3400000, 450000 },
	1783	+ { "vddio", 15000 },
	1784	+ { "vddxo", 80000 },
	1785	+ { "vddrf", 300000 },
	1786	+ { "vddch0", 450000 },
1236	1787	},
1237	1788	.num_vregs = 4,
1238	1789	};
1239	1790
	1791	+static const struct qca_device_data qca_soc_data_wcn3991 = {
	1792	+ .soc_type = QCA_WCN3991,
	1793	+ .vregs = (struct qca_vreg []) {
	1794	+ { "vddio", 15000 },
	1795	+ { "vddxo", 80000 },
	1796	+ { "vddrf", 300000 },
	1797	+ { "vddch0", 450000 },
	1798	+ },
	1799	+ .num_vregs = 4,
	1800	+ .capabilities = QCA_CAP_WIDEBAND_SPEECH \| QCA_CAP_VALID_LE_STATES,
	1801	+};
	1802	+
	1803	+static const struct qca_device_data qca_soc_data_wcn3998 = {
	1804	+ .soc_type = QCA_WCN3998,
	1805	+ .vregs = (struct qca_vreg []) {
	1806	+ { "vddio", 10000 },
	1807	+ { "vddxo", 80000 },
	1808	+ { "vddrf", 300000 },
	1809	+ { "vddch0", 450000 },
	1810	+ },
	1811	+ .num_vregs = 4,
	1812	+};
	1813	+
	1814	+static const struct qca_device_data qca_soc_data_qca6390 = {
	1815	+ .soc_type = QCA_QCA6390,
	1816	+ .num_vregs = 0,
	1817	+};
	1818	+
1240	1819	static void qca_power_shutdown(struct hci_uart *hu)
1241	1820	{
1242		- struct serdev_device *serdev = hu->serdev;
1243		- unsigned char cmd = QCA_WCN3990_POWEROFF_PULSE;
1244		-
1245		- host_set_baudrate(hu, 2400);
1246		- hci_uart_set_flow_control(hu, true);
1247		- serdev_device_write_buf(serdev, &cmd, sizeof(cmd));
1248		- hci_uart_set_flow_control(hu, false);
1249		- qca_power_setup(hu, false);
1250		-}
1251		-
1252		-static int qca_enable_regulator(struct qca_vreg vregs,
1253		- struct regulator *regulator)
1254		-{
1255		- int ret;
1256		-
1257		- ret = regulator_set_voltage(regulator, vregs.min_uV,
1258		- vregs.max_uV);
1259		- if (ret)
1260		- return ret;
1261		-
1262		- if (vregs.load_uA)
1263		- ret = regulator_set_load(regulator,
1264		- vregs.load_uA);
1265		-
1266		- if (ret)
1267		- return ret;
1268		-
1269		- return regulator_enable(regulator);
1270		-
1271		-}
1272		-
1273		-static void qca_disable_regulator(struct qca_vreg vregs,
1274		- struct regulator *regulator)
1275		-{
1276		- regulator_disable(regulator);
1277		- regulator_set_voltage(regulator, 0, vregs.max_uV);
1278		- if (vregs.load_uA)
1279		- regulator_set_load(regulator, 0);
1280		-
1281		-}
1282		-
1283		-static int qca_power_setup(struct hci_uart *hu, bool on)
1284		-{
1285		- struct qca_vreg *vregs;
1286		- struct regulator_bulk_data *vreg_bulk;
1287	1821	struct qca_serdev *qcadev;
1288		- int i, num_vregs, ret = 0;
	1822	+ struct qca_data *qca = hu->priv;
	1823	+ unsigned long flags;
	1824	+ enum qca_btsoc_type soc_type = qca_soc_type(hu);
	1825	+
	1826	+ /* From this point we go into power off state. But serial port is
	1827	+ * still open, stop queueing the IBS data and flush all the buffered
	1828	+ * data in skb's.
	1829	+ */
	1830	+ spin_lock_irqsave(&qca->hci_ibs_lock, flags);
	1831	+ set_bit(QCA_IBS_DISABLED, &qca->flags);
	1832	+ qca_flush(hu);
	1833	+ spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
	1834	+
	1835	+ /* Non-serdev device usually is powered by external power
	1836	+ * and don't need additional action in driver for power down
	1837	+ */
	1838	+ if (!hu->serdev)
	1839	+ return;
1289	1840
1290	1841	qcadev = serdev_device_get_drvdata(hu->serdev);
1291		- if (!qcadev \|\| !qcadev->bt_power \|\| !qcadev->bt_power->vreg_data \|\|
1292		- !qcadev->bt_power->vreg_bulk)
1293		- return -EINVAL;
1294	1842
1295		- vregs = qcadev->bt_power->vreg_data->vregs;
1296		- vreg_bulk = qcadev->bt_power->vreg_bulk;
1297		- num_vregs = qcadev->bt_power->vreg_data->num_vregs;
1298		- BT_DBG("on: %d", on);
1299		- if (on && !qcadev->bt_power->vregs_on) {
1300		- for (i = 0; i < num_vregs; i++) {
1301		- ret = qca_enable_regulator(vregs[i],
1302		- vreg_bulk[i].consumer);
1303		- if (ret)
1304		- break;
1305		- }
1306		-
1307		- if (ret) {
1308		- BT_ERR("failed to enable regulator:%s", vregs[i].name);
1309		- /* turn off regulators which are enabled */
1310		- for (i = i - 1; i >= 0; i--)
1311		- qca_disable_regulator(vregs[i],
1312		- vreg_bulk[i].consumer);
1313		- } else {
1314		- qcadev->bt_power->vregs_on = true;
1315		- }
1316		- } else if (!on && qcadev->bt_power->vregs_on) {
1317		- /* turn off regulator in reverse order */
1318		- i = qcadev->bt_power->vreg_data->num_vregs - 1;
1319		- for ( ; i >= 0; i--)
1320		- qca_disable_regulator(vregs[i], vreg_bulk[i].consumer);
1321		-
1322		- qcadev->bt_power->vregs_on = false;
	1843	+ if (qca_is_wcn399x(soc_type)) {
	1844	+ host_set_baudrate(hu, 2400);
	1845	+ qca_send_power_pulse(hu, false);
	1846	+ qca_regulator_disable(qcadev);
	1847	+ } else if (qcadev->bt_en) {
	1848	+ gpiod_set_value_cansleep(qcadev->bt_en, 0);
1323	1849	}
1324	1850
	1851	+ set_bit(QCA_BT_OFF, &qca->flags);
	1852	+}
	1853	+
	1854	+static int qca_power_off(struct hci_dev *hdev)
	1855	+{
	1856	+ struct hci_uart *hu = hci_get_drvdata(hdev);
	1857	+ struct qca_data *qca = hu->priv;
	1858	+ enum qca_btsoc_type soc_type = qca_soc_type(hu);
	1859	+
	1860	+ hu->hdev->hw_error = NULL;
	1861	+ hu->hdev->cmd_timeout = NULL;
	1862	+
	1863	+ del_timer_sync(&qca->wake_retrans_timer);
	1864	+ del_timer_sync(&qca->tx_idle_timer);
	1865	+
	1866	+ /* Stop sending shutdown command if soc crashes. */
	1867	+ if (soc_type != QCA_ROME
	1868	+ && qca->memdump_state == QCA_MEMDUMP_IDLE) {
	1869	+ qca_send_pre_shutdown_cmd(hdev);
	1870	+ usleep_range(8000, 10000);
	1871	+ }
	1872	+
	1873	+ qca_power_shutdown(hu);
	1874	+ return 0;
	1875	+}
	1876	+
	1877	+static int qca_regulator_enable(struct qca_serdev *qcadev)
	1878	+{
	1879	+ struct qca_power *power = qcadev->bt_power;
	1880	+ int ret;
	1881	+
	1882	+ /* Already enabled */
	1883	+ if (power->vregs_on)
	1884	+ return 0;
	1885	+
	1886	+ BT_DBG("enabling %d regulators)", power->num_vregs);
	1887	+
	1888	+ ret = regulator_bulk_enable(power->num_vregs, power->vreg_bulk);
	1889	+ if (ret)
	1890	+ return ret;
	1891	+
	1892	+ power->vregs_on = true;
	1893	+
	1894	+ ret = clk_prepare_enable(qcadev->susclk);
	1895	+ if (ret)
	1896	+ qca_regulator_disable(qcadev);
	1897	+
1325	1898	return ret;
	1899	+}
	1900	+
	1901	+static void qca_regulator_disable(struct qca_serdev *qcadev)
	1902	+{
	1903	+ struct qca_power *power;
	1904	+
	1905	+ if (!qcadev)
	1906	+ return;
	1907	+
	1908	+ power = qcadev->bt_power;
	1909	+
	1910	+ /* Already disabled? */
	1911	+ if (!power->vregs_on)
	1912	+ return;
	1913	+
	1914	+ regulator_bulk_disable(power->num_vregs, power->vreg_bulk);
	1915	+ power->vregs_on = false;
	1916	+
	1917	+ clk_disable_unprepare(qcadev->susclk);
1326	1918	}
1327	1919
1328	1920	static int qca_init_regulators(struct qca_power *qca,
1329	1921	const struct qca_vreg *vregs, size_t num_vregs)
1330	1922	{
	1923	+ struct regulator_bulk_data *bulk;
	1924	+ int ret;
1331	1925	int i;
1332	1926
1333		- qca->vreg_bulk = devm_kcalloc(qca->dev, num_vregs,
1334		- sizeof(struct regulator_bulk_data),
1335		- GFP_KERNEL);
1336		- if (!qca->vreg_bulk)
	1927	+ bulk = devm_kcalloc(qca->dev, num_vregs, sizeof(*bulk), GFP_KERNEL);
	1928	+ if (!bulk)
1337	1929	return -ENOMEM;
1338	1930
1339	1931	for (i = 0; i < num_vregs; i++)
1340		- qca->vreg_bulk[i].supply = vregs[i].name;
	1932	+ bulk[i].supply = vregs[i].name;
1341	1933
1342		- return devm_regulator_bulk_get(qca->dev, num_vregs, qca->vreg_bulk);
	1934	+ ret = devm_regulator_bulk_get(qca->dev, num_vregs, bulk);
	1935	+ if (ret < 0)
	1936	+ return ret;
	1937	+
	1938	+ for (i = 0; i < num_vregs; i++) {
	1939	+ ret = regulator_set_load(bulk[i].consumer, vregs[i].load_uA);
	1940	+ if (ret)
	1941	+ return ret;
	1942	+ }
	1943	+
	1944	+ qca->vreg_bulk = bulk;
	1945	+ qca->num_vregs = num_vregs;
	1946	+
	1947	+ return 0;
1343	1948	}
1344	1949
1345	1950	static int qca_serdev_probe(struct serdev_device *serdev)
1346	1951	{
1347	1952	struct qca_serdev *qcadev;
1348		- const struct qca_vreg_data *data;
	1953	+ struct hci_dev *hdev;
	1954	+ const struct qca_device_data *data;
1349	1955	int err;
	1956	+ bool power_ctrl_enabled = true;
1350	1957
1351	1958	qcadev = devm_kzalloc(&serdev->dev, sizeof(*qcadev), GFP_KERNEL);
1352	1959	if (!qcadev)
1353	1960	return -ENOMEM;
1354	1961
1355	1962	qcadev->serdev_hu.serdev = serdev;
1356		- data = of_device_get_match_data(&serdev->dev);
	1963	+ data = device_get_match_data(&serdev->dev);
1357	1964	serdev_device_set_drvdata(serdev, qcadev);
1358		- if (data && data->soc_type == QCA_WCN3990) {
1359		- qcadev->btsoc_type = QCA_WCN3990;
	1965	+ device_property_read_string(&serdev->dev, "firmware-name",
	1966	+ &qcadev->firmware_name);
	1967	+ device_property_read_u32(&serdev->dev, "max-speed",
	1968	+ &qcadev->oper_speed);
	1969	+ if (!qcadev->oper_speed)
	1970	+ BT_DBG("UART will pick default operating speed");
	1971	+
	1972	+ if (data && qca_is_wcn399x(data->soc_type)) {
	1973	+ qcadev->btsoc_type = data->soc_type;
1360	1974	qcadev->bt_power = devm_kzalloc(&serdev->dev,
1361	1975	sizeof(struct qca_power),
1362	1976	GFP_KERNEL);
..	..	@@ -1364,41 +1978,44 @@
1364	1978	return -ENOMEM;
1365	1979
1366	1980	qcadev->bt_power->dev = &serdev->dev;
1367		- qcadev->bt_power->vreg_data = data;
1368	1981	err = qca_init_regulators(qcadev->bt_power, data->vregs,
1369	1982	data->num_vregs);
1370	1983	if (err) {
1371	1984	BT_ERR("Failed to init regulators:%d", err);
1372		- goto out;
	1985	+ return err;
1373	1986	}
1374	1987
1375	1988	qcadev->bt_power->vregs_on = false;
1376	1989
1377		- device_property_read_u32(&serdev->dev, "max-speed",
1378		- &qcadev->oper_speed);
1379		- if (!qcadev->oper_speed)
1380		- BT_DBG("UART will pick default operating speed");
1381		-
1382		- err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto);
1383		- if (err) {
1384		- BT_ERR("wcn3990 serdev registration failed");
1385		- goto out;
1386		- }
1387		- } else {
1388		- qcadev->btsoc_type = QCA_ROME;
1389		- qcadev->bt_en = devm_gpiod_get(&serdev->dev, "enable",
1390		- GPIOD_OUT_LOW);
1391		- if (IS_ERR(qcadev->bt_en)) {
1392		- dev_err(&serdev->dev, "failed to acquire enable gpio\n");
1393		- return PTR_ERR(qcadev->bt_en);
1394		- }
1395		-
1396		- qcadev->susclk = devm_clk_get(&serdev->dev, NULL);
	1990	+ qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL);
1397	1991	if (IS_ERR(qcadev->susclk)) {
1398	1992	dev_err(&serdev->dev, "failed to acquire clk\n");
1399	1993	return PTR_ERR(qcadev->susclk);
1400	1994	}
1401	1995
	1996	+ err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto);
	1997	+ if (err) {
	1998	+ BT_ERR("wcn3990 serdev registration failed");
	1999	+ return err;
	2000	+ }
	2001	+ } else {
	2002	+ if (data)
	2003	+ qcadev->btsoc_type = data->soc_type;
	2004	+ else
	2005	+ qcadev->btsoc_type = QCA_ROME;
	2006	+
	2007	+ qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable",
	2008	+ GPIOD_OUT_LOW);
	2009	+ if (IS_ERR_OR_NULL(qcadev->bt_en)) {
	2010	+ dev_warn(&serdev->dev, "failed to acquire enable gpio\n");
	2011	+ power_ctrl_enabled = false;
	2012	+ }
	2013	+
	2014	+ qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL);
	2015	+ if (IS_ERR(qcadev->susclk)) {
	2016	+ dev_warn(&serdev->dev, "failed to acquire clk\n");
	2017	+ return PTR_ERR(qcadev->susclk);
	2018	+ }
1402	2019	err = clk_set_rate(qcadev->susclk, SUSCLK_RATE_32KHZ);
1403	2020	if (err)
1404	2021	return err;
..	..	@@ -1408,39 +2025,249 @@
1408	2025	return err;
1409	2026
1410	2027	err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto);
1411		- if (err)
	2028	+ if (err) {
	2029	+ BT_ERR("Rome serdev registration failed");
1412	2030	clk_disable_unprepare(qcadev->susclk);
	2031	+ return err;
	2032	+ }
1413	2033	}
1414	2034
1415		-out: return err;
	2035	+ hdev = qcadev->serdev_hu.hdev;
1416	2036
	2037	+ if (power_ctrl_enabled) {
	2038	+ set_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks);
	2039	+ hdev->shutdown = qca_power_off;
	2040	+ }
	2041	+
	2042	+ if (data) {
	2043	+ /* Wideband speech support must be set per driver since it can't
	2044	+ * be queried via hci. Same with the valid le states quirk.
	2045	+ */
	2046	+ if (data->capabilities & QCA_CAP_WIDEBAND_SPEECH)
	2047	+ set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED,
	2048	+ &hdev->quirks);
	2049	+
	2050	+ if (data->capabilities & QCA_CAP_VALID_LE_STATES)
	2051	+ set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks);
	2052	+ }
	2053	+
	2054	+ return 0;
1417	2055	}
1418	2056
1419	2057	static void qca_serdev_remove(struct serdev_device *serdev)
1420	2058	{
1421	2059	struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
	2060	+ struct qca_power *power = qcadev->bt_power;
1422	2061
1423		- if (qcadev->btsoc_type == QCA_WCN3990)
	2062	+ if (qca_is_wcn399x(qcadev->btsoc_type) && power->vregs_on)
1424	2063	qca_power_shutdown(&qcadev->serdev_hu);
1425		- else
	2064	+ else if (qcadev->susclk)
1426	2065	clk_disable_unprepare(qcadev->susclk);
1427	2066
1428	2067	hci_uart_unregister_device(&qcadev->serdev_hu);
1429	2068	}
1430	2069
	2070	+static void qca_serdev_shutdown(struct device *dev)
	2071	+{
	2072	+ int ret;
	2073	+ int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS);
	2074	+ struct serdev_device *serdev = to_serdev_device(dev);
	2075	+ struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
	2076	+ struct hci_uart *hu = &qcadev->serdev_hu;
	2077	+ struct hci_dev *hdev = hu->hdev;
	2078	+ struct qca_data *qca = hu->priv;
	2079	+ const u8 ibs_wake_cmd[] = { 0xFD };
	2080	+ const u8 edl_reset_soc_cmd[] = { 0x01, 0x00, 0xFC, 0x01, 0x05 };
	2081	+
	2082	+ if (qcadev->btsoc_type == QCA_QCA6390) {
	2083	+ if (test_bit(QCA_BT_OFF, &qca->flags) \|\|
	2084	+ !test_bit(HCI_RUNNING, &hdev->flags))
	2085	+ return;
	2086	+
	2087	+ serdev_device_write_flush(serdev);
	2088	+ ret = serdev_device_write_buf(serdev, ibs_wake_cmd,
	2089	+ sizeof(ibs_wake_cmd));
	2090	+ if (ret < 0) {
	2091	+ BT_ERR("QCA send IBS_WAKE_IND error: %d", ret);
	2092	+ return;
	2093	+ }
	2094	+ serdev_device_wait_until_sent(serdev, timeout);
	2095	+ usleep_range(8000, 10000);
	2096	+
	2097	+ serdev_device_write_flush(serdev);
	2098	+ ret = serdev_device_write_buf(serdev, edl_reset_soc_cmd,
	2099	+ sizeof(edl_reset_soc_cmd));
	2100	+ if (ret < 0) {
	2101	+ BT_ERR("QCA send EDL_RESET_REQ error: %d", ret);
	2102	+ return;
	2103	+ }
	2104	+ serdev_device_wait_until_sent(serdev, timeout);
	2105	+ usleep_range(8000, 10000);
	2106	+ }
	2107	+}
	2108	+
	2109	+static int __maybe_unused qca_suspend(struct device *dev)
	2110	+{
	2111	+ struct serdev_device *serdev = to_serdev_device(dev);
	2112	+ struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
	2113	+ struct hci_uart *hu = &qcadev->serdev_hu;
	2114	+ struct qca_data *qca = hu->priv;
	2115	+ unsigned long flags;
	2116	+ bool tx_pending = false;
	2117	+ int ret = 0;
	2118	+ u8 cmd;
	2119	+ u32 wait_timeout = 0;
	2120	+
	2121	+ set_bit(QCA_SUSPENDING, &qca->flags);
	2122	+
	2123	+ /* if BT SoC is running with default firmware then it does not
	2124	+ * support in-band sleep
	2125	+ */
	2126	+ if (test_bit(QCA_ROM_FW, &qca->flags))
	2127	+ return 0;
	2128	+
	2129	+ /* During SSR after memory dump collection, controller will be
	2130	+ * powered off and then powered on.If controller is powered off
	2131	+ * during SSR then we should wait until SSR is completed.
	2132	+ */
	2133	+ if (test_bit(QCA_BT_OFF, &qca->flags) &&
	2134	+ !test_bit(QCA_SSR_TRIGGERED, &qca->flags))
	2135	+ return 0;
	2136	+
	2137	+ if (test_bit(QCA_IBS_DISABLED, &qca->flags) \|\|
	2138	+ test_bit(QCA_SSR_TRIGGERED, &qca->flags)) {
	2139	+ wait_timeout = test_bit(QCA_SSR_TRIGGERED, &qca->flags) ?
	2140	+ IBS_DISABLE_SSR_TIMEOUT_MS :
	2141	+ FW_DOWNLOAD_TIMEOUT_MS;
	2142	+
	2143	+ /* QCA_IBS_DISABLED flag is set to true, During FW download
	2144	+ * and during memory dump collection. It is reset to false,
	2145	+ * After FW download complete.
	2146	+ */
	2147	+ wait_on_bit_timeout(&qca->flags, QCA_IBS_DISABLED,
	2148	+ TASK_UNINTERRUPTIBLE, msecs_to_jiffies(wait_timeout));
	2149	+
	2150	+ if (test_bit(QCA_IBS_DISABLED, &qca->flags)) {
	2151	+ bt_dev_err(hu->hdev, "SSR or FW download time out");
	2152	+ ret = -ETIMEDOUT;
	2153	+ goto error;
	2154	+ }
	2155	+ }
	2156	+
	2157	+ cancel_work_sync(&qca->ws_awake_device);
	2158	+ cancel_work_sync(&qca->ws_awake_rx);
	2159	+
	2160	+ spin_lock_irqsave_nested(&qca->hci_ibs_lock,
	2161	+ flags, SINGLE_DEPTH_NESTING);
	2162	+
	2163	+ switch (qca->tx_ibs_state) {
	2164	+ case HCI_IBS_TX_WAKING:
	2165	+ del_timer(&qca->wake_retrans_timer);
	2166	+ fallthrough;
	2167	+ case HCI_IBS_TX_AWAKE:
	2168	+ del_timer(&qca->tx_idle_timer);
	2169	+
	2170	+ serdev_device_write_flush(hu->serdev);
	2171	+ cmd = HCI_IBS_SLEEP_IND;
	2172	+ ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd));
	2173	+
	2174	+ if (ret < 0) {
	2175	+ BT_ERR("Failed to send SLEEP to device");
	2176	+ break;
	2177	+ }
	2178	+
	2179	+ qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
	2180	+ qca->ibs_sent_slps++;
	2181	+ tx_pending = true;
	2182	+ break;
	2183	+
	2184	+ case HCI_IBS_TX_ASLEEP:
	2185	+ break;
	2186	+
	2187	+ default:
	2188	+ BT_ERR("Spurious tx state %d", qca->tx_ibs_state);
	2189	+ ret = -EINVAL;
	2190	+ break;
	2191	+ }
	2192	+
	2193	+ spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
	2194	+
	2195	+ if (ret < 0)
	2196	+ goto error;
	2197	+
	2198	+ if (tx_pending) {
	2199	+ serdev_device_wait_until_sent(hu->serdev,
	2200	+ msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS));
	2201	+ serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu);
	2202	+ }
	2203	+
	2204	+ /* Wait for HCI_IBS_SLEEP_IND sent by device to indicate its Tx is going
	2205	+ * to sleep, so that the packet does not wake the system later.
	2206	+ */
	2207	+ ret = wait_event_interruptible_timeout(qca->suspend_wait_q,
	2208	+ qca->rx_ibs_state == HCI_IBS_RX_ASLEEP,
	2209	+ msecs_to_jiffies(IBS_BTSOC_TX_IDLE_TIMEOUT_MS));
	2210	+ if (ret == 0) {
	2211	+ ret = -ETIMEDOUT;
	2212	+ goto error;
	2213	+ }
	2214	+
	2215	+ return 0;
	2216	+
	2217	+error:
	2218	+ clear_bit(QCA_SUSPENDING, &qca->flags);
	2219	+
	2220	+ return ret;
	2221	+}
	2222	+
	2223	+static int __maybe_unused qca_resume(struct device *dev)
	2224	+{
	2225	+ struct serdev_device *serdev = to_serdev_device(dev);
	2226	+ struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
	2227	+ struct hci_uart *hu = &qcadev->serdev_hu;
	2228	+ struct qca_data *qca = hu->priv;
	2229	+
	2230	+ clear_bit(QCA_SUSPENDING, &qca->flags);
	2231	+
	2232	+ return 0;
	2233	+}
	2234	+
	2235	+static SIMPLE_DEV_PM_OPS(qca_pm_ops, qca_suspend, qca_resume);
	2236	+
	2237	+#ifdef CONFIG_OF
1431	2238	static const struct of_device_id qca_bluetooth_of_match[] = {
1432	2239	{ .compatible = "qcom,qca6174-bt" },
1433		- { .compatible = "qcom,wcn3990-bt", .data = &qca_soc_data},
	2240	+ { .compatible = "qcom,qca6390-bt", .data = &qca_soc_data_qca6390},
	2241	+ { .compatible = "qcom,qca9377-bt" },
	2242	+ { .compatible = "qcom,wcn3990-bt", .data = &qca_soc_data_wcn3990},
	2243	+ { .compatible = "qcom,wcn3991-bt", .data = &qca_soc_data_wcn3991},
	2244	+ { .compatible = "qcom,wcn3998-bt", .data = &qca_soc_data_wcn3998},
1434	2245	{ /* sentinel */ }
1435	2246	};
1436	2247	MODULE_DEVICE_TABLE(of, qca_bluetooth_of_match);
	2248	+#endif
	2249	+
	2250	+#ifdef CONFIG_ACPI
	2251	+static const struct acpi_device_id qca_bluetooth_acpi_match[] = {
	2252	+ { "QCOM6390", (kernel_ulong_t)&qca_soc_data_qca6390 },
	2253	+ { "DLA16390", (kernel_ulong_t)&qca_soc_data_qca6390 },
	2254	+ { "DLB16390", (kernel_ulong_t)&qca_soc_data_qca6390 },
	2255	+ { "DLB26390", (kernel_ulong_t)&qca_soc_data_qca6390 },
	2256	+ { },
	2257	+};
	2258	+MODULE_DEVICE_TABLE(acpi, qca_bluetooth_acpi_match);
	2259	+#endif
	2260	+
1437	2261
1438	2262	static struct serdev_device_driver qca_serdev_driver = {
1439	2263	.probe = qca_serdev_probe,
1440	2264	.remove = qca_serdev_remove,
1441	2265	.driver = {
1442	2266	.name = "hci_uart_qca",
1443		- .of_match_table = qca_bluetooth_of_match,
	2267	+ .of_match_table = of_match_ptr(qca_bluetooth_of_match),
	2268	+ .acpi_match_table = ACPI_PTR(qca_bluetooth_acpi_match),
	2269	+ .shutdown = qca_serdev_shutdown,
	2270	+ .pm = &qca_pm_ops,
1444	2271	},
1445	2272	};
1446	2273