.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * AMD CPU Microcode Update Driver for Linux |
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3 | 4 | * |
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.. | .. |
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5 | 6 | * CPUs and later. |
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6 | 7 | * |
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7 | 8 | * Copyright (C) 2008-2011 Advanced Micro Devices Inc. |
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8 | | - * 2013-2016 Borislav Petkov <bp@alien8.de> |
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| 9 | + * 2013-2018 Borislav Petkov <bp@alien8.de> |
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9 | 10 | * |
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10 | 11 | * Author: Peter Oruba <peter.oruba@amd.com> |
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11 | 12 | * |
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.. | .. |
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17 | 18 | * |
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18 | 19 | * Author: Jacob Shin <jacob.shin@amd.com> |
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19 | 20 | * Fixes: Borislav Petkov <bp@suse.de> |
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20 | | - * |
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21 | | - * Licensed under the terms of the GNU General Public |
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22 | | - * License version 2. See file COPYING for details. |
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23 | 21 | */ |
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24 | 22 | #define pr_fmt(fmt) "microcode: " fmt |
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25 | 23 | |
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.. | .. |
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38 | 36 | #include <asm/cpu.h> |
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39 | 37 | #include <asm/msr.h> |
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40 | 38 | |
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41 | | -static struct equiv_cpu_entry *equiv_cpu_table; |
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| 39 | +static struct equiv_cpu_table { |
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| 40 | + unsigned int num_entries; |
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| 41 | + struct equiv_cpu_entry *entry; |
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| 42 | +} equiv_table; |
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42 | 43 | |
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43 | 44 | /* |
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44 | 45 | * This points to the current valid container of microcode patches which we will |
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.. | .. |
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54 | 55 | }; |
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55 | 56 | |
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56 | 57 | static u32 ucode_new_rev; |
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57 | | -static u8 amd_ucode_patch[PATCH_MAX_SIZE]; |
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| 58 | + |
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| 59 | +/* One blob per node. */ |
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| 60 | +static u8 amd_ucode_patch[MAX_NUMNODES][PATCH_MAX_SIZE]; |
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58 | 61 | |
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59 | 62 | /* |
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60 | 63 | * Microcode patch container file is prepended to the initrd in cpio |
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61 | | - * format. See Documentation/x86/microcode.txt |
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| 64 | + * format. See Documentation/x86/microcode.rst |
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62 | 65 | */ |
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63 | 66 | static const char |
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64 | 67 | ucode_path[] __maybe_unused = "kernel/x86/microcode/AuthenticAMD.bin"; |
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65 | 68 | |
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66 | | -static u16 find_equiv_id(struct equiv_cpu_entry *equiv_table, u32 sig) |
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| 69 | +static u16 find_equiv_id(struct equiv_cpu_table *et, u32 sig) |
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67 | 70 | { |
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68 | | - for (; equiv_table && equiv_table->installed_cpu; equiv_table++) { |
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69 | | - if (sig == equiv_table->installed_cpu) |
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70 | | - return equiv_table->equiv_cpu; |
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| 71 | + unsigned int i; |
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| 72 | + |
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| 73 | + if (!et || !et->num_entries) |
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| 74 | + return 0; |
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| 75 | + |
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| 76 | + for (i = 0; i < et->num_entries; i++) { |
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| 77 | + struct equiv_cpu_entry *e = &et->entry[i]; |
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| 78 | + |
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| 79 | + if (sig == e->installed_cpu) |
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| 80 | + return e->equiv_cpu; |
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| 81 | + |
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| 82 | + e++; |
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71 | 83 | } |
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| 84 | + return 0; |
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| 85 | +} |
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| 86 | + |
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| 87 | +/* |
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| 88 | + * Check whether there is a valid microcode container file at the beginning |
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| 89 | + * of @buf of size @buf_size. Set @early to use this function in the early path. |
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| 90 | + */ |
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| 91 | +static bool verify_container(const u8 *buf, size_t buf_size, bool early) |
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| 92 | +{ |
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| 93 | + u32 cont_magic; |
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| 94 | + |
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| 95 | + if (buf_size <= CONTAINER_HDR_SZ) { |
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| 96 | + if (!early) |
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| 97 | + pr_debug("Truncated microcode container header.\n"); |
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| 98 | + |
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| 99 | + return false; |
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| 100 | + } |
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| 101 | + |
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| 102 | + cont_magic = *(const u32 *)buf; |
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| 103 | + if (cont_magic != UCODE_MAGIC) { |
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| 104 | + if (!early) |
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| 105 | + pr_debug("Invalid magic value (0x%08x).\n", cont_magic); |
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| 106 | + |
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| 107 | + return false; |
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| 108 | + } |
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| 109 | + |
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| 110 | + return true; |
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| 111 | +} |
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| 112 | + |
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| 113 | +/* |
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| 114 | + * Check whether there is a valid, non-truncated CPU equivalence table at the |
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| 115 | + * beginning of @buf of size @buf_size. Set @early to use this function in the |
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| 116 | + * early path. |
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| 117 | + */ |
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| 118 | +static bool verify_equivalence_table(const u8 *buf, size_t buf_size, bool early) |
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| 119 | +{ |
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| 120 | + const u32 *hdr = (const u32 *)buf; |
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| 121 | + u32 cont_type, equiv_tbl_len; |
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| 122 | + |
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| 123 | + if (!verify_container(buf, buf_size, early)) |
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| 124 | + return false; |
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| 125 | + |
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| 126 | + cont_type = hdr[1]; |
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| 127 | + if (cont_type != UCODE_EQUIV_CPU_TABLE_TYPE) { |
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| 128 | + if (!early) |
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| 129 | + pr_debug("Wrong microcode container equivalence table type: %u.\n", |
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| 130 | + cont_type); |
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| 131 | + |
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| 132 | + return false; |
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| 133 | + } |
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| 134 | + |
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| 135 | + buf_size -= CONTAINER_HDR_SZ; |
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| 136 | + |
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| 137 | + equiv_tbl_len = hdr[2]; |
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| 138 | + if (equiv_tbl_len < sizeof(struct equiv_cpu_entry) || |
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| 139 | + buf_size < equiv_tbl_len) { |
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| 140 | + if (!early) |
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| 141 | + pr_debug("Truncated equivalence table.\n"); |
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| 142 | + |
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| 143 | + return false; |
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| 144 | + } |
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| 145 | + |
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| 146 | + return true; |
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| 147 | +} |
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| 148 | + |
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| 149 | +/* |
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| 150 | + * Check whether there is a valid, non-truncated microcode patch section at the |
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| 151 | + * beginning of @buf of size @buf_size. Set @early to use this function in the |
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| 152 | + * early path. |
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| 153 | + * |
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| 154 | + * On success, @sh_psize returns the patch size according to the section header, |
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| 155 | + * to the caller. |
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| 156 | + */ |
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| 157 | +static bool |
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| 158 | +__verify_patch_section(const u8 *buf, size_t buf_size, u32 *sh_psize, bool early) |
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| 159 | +{ |
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| 160 | + u32 p_type, p_size; |
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| 161 | + const u32 *hdr; |
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| 162 | + |
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| 163 | + if (buf_size < SECTION_HDR_SIZE) { |
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| 164 | + if (!early) |
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| 165 | + pr_debug("Truncated patch section.\n"); |
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| 166 | + |
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| 167 | + return false; |
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| 168 | + } |
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| 169 | + |
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| 170 | + hdr = (const u32 *)buf; |
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| 171 | + p_type = hdr[0]; |
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| 172 | + p_size = hdr[1]; |
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| 173 | + |
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| 174 | + if (p_type != UCODE_UCODE_TYPE) { |
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| 175 | + if (!early) |
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| 176 | + pr_debug("Invalid type field (0x%x) in container file section header.\n", |
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| 177 | + p_type); |
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| 178 | + |
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| 179 | + return false; |
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| 180 | + } |
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| 181 | + |
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| 182 | + if (p_size < sizeof(struct microcode_header_amd)) { |
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| 183 | + if (!early) |
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| 184 | + pr_debug("Patch of size %u too short.\n", p_size); |
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| 185 | + |
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| 186 | + return false; |
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| 187 | + } |
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| 188 | + |
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| 189 | + *sh_psize = p_size; |
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| 190 | + |
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| 191 | + return true; |
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| 192 | +} |
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| 193 | + |
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| 194 | +/* |
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| 195 | + * Check whether the passed remaining file @buf_size is large enough to contain |
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| 196 | + * a patch of the indicated @sh_psize (and also whether this size does not |
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| 197 | + * exceed the per-family maximum). @sh_psize is the size read from the section |
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| 198 | + * header. |
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| 199 | + */ |
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| 200 | +static unsigned int __verify_patch_size(u8 family, u32 sh_psize, size_t buf_size) |
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| 201 | +{ |
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| 202 | + u32 max_size; |
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| 203 | + |
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| 204 | + if (family >= 0x15) |
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| 205 | + return min_t(u32, sh_psize, buf_size); |
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| 206 | + |
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| 207 | +#define F1XH_MPB_MAX_SIZE 2048 |
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| 208 | +#define F14H_MPB_MAX_SIZE 1824 |
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| 209 | + |
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| 210 | + switch (family) { |
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| 211 | + case 0x10 ... 0x12: |
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| 212 | + max_size = F1XH_MPB_MAX_SIZE; |
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| 213 | + break; |
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| 214 | + case 0x14: |
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| 215 | + max_size = F14H_MPB_MAX_SIZE; |
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| 216 | + break; |
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| 217 | + default: |
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| 218 | + WARN(1, "%s: WTF family: 0x%x\n", __func__, family); |
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| 219 | + return 0; |
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| 220 | + break; |
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| 221 | + } |
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| 222 | + |
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| 223 | + if (sh_psize > min_t(u32, buf_size, max_size)) |
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| 224 | + return 0; |
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| 225 | + |
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| 226 | + return sh_psize; |
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| 227 | +} |
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| 228 | + |
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| 229 | +/* |
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| 230 | + * Verify the patch in @buf. |
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| 231 | + * |
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| 232 | + * Returns: |
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| 233 | + * negative: on error |
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| 234 | + * positive: patch is not for this family, skip it |
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| 235 | + * 0: success |
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| 236 | + */ |
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| 237 | +static int |
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| 238 | +verify_patch(u8 family, const u8 *buf, size_t buf_size, u32 *patch_size, bool early) |
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| 239 | +{ |
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| 240 | + struct microcode_header_amd *mc_hdr; |
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| 241 | + unsigned int ret; |
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| 242 | + u32 sh_psize; |
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| 243 | + u16 proc_id; |
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| 244 | + u8 patch_fam; |
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| 245 | + |
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| 246 | + if (!__verify_patch_section(buf, buf_size, &sh_psize, early)) |
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| 247 | + return -1; |
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| 248 | + |
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| 249 | + /* |
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| 250 | + * The section header length is not included in this indicated size |
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| 251 | + * but is present in the leftover file length so we need to subtract |
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| 252 | + * it before passing this value to the function below. |
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| 253 | + */ |
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| 254 | + buf_size -= SECTION_HDR_SIZE; |
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| 255 | + |
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| 256 | + /* |
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| 257 | + * Check if the remaining buffer is big enough to contain a patch of |
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| 258 | + * size sh_psize, as the section claims. |
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| 259 | + */ |
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| 260 | + if (buf_size < sh_psize) { |
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| 261 | + if (!early) |
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| 262 | + pr_debug("Patch of size %u truncated.\n", sh_psize); |
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| 263 | + |
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| 264 | + return -1; |
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| 265 | + } |
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| 266 | + |
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| 267 | + ret = __verify_patch_size(family, sh_psize, buf_size); |
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| 268 | + if (!ret) { |
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| 269 | + if (!early) |
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| 270 | + pr_debug("Per-family patch size mismatch.\n"); |
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| 271 | + return -1; |
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| 272 | + } |
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| 273 | + |
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| 274 | + *patch_size = sh_psize; |
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| 275 | + |
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| 276 | + mc_hdr = (struct microcode_header_amd *)(buf + SECTION_HDR_SIZE); |
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| 277 | + if (mc_hdr->nb_dev_id || mc_hdr->sb_dev_id) { |
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| 278 | + if (!early) |
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| 279 | + pr_err("Patch-ID 0x%08x: chipset-specific code unsupported.\n", mc_hdr->patch_id); |
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| 280 | + return -1; |
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| 281 | + } |
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| 282 | + |
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| 283 | + proc_id = mc_hdr->processor_rev_id; |
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| 284 | + patch_fam = 0xf + (proc_id >> 12); |
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| 285 | + if (patch_fam != family) |
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| 286 | + return 1; |
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72 | 287 | |
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73 | 288 | return 0; |
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74 | 289 | } |
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.. | .. |
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80 | 295 | * Returns the amount of bytes consumed while scanning. @desc contains all the |
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81 | 296 | * data we're going to use in later stages of the application. |
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82 | 297 | */ |
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83 | | -static ssize_t parse_container(u8 *ucode, ssize_t size, struct cont_desc *desc) |
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| 298 | +static size_t parse_container(u8 *ucode, size_t size, struct cont_desc *desc) |
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84 | 299 | { |
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85 | | - struct equiv_cpu_entry *eq; |
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86 | | - ssize_t orig_size = size; |
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| 300 | + struct equiv_cpu_table table; |
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| 301 | + size_t orig_size = size; |
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87 | 302 | u32 *hdr = (u32 *)ucode; |
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88 | 303 | u16 eq_id; |
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89 | 304 | u8 *buf; |
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90 | 305 | |
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91 | | - /* Am I looking at an equivalence table header? */ |
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92 | | - if (hdr[0] != UCODE_MAGIC || |
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93 | | - hdr[1] != UCODE_EQUIV_CPU_TABLE_TYPE || |
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94 | | - hdr[2] == 0) |
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95 | | - return CONTAINER_HDR_SZ; |
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| 306 | + if (!verify_equivalence_table(ucode, size, true)) |
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| 307 | + return 0; |
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96 | 308 | |
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97 | 309 | buf = ucode; |
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98 | 310 | |
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99 | | - eq = (struct equiv_cpu_entry *)(buf + CONTAINER_HDR_SZ); |
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| 311 | + table.entry = (struct equiv_cpu_entry *)(buf + CONTAINER_HDR_SZ); |
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| 312 | + table.num_entries = hdr[2] / sizeof(struct equiv_cpu_entry); |
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100 | 313 | |
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101 | | - /* Find the equivalence ID of our CPU in this table: */ |
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102 | | - eq_id = find_equiv_id(eq, desc->cpuid_1_eax); |
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| 314 | + /* |
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| 315 | + * Find the equivalence ID of our CPU in this table. Even if this table |
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| 316 | + * doesn't contain a patch for the CPU, scan through the whole container |
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| 317 | + * so that it can be skipped in case there are other containers appended. |
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| 318 | + */ |
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| 319 | + eq_id = find_equiv_id(&table, desc->cpuid_1_eax); |
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103 | 320 | |
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104 | 321 | buf += hdr[2] + CONTAINER_HDR_SZ; |
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105 | 322 | size -= hdr[2] + CONTAINER_HDR_SZ; |
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.. | .. |
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111 | 328 | while (size > 0) { |
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112 | 329 | struct microcode_amd *mc; |
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113 | 330 | u32 patch_size; |
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| 331 | + int ret; |
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114 | 332 | |
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115 | | - hdr = (u32 *)buf; |
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| 333 | + ret = verify_patch(x86_family(desc->cpuid_1_eax), buf, size, &patch_size, true); |
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| 334 | + if (ret < 0) { |
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| 335 | + /* |
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| 336 | + * Patch verification failed, skip to the next |
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| 337 | + * container, if there's one: |
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| 338 | + */ |
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| 339 | + goto out; |
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| 340 | + } else if (ret > 0) { |
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| 341 | + goto skip; |
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| 342 | + } |
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116 | 343 | |
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117 | | - if (hdr[0] != UCODE_UCODE_TYPE) |
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118 | | - break; |
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119 | | - |
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120 | | - /* Sanity-check patch size. */ |
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121 | | - patch_size = hdr[1]; |
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122 | | - if (patch_size > PATCH_MAX_SIZE) |
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123 | | - break; |
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124 | | - |
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125 | | - /* Skip patch section header: */ |
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126 | | - buf += SECTION_HDR_SIZE; |
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127 | | - size -= SECTION_HDR_SIZE; |
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128 | | - |
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129 | | - mc = (struct microcode_amd *)buf; |
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| 344 | + mc = (struct microcode_amd *)(buf + SECTION_HDR_SIZE); |
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130 | 345 | if (eq_id == mc->hdr.processor_rev_id) { |
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131 | 346 | desc->psize = patch_size; |
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132 | 347 | desc->mc = mc; |
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133 | 348 | } |
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134 | 349 | |
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135 | | - buf += patch_size; |
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136 | | - size -= patch_size; |
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| 350 | +skip: |
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| 351 | + /* Skip patch section header too: */ |
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| 352 | + buf += patch_size + SECTION_HDR_SIZE; |
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| 353 | + size -= patch_size + SECTION_HDR_SIZE; |
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137 | 354 | } |
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138 | 355 | |
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139 | 356 | /* |
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.. | .. |
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150 | 367 | return 0; |
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151 | 368 | } |
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152 | 369 | |
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| 370 | +out: |
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153 | 371 | return orig_size - size; |
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154 | 372 | } |
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155 | 373 | |
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.. | .. |
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159 | 377 | */ |
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160 | 378 | static void scan_containers(u8 *ucode, size_t size, struct cont_desc *desc) |
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161 | 379 | { |
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162 | | - ssize_t rem = size; |
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163 | | - |
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164 | | - while (rem >= 0) { |
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165 | | - ssize_t s = parse_container(ucode, rem, desc); |
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| 380 | + while (size) { |
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| 381 | + size_t s = parse_container(ucode, size, desc); |
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166 | 382 | if (!s) |
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167 | 383 | return; |
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168 | 384 | |
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169 | | - ucode += s; |
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170 | | - rem -= s; |
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| 385 | + /* catch wraparound */ |
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| 386 | + if (size >= s) { |
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| 387 | + ucode += s; |
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| 388 | + size -= s; |
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| 389 | + } else { |
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| 390 | + return; |
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| 391 | + } |
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171 | 392 | } |
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172 | 393 | } |
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173 | 394 | |
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.. | .. |
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210 | 431 | patch = (u8 (*)[PATCH_MAX_SIZE])__pa_nodebug(&amd_ucode_patch); |
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211 | 432 | #else |
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212 | 433 | new_rev = &ucode_new_rev; |
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213 | | - patch = &amd_ucode_patch; |
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| 434 | + patch = &amd_ucode_patch[0]; |
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214 | 435 | #endif |
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215 | 436 | |
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216 | 437 | desc.cpuid_1_eax = cpuid_1_eax; |
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.. | .. |
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222 | 443 | return ret; |
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223 | 444 | |
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224 | 445 | native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); |
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225 | | - if (rev >= mc->hdr.patch_id) |
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| 446 | + |
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| 447 | + /* |
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| 448 | + * Allow application of the same revision to pick up SMT-specific |
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| 449 | + * changes even if the revision of the other SMT thread is already |
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| 450 | + * up-to-date. |
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| 451 | + */ |
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| 452 | + if (rev > mc->hdr.patch_id) |
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226 | 453 | return ret; |
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227 | 454 | |
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228 | 455 | if (!__apply_microcode_amd(mc)) { |
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.. | .. |
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304 | 531 | |
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305 | 532 | native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); |
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306 | 533 | |
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307 | | - /* Check whether we have saved a new patch already: */ |
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308 | | - if (*new_rev && rev < mc->hdr.patch_id) { |
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| 534 | + /* |
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| 535 | + * Check whether a new patch has been saved already. Also, allow application of |
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| 536 | + * the same revision in order to pick up SMT-thread-specific configuration even |
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| 537 | + * if the sibling SMT thread already has an up-to-date revision. |
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| 538 | + */ |
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| 539 | + if (*new_rev && rev <= mc->hdr.patch_id) { |
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309 | 540 | if (!__apply_microcode_amd(mc)) { |
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310 | 541 | *new_rev = mc->hdr.patch_id; |
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311 | 542 | return; |
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.. | .. |
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319 | 550 | apply_microcode_early_amd(cpuid_1_eax, cp.data, cp.size, false); |
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320 | 551 | } |
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321 | 552 | |
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322 | | -static enum ucode_state |
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323 | | -load_microcode_amd(bool save, u8 family, const u8 *data, size_t size); |
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| 553 | +static enum ucode_state load_microcode_amd(u8 family, const u8 *data, size_t size); |
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324 | 554 | |
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325 | 555 | int __init save_microcode_in_initrd_amd(unsigned int cpuid_1_eax) |
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326 | 556 | { |
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.. | .. |
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338 | 568 | if (!desc.mc) |
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339 | 569 | return -EINVAL; |
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340 | 570 | |
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341 | | - ret = load_microcode_amd(true, x86_family(cpuid_1_eax), desc.data, desc.size); |
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| 571 | + ret = load_microcode_amd(x86_family(cpuid_1_eax), desc.data, desc.size); |
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342 | 572 | if (ret > UCODE_UPDATED) |
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343 | 573 | return -EINVAL; |
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344 | 574 | |
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345 | 575 | return 0; |
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346 | 576 | } |
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347 | 577 | |
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348 | | -void reload_ucode_amd(void) |
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| 578 | +void reload_ucode_amd(unsigned int cpu) |
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349 | 579 | { |
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| 580 | + u32 rev, dummy __always_unused; |
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350 | 581 | struct microcode_amd *mc; |
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351 | | - u32 rev, dummy; |
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352 | 582 | |
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353 | | - mc = (struct microcode_amd *)amd_ucode_patch; |
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| 583 | + mc = (struct microcode_amd *)amd_ucode_patch[cpu_to_node(cpu)]; |
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354 | 584 | |
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355 | 585 | rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); |
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356 | 586 | |
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.. | .. |
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364 | 594 | static u16 __find_equiv_id(unsigned int cpu) |
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365 | 595 | { |
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366 | 596 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
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367 | | - return find_equiv_id(equiv_cpu_table, uci->cpu_sig.sig); |
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368 | | -} |
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369 | | - |
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370 | | -static u32 find_cpu_family_by_equiv_cpu(u16 equiv_cpu) |
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371 | | -{ |
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372 | | - int i = 0; |
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373 | | - |
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374 | | - BUG_ON(!equiv_cpu_table); |
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375 | | - |
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376 | | - while (equiv_cpu_table[i].equiv_cpu != 0) { |
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377 | | - if (equiv_cpu == equiv_cpu_table[i].equiv_cpu) |
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378 | | - return equiv_cpu_table[i].installed_cpu; |
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379 | | - i++; |
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380 | | - } |
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381 | | - return 0; |
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| 597 | + return find_equiv_id(&equiv_table, uci->cpu_sig.sig); |
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382 | 598 | } |
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383 | 599 | |
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384 | 600 | /* |
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.. | .. |
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461 | 677 | return 0; |
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462 | 678 | } |
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463 | 679 | |
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464 | | -static unsigned int verify_patch_size(u8 family, u32 patch_size, |
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465 | | - unsigned int size) |
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466 | | -{ |
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467 | | - u32 max_size; |
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468 | | - |
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469 | | -#define F1XH_MPB_MAX_SIZE 2048 |
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470 | | -#define F14H_MPB_MAX_SIZE 1824 |
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471 | | -#define F15H_MPB_MAX_SIZE 4096 |
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472 | | -#define F16H_MPB_MAX_SIZE 3458 |
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473 | | -#define F17H_MPB_MAX_SIZE 3200 |
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474 | | - |
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475 | | - switch (family) { |
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476 | | - case 0x14: |
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477 | | - max_size = F14H_MPB_MAX_SIZE; |
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478 | | - break; |
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479 | | - case 0x15: |
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480 | | - max_size = F15H_MPB_MAX_SIZE; |
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481 | | - break; |
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482 | | - case 0x16: |
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483 | | - max_size = F16H_MPB_MAX_SIZE; |
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484 | | - break; |
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485 | | - case 0x17: |
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486 | | - max_size = F17H_MPB_MAX_SIZE; |
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487 | | - break; |
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488 | | - default: |
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489 | | - max_size = F1XH_MPB_MAX_SIZE; |
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490 | | - break; |
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491 | | - } |
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492 | | - |
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493 | | - if (patch_size > min_t(u32, size, max_size)) { |
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494 | | - pr_err("patch size mismatch\n"); |
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495 | | - return 0; |
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496 | | - } |
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497 | | - |
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498 | | - return patch_size; |
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499 | | -} |
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500 | | - |
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501 | 680 | static enum ucode_state apply_microcode_amd(int cpu) |
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502 | 681 | { |
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503 | 682 | struct cpuinfo_x86 *c = &cpu_data(cpu); |
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.. | .. |
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505 | 684 | struct ucode_cpu_info *uci; |
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506 | 685 | struct ucode_patch *p; |
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507 | 686 | enum ucode_state ret; |
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508 | | - u32 rev, dummy; |
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| 687 | + u32 rev, dummy __always_unused; |
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509 | 688 | |
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510 | 689 | BUG_ON(raw_smp_processor_id() != cpu); |
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511 | 690 | |
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.. | .. |
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521 | 700 | rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); |
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522 | 701 | |
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523 | 702 | /* need to apply patch? */ |
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524 | | - if (rev >= mc_amd->hdr.patch_id) { |
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| 703 | + if (rev > mc_amd->hdr.patch_id) { |
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525 | 704 | ret = UCODE_OK; |
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526 | 705 | goto out; |
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527 | 706 | } |
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.. | .. |
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548 | 727 | return ret; |
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549 | 728 | } |
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550 | 729 | |
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551 | | -static int install_equiv_cpu_table(const u8 *buf) |
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| 730 | +static size_t install_equiv_cpu_table(const u8 *buf, size_t buf_size) |
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552 | 731 | { |
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553 | | - unsigned int *ibuf = (unsigned int *)buf; |
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554 | | - unsigned int type = ibuf[1]; |
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555 | | - unsigned int size = ibuf[2]; |
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| 732 | + u32 equiv_tbl_len; |
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| 733 | + const u32 *hdr; |
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556 | 734 | |
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557 | | - if (type != UCODE_EQUIV_CPU_TABLE_TYPE || !size) { |
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558 | | - pr_err("empty section/" |
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559 | | - "invalid type field in container file section header\n"); |
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560 | | - return -EINVAL; |
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561 | | - } |
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| 735 | + if (!verify_equivalence_table(buf, buf_size, false)) |
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| 736 | + return 0; |
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562 | 737 | |
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563 | | - equiv_cpu_table = vmalloc(size); |
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564 | | - if (!equiv_cpu_table) { |
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| 738 | + hdr = (const u32 *)buf; |
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| 739 | + equiv_tbl_len = hdr[2]; |
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| 740 | + |
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| 741 | + equiv_table.entry = vmalloc(equiv_tbl_len); |
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| 742 | + if (!equiv_table.entry) { |
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565 | 743 | pr_err("failed to allocate equivalent CPU table\n"); |
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566 | | - return -ENOMEM; |
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| 744 | + return 0; |
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567 | 745 | } |
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568 | 746 | |
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569 | | - memcpy(equiv_cpu_table, buf + CONTAINER_HDR_SZ, size); |
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| 747 | + memcpy(equiv_table.entry, buf + CONTAINER_HDR_SZ, equiv_tbl_len); |
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| 748 | + equiv_table.num_entries = equiv_tbl_len / sizeof(struct equiv_cpu_entry); |
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570 | 749 | |
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571 | 750 | /* add header length */ |
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572 | | - return size + CONTAINER_HDR_SZ; |
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| 751 | + return equiv_tbl_len + CONTAINER_HDR_SZ; |
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573 | 752 | } |
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574 | 753 | |
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575 | 754 | static void free_equiv_cpu_table(void) |
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576 | 755 | { |
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577 | | - vfree(equiv_cpu_table); |
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578 | | - equiv_cpu_table = NULL; |
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| 756 | + vfree(equiv_table.entry); |
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| 757 | + memset(&equiv_table, 0, sizeof(equiv_table)); |
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579 | 758 | } |
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580 | 759 | |
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581 | 760 | static void cleanup(void) |
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.. | .. |
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585 | 764 | } |
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586 | 765 | |
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587 | 766 | /* |
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588 | | - * We return the current size even if some of the checks failed so that |
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| 767 | + * Return a non-negative value even if some of the checks failed so that |
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589 | 768 | * we can skip over the next patch. If we return a negative value, we |
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590 | 769 | * signal a grave error like a memory allocation has failed and the |
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591 | 770 | * driver cannot continue functioning normally. In such cases, we tear |
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592 | 771 | * down everything we've used up so far and exit. |
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593 | 772 | */ |
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594 | | -static int verify_and_add_patch(u8 family, u8 *fw, unsigned int leftover) |
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| 773 | +static int verify_and_add_patch(u8 family, u8 *fw, unsigned int leftover, |
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| 774 | + unsigned int *patch_size) |
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595 | 775 | { |
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596 | 776 | struct microcode_header_amd *mc_hdr; |
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597 | 777 | struct ucode_patch *patch; |
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598 | | - unsigned int patch_size, crnt_size, ret; |
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599 | | - u32 proc_fam; |
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600 | 778 | u16 proc_id; |
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| 779 | + int ret; |
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601 | 780 | |
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602 | | - patch_size = *(u32 *)(fw + 4); |
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603 | | - crnt_size = patch_size + SECTION_HDR_SIZE; |
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604 | | - mc_hdr = (struct microcode_header_amd *)(fw + SECTION_HDR_SIZE); |
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605 | | - proc_id = mc_hdr->processor_rev_id; |
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606 | | - |
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607 | | - proc_fam = find_cpu_family_by_equiv_cpu(proc_id); |
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608 | | - if (!proc_fam) { |
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609 | | - pr_err("No patch family for equiv ID: 0x%04x\n", proc_id); |
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610 | | - return crnt_size; |
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611 | | - } |
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612 | | - |
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613 | | - /* check if patch is for the current family */ |
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614 | | - proc_fam = ((proc_fam >> 8) & 0xf) + ((proc_fam >> 20) & 0xff); |
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615 | | - if (proc_fam != family) |
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616 | | - return crnt_size; |
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617 | | - |
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618 | | - if (mc_hdr->nb_dev_id || mc_hdr->sb_dev_id) { |
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619 | | - pr_err("Patch-ID 0x%08x: chipset-specific code unsupported.\n", |
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620 | | - mc_hdr->patch_id); |
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621 | | - return crnt_size; |
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622 | | - } |
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623 | | - |
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624 | | - ret = verify_patch_size(family, patch_size, leftover); |
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625 | | - if (!ret) { |
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626 | | - pr_err("Patch-ID 0x%08x: size mismatch.\n", mc_hdr->patch_id); |
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627 | | - return crnt_size; |
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628 | | - } |
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| 781 | + ret = verify_patch(family, fw, leftover, patch_size, false); |
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| 782 | + if (ret) |
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| 783 | + return ret; |
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629 | 784 | |
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630 | 785 | patch = kzalloc(sizeof(*patch), GFP_KERNEL); |
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631 | 786 | if (!patch) { |
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.. | .. |
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633 | 788 | return -EINVAL; |
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634 | 789 | } |
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635 | 790 | |
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636 | | - patch->data = kmemdup(fw + SECTION_HDR_SIZE, patch_size, GFP_KERNEL); |
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| 791 | + patch->data = kmemdup(fw + SECTION_HDR_SIZE, *patch_size, GFP_KERNEL); |
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637 | 792 | if (!patch->data) { |
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638 | 793 | pr_err("Patch data allocation failure.\n"); |
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639 | 794 | kfree(patch); |
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640 | 795 | return -EINVAL; |
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641 | 796 | } |
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| 797 | + patch->size = *patch_size; |
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| 798 | + |
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| 799 | + mc_hdr = (struct microcode_header_amd *)(fw + SECTION_HDR_SIZE); |
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| 800 | + proc_id = mc_hdr->processor_rev_id; |
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642 | 801 | |
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643 | 802 | INIT_LIST_HEAD(&patch->plist); |
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644 | 803 | patch->patch_id = mc_hdr->patch_id; |
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.. | .. |
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650 | 809 | /* ... and add to cache. */ |
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651 | 810 | update_cache(patch); |
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652 | 811 | |
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653 | | - return crnt_size; |
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| 812 | + return 0; |
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654 | 813 | } |
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655 | 814 | |
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656 | 815 | static enum ucode_state __load_microcode_amd(u8 family, const u8 *data, |
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657 | 816 | size_t size) |
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658 | 817 | { |
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659 | | - enum ucode_state ret = UCODE_ERROR; |
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660 | | - unsigned int leftover; |
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661 | 818 | u8 *fw = (u8 *)data; |
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662 | | - int crnt_size = 0; |
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663 | | - int offset; |
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| 819 | + size_t offset; |
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664 | 820 | |
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665 | | - offset = install_equiv_cpu_table(data); |
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666 | | - if (offset < 0) { |
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667 | | - pr_err("failed to create equivalent cpu table\n"); |
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668 | | - return ret; |
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669 | | - } |
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670 | | - fw += offset; |
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671 | | - leftover = size - offset; |
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| 821 | + offset = install_equiv_cpu_table(data, size); |
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| 822 | + if (!offset) |
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| 823 | + return UCODE_ERROR; |
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| 824 | + |
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| 825 | + fw += offset; |
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| 826 | + size -= offset; |
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672 | 827 | |
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673 | 828 | if (*(u32 *)fw != UCODE_UCODE_TYPE) { |
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674 | 829 | pr_err("invalid type field in container file section header\n"); |
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675 | 830 | free_equiv_cpu_table(); |
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676 | | - return ret; |
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| 831 | + return UCODE_ERROR; |
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677 | 832 | } |
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678 | 833 | |
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679 | | - while (leftover) { |
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680 | | - crnt_size = verify_and_add_patch(family, fw, leftover); |
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681 | | - if (crnt_size < 0) |
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682 | | - return ret; |
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| 834 | + while (size > 0) { |
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| 835 | + unsigned int crnt_size = 0; |
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| 836 | + int ret; |
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683 | 837 | |
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684 | | - fw += crnt_size; |
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685 | | - leftover -= crnt_size; |
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| 838 | + ret = verify_and_add_patch(family, fw, size, &crnt_size); |
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| 839 | + if (ret < 0) |
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| 840 | + return UCODE_ERROR; |
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| 841 | + |
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| 842 | + fw += crnt_size + SECTION_HDR_SIZE; |
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| 843 | + size -= (crnt_size + SECTION_HDR_SIZE); |
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686 | 844 | } |
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687 | 845 | |
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688 | 846 | return UCODE_OK; |
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689 | 847 | } |
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690 | 848 | |
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691 | | -static enum ucode_state |
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692 | | -load_microcode_amd(bool save, u8 family, const u8 *data, size_t size) |
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| 849 | +static enum ucode_state load_microcode_amd(u8 family, const u8 *data, size_t size) |
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693 | 850 | { |
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| 851 | + struct cpuinfo_x86 *c; |
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| 852 | + unsigned int nid, cpu; |
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694 | 853 | struct ucode_patch *p; |
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695 | 854 | enum ucode_state ret; |
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696 | 855 | |
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.. | .. |
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703 | 862 | return ret; |
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704 | 863 | } |
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705 | 864 | |
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706 | | - p = find_patch(0); |
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707 | | - if (!p) { |
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708 | | - return ret; |
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709 | | - } else { |
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710 | | - if (boot_cpu_data.microcode >= p->patch_id) |
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711 | | - return ret; |
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| 865 | + for_each_node(nid) { |
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| 866 | + cpu = cpumask_first(cpumask_of_node(nid)); |
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| 867 | + c = &cpu_data(cpu); |
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| 868 | + |
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| 869 | + p = find_patch(cpu); |
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| 870 | + if (!p) |
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| 871 | + continue; |
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| 872 | + |
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| 873 | + if (c->microcode >= p->patch_id) |
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| 874 | + continue; |
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712 | 875 | |
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713 | 876 | ret = UCODE_NEW; |
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| 877 | + |
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| 878 | + memset(&amd_ucode_patch[nid], 0, PATCH_MAX_SIZE); |
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| 879 | + memcpy(&amd_ucode_patch[nid], p->data, min_t(u32, p->size, PATCH_MAX_SIZE)); |
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714 | 880 | } |
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715 | | - |
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716 | | - /* save BSP's matching patch for early load */ |
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717 | | - if (!save) |
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718 | | - return ret; |
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719 | | - |
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720 | | - memset(amd_ucode_patch, 0, PATCH_MAX_SIZE); |
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721 | | - memcpy(amd_ucode_patch, p->data, min_t(u32, ksize(p->data), PATCH_MAX_SIZE)); |
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722 | 881 | |
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723 | 882 | return ret; |
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724 | 883 | } |
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.. | .. |
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744 | 903 | { |
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745 | 904 | char fw_name[36] = "amd-ucode/microcode_amd.bin"; |
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746 | 905 | struct cpuinfo_x86 *c = &cpu_data(cpu); |
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747 | | - bool bsp = c->cpu_index == boot_cpu_data.cpu_index; |
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748 | 906 | enum ucode_state ret = UCODE_NFOUND; |
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749 | 907 | const struct firmware *fw; |
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750 | 908 | |
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751 | 909 | /* reload ucode container only on the boot cpu */ |
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752 | | - if (!refresh_fw || !bsp) |
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| 910 | + if (!refresh_fw) |
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753 | 911 | return UCODE_OK; |
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754 | 912 | |
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755 | 913 | if (c->x86 >= 0x15) |
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.. | .. |
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761 | 919 | } |
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762 | 920 | |
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763 | 921 | ret = UCODE_ERROR; |
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764 | | - if (*(u32 *)fw->data != UCODE_MAGIC) { |
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765 | | - pr_err("invalid magic value (0x%08x)\n", *(u32 *)fw->data); |
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| 922 | + if (!verify_container(fw->data, fw->size, false)) |
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766 | 923 | goto fw_release; |
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767 | | - } |
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768 | 924 | |
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769 | | - ret = load_microcode_amd(bsp, c->x86, fw->data, fw->size); |
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| 925 | + ret = load_microcode_amd(c->x86, fw->data, fw->size); |
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770 | 926 | |
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771 | 927 | fw_release: |
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772 | 928 | release_firmware(fw); |
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