.. | .. |
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8 | 8 | #include <linux/err.h> |
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9 | 9 | #include <linux/io.h> |
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10 | 10 | #include <linux/delay.h> |
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| 11 | +#include <linux/usb/otg.h> |
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11 | 12 | |
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12 | 13 | #include "ci_hdrc_imx.h" |
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13 | 14 | |
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.. | .. |
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63 | 64 | #define MX6_BM_NON_BURST_SETTING BIT(1) |
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64 | 65 | #define MX6_BM_OVER_CUR_DIS BIT(7) |
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65 | 66 | #define MX6_BM_OVER_CUR_POLARITY BIT(8) |
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| 67 | +#define MX6_BM_PWR_POLARITY BIT(9) |
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66 | 68 | #define MX6_BM_WAKEUP_ENABLE BIT(10) |
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| 69 | +#define MX6_BM_UTMI_ON_CLOCK BIT(13) |
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67 | 70 | #define MX6_BM_ID_WAKEUP BIT(16) |
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68 | 71 | #define MX6_BM_VBUS_WAKEUP BIT(17) |
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69 | 72 | #define MX6SX_BM_DPDM_WAKEUP_EN BIT(29) |
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70 | 73 | #define MX6_BM_WAKEUP_INTR BIT(31) |
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| 74 | + |
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| 75 | +#define MX6_USB_HSIC_CTRL_OFFSET 0x10 |
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| 76 | +/* Send resume signal without 480Mhz PHY clock */ |
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| 77 | +#define MX6SX_BM_HSIC_AUTO_RESUME BIT(23) |
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| 78 | +/* set before portsc.suspendM = 1 */ |
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| 79 | +#define MX6_BM_HSIC_DEV_CONN BIT(21) |
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| 80 | +/* HSIC enable */ |
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| 81 | +#define MX6_BM_HSIC_EN BIT(12) |
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| 82 | +/* Force HSIC module 480M clock on, even when in Host is in suspend mode */ |
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| 83 | +#define MX6_BM_HSIC_CLK_ON BIT(11) |
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| 84 | + |
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71 | 85 | #define MX6_USB_OTG1_PHY_CTRL 0x18 |
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72 | 86 | /* For imx6dql, it is host-only controller, for later imx6, it is otg's */ |
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73 | 87 | #define MX6_USB_OTG2_PHY_CTRL 0x1c |
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.. | .. |
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86 | 100 | #define MX7D_USB_VBUS_WAKEUP_SOURCE_AVALID MX7D_USB_VBUS_WAKEUP_SOURCE(1) |
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87 | 101 | #define MX7D_USB_VBUS_WAKEUP_SOURCE_BVALID MX7D_USB_VBUS_WAKEUP_SOURCE(2) |
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88 | 102 | #define MX7D_USB_VBUS_WAKEUP_SOURCE_SESS_END MX7D_USB_VBUS_WAKEUP_SOURCE(3) |
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| 103 | +#define MX7D_USBNC_AUTO_RESUME BIT(2) |
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| 104 | +/* The default DM/DP value is pull-down */ |
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| 105 | +#define MX7D_USBNC_USB_CTRL2_OPMODE(v) (v << 6) |
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| 106 | +#define MX7D_USBNC_USB_CTRL2_OPMODE_NON_DRIVING MX7D_USBNC_USB_CTRL2_OPMODE(1) |
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| 107 | +#define MX7D_USBNC_USB_CTRL2_OPMODE_OVERRIDE_MASK (BIT(7) | BIT(6)) |
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| 108 | +#define MX7D_USBNC_USB_CTRL2_OPMODE_OVERRIDE_EN BIT(8) |
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| 109 | +#define MX7D_USBNC_USB_CTRL2_DP_OVERRIDE_VAL BIT(12) |
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| 110 | +#define MX7D_USBNC_USB_CTRL2_DP_OVERRIDE_EN BIT(13) |
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| 111 | +#define MX7D_USBNC_USB_CTRL2_DM_OVERRIDE_VAL BIT(14) |
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| 112 | +#define MX7D_USBNC_USB_CTRL2_DM_OVERRIDE_EN BIT(15) |
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| 113 | +#define MX7D_USBNC_USB_CTRL2_DP_DM_MASK (BIT(12) | BIT(13) | \ |
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| 114 | + BIT(14) | BIT(15)) |
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| 115 | + |
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| 116 | +#define MX7D_USB_OTG_PHY_CFG1 0x30 |
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| 117 | +#define MX7D_USB_OTG_PHY_CFG2_CHRG_CHRGSEL BIT(0) |
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| 118 | +#define MX7D_USB_OTG_PHY_CFG2_CHRG_VDATDETENB0 BIT(1) |
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| 119 | +#define MX7D_USB_OTG_PHY_CFG2_CHRG_VDATSRCENB0 BIT(2) |
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| 120 | +#define MX7D_USB_OTG_PHY_CFG2_CHRG_DCDENB BIT(3) |
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| 121 | +#define MX7D_USB_OTG_PHY_CFG2_DRVVBUS0 BIT(16) |
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| 122 | + |
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| 123 | +#define MX7D_USB_OTG_PHY_CFG2 0x34 |
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| 124 | + |
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| 125 | +#define MX7D_USB_OTG_PHY_STATUS 0x3c |
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| 126 | +#define MX7D_USB_OTG_PHY_STATUS_LINE_STATE0 BIT(0) |
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| 127 | +#define MX7D_USB_OTG_PHY_STATUS_LINE_STATE1 BIT(1) |
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| 128 | +#define MX7D_USB_OTG_PHY_STATUS_VBUS_VLD BIT(3) |
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| 129 | +#define MX7D_USB_OTG_PHY_STATUS_CHRGDET BIT(29) |
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| 130 | + |
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| 131 | +#define MX7D_USB_OTG_PHY_CFG1 0x30 |
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| 132 | +#define TXPREEMPAMPTUNE0_BIT 28 |
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| 133 | +#define TXPREEMPAMPTUNE0_MASK (3 << 28) |
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| 134 | +#define TXVREFTUNE0_BIT 20 |
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| 135 | +#define TXVREFTUNE0_MASK (0xf << 20) |
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| 136 | + |
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| 137 | +#define MX6_USB_OTG_WAKEUP_BITS (MX6_BM_WAKEUP_ENABLE | MX6_BM_VBUS_WAKEUP | \ |
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| 138 | + MX6_BM_ID_WAKEUP | MX6SX_BM_DPDM_WAKEUP_EN) |
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89 | 139 | |
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90 | 140 | struct usbmisc_ops { |
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91 | 141 | /* It's called once when probe a usb device */ |
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.. | .. |
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94 | 144 | int (*post)(struct imx_usbmisc_data *data); |
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95 | 145 | /* It's called when we need to enable/disable usb wakeup */ |
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96 | 146 | int (*set_wakeup)(struct imx_usbmisc_data *data, bool enabled); |
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| 147 | + /* It's called before setting portsc.suspendM */ |
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| 148 | + int (*hsic_set_connect)(struct imx_usbmisc_data *data); |
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| 149 | + /* It's called during suspend/resume */ |
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| 150 | + int (*hsic_set_clk)(struct imx_usbmisc_data *data, bool enabled); |
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| 151 | + /* usb charger detection */ |
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| 152 | + int (*charger_detection)(struct imx_usbmisc_data *data); |
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97 | 153 | }; |
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98 | 154 | |
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99 | 155 | struct imx_usbmisc { |
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.. | .. |
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120 | 176 | val &= ~(MX25_OTG_SIC_MASK | MX25_OTG_PP_BIT); |
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121 | 177 | val |= (MX25_EHCI_INTERFACE_DIFF_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_OTG_SIC_SHIFT; |
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122 | 178 | val |= (MX25_OTG_PM_BIT | MX25_OTG_OCPOL_BIT); |
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| 179 | + |
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| 180 | + /* |
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| 181 | + * If the polarity is not configured assume active high for |
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| 182 | + * historical reasons. |
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| 183 | + */ |
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| 184 | + if (data->oc_pol_configured && data->oc_pol_active_low) |
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| 185 | + val &= ~MX25_OTG_OCPOL_BIT; |
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| 186 | + |
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123 | 187 | writel(val, usbmisc->base); |
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124 | 188 | break; |
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125 | 189 | case 1: |
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.. | .. |
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128 | 192 | val |= (MX25_EHCI_INTERFACE_SINGLE_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_H1_SIC_SHIFT; |
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129 | 193 | val |= (MX25_H1_PM_BIT | MX25_H1_OCPOL_BIT | MX25_H1_TLL_BIT | |
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130 | 194 | MX25_H1_USBTE_BIT | MX25_H1_IPPUE_DOWN_BIT); |
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| 195 | + |
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| 196 | + /* |
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| 197 | + * If the polarity is not configured assume active high for |
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| 198 | + * historical reasons. |
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| 199 | + */ |
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| 200 | + if (data->oc_pol_configured && data->oc_pol_active_low) |
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| 201 | + val &= ~MX25_H1_OCPOL_BIT; |
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131 | 202 | |
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132 | 203 | writel(val, usbmisc->base); |
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133 | 204 | |
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.. | .. |
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298 | 369 | return 0; |
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299 | 370 | } |
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300 | 371 | |
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| 372 | +static u32 usbmisc_wakeup_setting(struct imx_usbmisc_data *data) |
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| 373 | +{ |
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| 374 | + u32 wakeup_setting = MX6_USB_OTG_WAKEUP_BITS; |
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| 375 | + |
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| 376 | + if (data->ext_id || data->available_role != USB_DR_MODE_OTG) |
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| 377 | + wakeup_setting &= ~MX6_BM_ID_WAKEUP; |
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| 378 | + |
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| 379 | + if (data->ext_vbus || data->available_role == USB_DR_MODE_HOST) |
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| 380 | + wakeup_setting &= ~MX6_BM_VBUS_WAKEUP; |
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| 381 | + |
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| 382 | + return wakeup_setting; |
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| 383 | +} |
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| 384 | + |
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301 | 385 | static int usbmisc_imx6q_set_wakeup |
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302 | 386 | (struct imx_usbmisc_data *data, bool enabled) |
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303 | 387 | { |
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304 | 388 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
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305 | 389 | unsigned long flags; |
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306 | 390 | u32 val; |
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307 | | - u32 wakeup_setting = (MX6_BM_WAKEUP_ENABLE | |
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308 | | - MX6_BM_VBUS_WAKEUP | MX6_BM_ID_WAKEUP); |
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309 | 391 | int ret = 0; |
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310 | 392 | |
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311 | 393 | if (data->index > 3) |
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.. | .. |
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314 | 396 | spin_lock_irqsave(&usbmisc->lock, flags); |
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315 | 397 | val = readl(usbmisc->base + data->index * 4); |
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316 | 398 | if (enabled) { |
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317 | | - val |= wakeup_setting; |
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| 399 | + val &= ~MX6_USB_OTG_WAKEUP_BITS; |
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| 400 | + val |= usbmisc_wakeup_setting(data); |
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318 | 401 | } else { |
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319 | 402 | if (val & MX6_BM_WAKEUP_INTR) |
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320 | 403 | pr_debug("wakeup int at ci_hdrc.%d\n", data->index); |
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321 | | - val &= ~wakeup_setting; |
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| 404 | + val &= ~MX6_USB_OTG_WAKEUP_BITS; |
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322 | 405 | } |
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323 | 406 | writel(val, usbmisc->base + data->index * 4); |
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324 | 407 | spin_unlock_irqrestore(&usbmisc->lock, flags); |
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.. | .. |
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340 | 423 | reg = readl(usbmisc->base + data->index * 4); |
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341 | 424 | if (data->disable_oc) { |
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342 | 425 | reg |= MX6_BM_OVER_CUR_DIS; |
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343 | | - } else if (data->oc_polarity == 1) { |
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344 | | - /* High active */ |
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345 | | - reg &= ~(MX6_BM_OVER_CUR_DIS | MX6_BM_OVER_CUR_POLARITY); |
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346 | 426 | } else { |
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347 | | - reg &= ~(MX6_BM_OVER_CUR_DIS); |
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| 427 | + reg &= ~MX6_BM_OVER_CUR_DIS; |
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| 428 | + |
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| 429 | + /* |
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| 430 | + * If the polarity is not configured keep it as setup by the |
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| 431 | + * bootloader. |
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| 432 | + */ |
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| 433 | + if (data->oc_pol_configured && data->oc_pol_active_low) |
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| 434 | + reg |= MX6_BM_OVER_CUR_POLARITY; |
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| 435 | + else if (data->oc_pol_configured) |
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| 436 | + reg &= ~MX6_BM_OVER_CUR_POLARITY; |
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348 | 437 | } |
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| 438 | + /* If the polarity is not set keep it as setup by the bootlader */ |
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| 439 | + if (data->pwr_pol == 1) |
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| 440 | + reg |= MX6_BM_PWR_POLARITY; |
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349 | 441 | writel(reg, usbmisc->base + data->index * 4); |
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350 | 442 | |
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351 | 443 | /* SoC non-burst setting */ |
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.. | .. |
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353 | 445 | writel(reg | MX6_BM_NON_BURST_SETTING, |
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354 | 446 | usbmisc->base + data->index * 4); |
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355 | 447 | |
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| 448 | + /* For HSIC controller */ |
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| 449 | + if (data->hsic) { |
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| 450 | + reg = readl(usbmisc->base + data->index * 4); |
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| 451 | + writel(reg | MX6_BM_UTMI_ON_CLOCK, |
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| 452 | + usbmisc->base + data->index * 4); |
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| 453 | + reg = readl(usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET |
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| 454 | + + (data->index - 2) * 4); |
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| 455 | + reg |= MX6_BM_HSIC_EN | MX6_BM_HSIC_CLK_ON; |
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| 456 | + writel(reg, usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET |
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| 457 | + + (data->index - 2) * 4); |
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| 458 | + } |
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| 459 | + |
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356 | 460 | spin_unlock_irqrestore(&usbmisc->lock, flags); |
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357 | 461 | |
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358 | 462 | usbmisc_imx6q_set_wakeup(data, false); |
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359 | 463 | |
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360 | 464 | return 0; |
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361 | 465 | } |
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| 466 | + |
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| 467 | +static int usbmisc_imx6_hsic_get_reg_offset(struct imx_usbmisc_data *data) |
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| 468 | +{ |
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| 469 | + int offset, ret = 0; |
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| 470 | + |
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| 471 | + if (data->index == 2 || data->index == 3) { |
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| 472 | + offset = (data->index - 2) * 4; |
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| 473 | + } else if (data->index == 0) { |
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| 474 | + /* |
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| 475 | + * For SoCs like i.MX7D and later, each USB controller has |
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| 476 | + * its own non-core register region. For SoCs before i.MX7D, |
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| 477 | + * the first two USB controllers are non-HSIC controllers. |
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| 478 | + */ |
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| 479 | + offset = 0; |
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| 480 | + } else { |
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| 481 | + dev_err(data->dev, "index is error for usbmisc\n"); |
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| 482 | + ret = -EINVAL; |
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| 483 | + } |
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| 484 | + |
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| 485 | + return ret ? ret : offset; |
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| 486 | +} |
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| 487 | + |
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| 488 | +static int usbmisc_imx6_hsic_set_connect(struct imx_usbmisc_data *data) |
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| 489 | +{ |
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| 490 | + unsigned long flags; |
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| 491 | + u32 val; |
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| 492 | + struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
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| 493 | + int offset; |
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| 494 | + |
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| 495 | + spin_lock_irqsave(&usbmisc->lock, flags); |
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| 496 | + offset = usbmisc_imx6_hsic_get_reg_offset(data); |
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| 497 | + if (offset < 0) { |
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| 498 | + spin_unlock_irqrestore(&usbmisc->lock, flags); |
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| 499 | + return offset; |
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| 500 | + } |
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| 501 | + |
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| 502 | + val = readl(usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET + offset); |
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| 503 | + if (!(val & MX6_BM_HSIC_DEV_CONN)) |
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| 504 | + writel(val | MX6_BM_HSIC_DEV_CONN, |
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| 505 | + usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET + offset); |
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| 506 | + |
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| 507 | + spin_unlock_irqrestore(&usbmisc->lock, flags); |
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| 508 | + |
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| 509 | + return 0; |
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| 510 | +} |
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| 511 | + |
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| 512 | +static int usbmisc_imx6_hsic_set_clk(struct imx_usbmisc_data *data, bool on) |
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| 513 | +{ |
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| 514 | + unsigned long flags; |
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| 515 | + u32 val; |
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| 516 | + struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
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| 517 | + int offset; |
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| 518 | + |
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| 519 | + spin_lock_irqsave(&usbmisc->lock, flags); |
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| 520 | + offset = usbmisc_imx6_hsic_get_reg_offset(data); |
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| 521 | + if (offset < 0) { |
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| 522 | + spin_unlock_irqrestore(&usbmisc->lock, flags); |
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| 523 | + return offset; |
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| 524 | + } |
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| 525 | + |
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| 526 | + val = readl(usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET + offset); |
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| 527 | + val |= MX6_BM_HSIC_EN | MX6_BM_HSIC_CLK_ON; |
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| 528 | + if (on) |
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| 529 | + val |= MX6_BM_HSIC_CLK_ON; |
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| 530 | + else |
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| 531 | + val &= ~MX6_BM_HSIC_CLK_ON; |
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| 532 | + |
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| 533 | + writel(val, usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET + offset); |
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| 534 | + spin_unlock_irqrestore(&usbmisc->lock, flags); |
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| 535 | + |
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| 536 | + return 0; |
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| 537 | +} |
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| 538 | + |
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362 | 539 | |
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363 | 540 | static int usbmisc_imx6sx_init(struct imx_usbmisc_data *data) |
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364 | 541 | { |
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.. | .. |
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383 | 560 | writel(val & ~MX6SX_BM_DPDM_WAKEUP_EN, |
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384 | 561 | usbmisc->base + data->index * 4); |
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385 | 562 | spin_unlock_irqrestore(&usbmisc->lock, flags); |
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| 563 | + } |
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| 564 | + |
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| 565 | + /* For HSIC controller */ |
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| 566 | + if (data->hsic) { |
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| 567 | + val = readl(usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET); |
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| 568 | + val |= MX6SX_BM_HSIC_AUTO_RESUME; |
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| 569 | + writel(val, usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET); |
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386 | 570 | } |
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387 | 571 | |
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388 | 572 | return 0; |
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.. | .. |
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414 | 598 | struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
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415 | 599 | unsigned long flags; |
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416 | 600 | u32 val; |
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417 | | - u32 wakeup_setting = (MX6_BM_WAKEUP_ENABLE | |
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418 | | - MX6_BM_VBUS_WAKEUP | MX6_BM_ID_WAKEUP); |
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419 | 601 | |
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420 | 602 | spin_lock_irqsave(&usbmisc->lock, flags); |
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421 | 603 | val = readl(usbmisc->base); |
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422 | 604 | if (enabled) { |
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423 | | - writel(val | wakeup_setting, usbmisc->base); |
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| 605 | + val &= ~MX6_USB_OTG_WAKEUP_BITS; |
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| 606 | + val |= usbmisc_wakeup_setting(data); |
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| 607 | + writel(val, usbmisc->base); |
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424 | 608 | } else { |
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425 | 609 | if (val & MX6_BM_WAKEUP_INTR) |
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426 | 610 | dev_dbg(data->dev, "wakeup int\n"); |
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427 | | - writel(val & ~wakeup_setting, usbmisc->base); |
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| 611 | + writel(val & ~MX6_USB_OTG_WAKEUP_BITS, usbmisc->base); |
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428 | 612 | } |
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429 | 613 | spin_unlock_irqrestore(&usbmisc->lock, flags); |
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430 | 614 | |
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.. | .. |
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444 | 628 | reg = readl(usbmisc->base); |
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445 | 629 | if (data->disable_oc) { |
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446 | 630 | reg |= MX6_BM_OVER_CUR_DIS; |
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447 | | - } else if (data->oc_polarity == 1) { |
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448 | | - /* High active */ |
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449 | | - reg &= ~(MX6_BM_OVER_CUR_DIS | MX6_BM_OVER_CUR_POLARITY); |
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| 631 | + } else { |
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| 632 | + reg &= ~MX6_BM_OVER_CUR_DIS; |
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| 633 | + |
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| 634 | + /* |
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| 635 | + * If the polarity is not configured keep it as setup by the |
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| 636 | + * bootloader. |
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| 637 | + */ |
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| 638 | + if (data->oc_pol_configured && data->oc_pol_active_low) |
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| 639 | + reg |= MX6_BM_OVER_CUR_POLARITY; |
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| 640 | + else if (data->oc_pol_configured) |
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| 641 | + reg &= ~MX6_BM_OVER_CUR_POLARITY; |
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450 | 642 | } |
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| 643 | + /* If the polarity is not set keep it as setup by the bootlader */ |
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| 644 | + if (data->pwr_pol == 1) |
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| 645 | + reg |= MX6_BM_PWR_POLARITY; |
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451 | 646 | writel(reg, usbmisc->base); |
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452 | 647 | |
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453 | | - reg = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2); |
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454 | | - reg &= ~MX7D_USB_VBUS_WAKEUP_SOURCE_MASK; |
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455 | | - writel(reg | MX7D_USB_VBUS_WAKEUP_SOURCE_BVALID, |
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456 | | - usbmisc->base + MX7D_USBNC_USB_CTRL2); |
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| 648 | + /* SoC non-burst setting */ |
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| 649 | + reg = readl(usbmisc->base); |
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| 650 | + writel(reg | MX6_BM_NON_BURST_SETTING, usbmisc->base); |
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| 651 | + |
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| 652 | + if (!data->hsic) { |
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| 653 | + reg = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2); |
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| 654 | + reg &= ~MX7D_USB_VBUS_WAKEUP_SOURCE_MASK; |
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| 655 | + writel(reg | MX7D_USB_VBUS_WAKEUP_SOURCE_BVALID |
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| 656 | + | MX7D_USBNC_AUTO_RESUME, |
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| 657 | + usbmisc->base + MX7D_USBNC_USB_CTRL2); |
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| 658 | + /* PHY tuning for signal quality */ |
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| 659 | + reg = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG1); |
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| 660 | + if (data->emp_curr_control >= 0 && |
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| 661 | + data->emp_curr_control <= |
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| 662 | + (TXPREEMPAMPTUNE0_MASK >> TXPREEMPAMPTUNE0_BIT)) { |
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| 663 | + reg &= ~TXPREEMPAMPTUNE0_MASK; |
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| 664 | + reg |= (data->emp_curr_control << TXPREEMPAMPTUNE0_BIT); |
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| 665 | + } |
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| 666 | + |
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| 667 | + if (data->dc_vol_level_adjust >= 0 && |
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| 668 | + data->dc_vol_level_adjust <= |
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| 669 | + (TXVREFTUNE0_MASK >> TXVREFTUNE0_BIT)) { |
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| 670 | + reg &= ~TXVREFTUNE0_MASK; |
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| 671 | + reg |= (data->dc_vol_level_adjust << TXVREFTUNE0_BIT); |
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| 672 | + } |
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| 673 | + |
---|
| 674 | + writel(reg, usbmisc->base + MX7D_USB_OTG_PHY_CFG1); |
---|
| 675 | + } |
---|
| 676 | + |
---|
| 677 | + spin_unlock_irqrestore(&usbmisc->lock, flags); |
---|
| 678 | + |
---|
| 679 | + usbmisc_imx7d_set_wakeup(data, false); |
---|
| 680 | + |
---|
| 681 | + return 0; |
---|
| 682 | +} |
---|
| 683 | + |
---|
| 684 | +static int imx7d_charger_secondary_detection(struct imx_usbmisc_data *data) |
---|
| 685 | +{ |
---|
| 686 | + struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
---|
| 687 | + struct usb_phy *usb_phy = data->usb_phy; |
---|
| 688 | + int val; |
---|
| 689 | + unsigned long flags; |
---|
| 690 | + |
---|
| 691 | + /* Clear VDATSRCENB0 to disable VDP_SRC and IDM_SNK required by BC 1.2 spec */ |
---|
| 692 | + spin_lock_irqsave(&usbmisc->lock, flags); |
---|
| 693 | + val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2); |
---|
| 694 | + val &= ~MX7D_USB_OTG_PHY_CFG2_CHRG_VDATSRCENB0; |
---|
| 695 | + writel(val, usbmisc->base + MX7D_USB_OTG_PHY_CFG2); |
---|
| 696 | + spin_unlock_irqrestore(&usbmisc->lock, flags); |
---|
| 697 | + |
---|
| 698 | + /* TVDMSRC_DIS */ |
---|
| 699 | + msleep(20); |
---|
| 700 | + |
---|
| 701 | + /* VDM_SRC is connected to D- and IDP_SINK is connected to D+ */ |
---|
| 702 | + spin_lock_irqsave(&usbmisc->lock, flags); |
---|
| 703 | + val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2); |
---|
| 704 | + writel(val | MX7D_USB_OTG_PHY_CFG2_CHRG_VDATSRCENB0 | |
---|
| 705 | + MX7D_USB_OTG_PHY_CFG2_CHRG_VDATDETENB0 | |
---|
| 706 | + MX7D_USB_OTG_PHY_CFG2_CHRG_CHRGSEL, |
---|
| 707 | + usbmisc->base + MX7D_USB_OTG_PHY_CFG2); |
---|
| 708 | + spin_unlock_irqrestore(&usbmisc->lock, flags); |
---|
| 709 | + |
---|
| 710 | + /* TVDMSRC_ON */ |
---|
| 711 | + msleep(40); |
---|
| 712 | + |
---|
| 713 | + /* |
---|
| 714 | + * Per BC 1.2, check voltage of D+: |
---|
| 715 | + * DCP: if greater than VDAT_REF; |
---|
| 716 | + * CDP: if less than VDAT_REF. |
---|
| 717 | + */ |
---|
| 718 | + val = readl(usbmisc->base + MX7D_USB_OTG_PHY_STATUS); |
---|
| 719 | + if (val & MX7D_USB_OTG_PHY_STATUS_CHRGDET) { |
---|
| 720 | + dev_dbg(data->dev, "It is a dedicate charging port\n"); |
---|
| 721 | + usb_phy->chg_type = DCP_TYPE; |
---|
| 722 | + } else { |
---|
| 723 | + dev_dbg(data->dev, "It is a charging downstream port\n"); |
---|
| 724 | + usb_phy->chg_type = CDP_TYPE; |
---|
| 725 | + } |
---|
| 726 | + |
---|
| 727 | + return 0; |
---|
| 728 | +} |
---|
| 729 | + |
---|
| 730 | +static void imx7_disable_charger_detector(struct imx_usbmisc_data *data) |
---|
| 731 | +{ |
---|
| 732 | + struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
---|
| 733 | + unsigned long flags; |
---|
| 734 | + u32 val; |
---|
| 735 | + |
---|
| 736 | + spin_lock_irqsave(&usbmisc->lock, flags); |
---|
| 737 | + val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2); |
---|
| 738 | + val &= ~(MX7D_USB_OTG_PHY_CFG2_CHRG_DCDENB | |
---|
| 739 | + MX7D_USB_OTG_PHY_CFG2_CHRG_VDATSRCENB0 | |
---|
| 740 | + MX7D_USB_OTG_PHY_CFG2_CHRG_VDATDETENB0 | |
---|
| 741 | + MX7D_USB_OTG_PHY_CFG2_CHRG_CHRGSEL); |
---|
| 742 | + writel(val, usbmisc->base + MX7D_USB_OTG_PHY_CFG2); |
---|
| 743 | + |
---|
| 744 | + /* Set OPMODE to be 2'b00 and disable its override */ |
---|
| 745 | + val = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2); |
---|
| 746 | + val &= ~MX7D_USBNC_USB_CTRL2_OPMODE_OVERRIDE_MASK; |
---|
| 747 | + writel(val, usbmisc->base + MX7D_USBNC_USB_CTRL2); |
---|
| 748 | + |
---|
| 749 | + val = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2); |
---|
| 750 | + writel(val & ~MX7D_USBNC_USB_CTRL2_OPMODE_OVERRIDE_EN, |
---|
| 751 | + usbmisc->base + MX7D_USBNC_USB_CTRL2); |
---|
| 752 | + spin_unlock_irqrestore(&usbmisc->lock, flags); |
---|
| 753 | +} |
---|
| 754 | + |
---|
| 755 | +static int imx7d_charger_data_contact_detect(struct imx_usbmisc_data *data) |
---|
| 756 | +{ |
---|
| 757 | + struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
---|
| 758 | + unsigned long flags; |
---|
| 759 | + u32 val; |
---|
| 760 | + int i, data_pin_contact_count = 0; |
---|
| 761 | + |
---|
| 762 | + /* Enable Data Contact Detect (DCD) per the USB BC 1.2 */ |
---|
| 763 | + spin_lock_irqsave(&usbmisc->lock, flags); |
---|
| 764 | + val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2); |
---|
| 765 | + writel(val | MX7D_USB_OTG_PHY_CFG2_CHRG_DCDENB, |
---|
| 766 | + usbmisc->base + MX7D_USB_OTG_PHY_CFG2); |
---|
| 767 | + spin_unlock_irqrestore(&usbmisc->lock, flags); |
---|
| 768 | + |
---|
| 769 | + for (i = 0; i < 100; i = i + 1) { |
---|
| 770 | + val = readl(usbmisc->base + MX7D_USB_OTG_PHY_STATUS); |
---|
| 771 | + if (!(val & MX7D_USB_OTG_PHY_STATUS_LINE_STATE0)) { |
---|
| 772 | + if (data_pin_contact_count++ > 5) |
---|
| 773 | + /* Data pin makes contact */ |
---|
| 774 | + break; |
---|
| 775 | + usleep_range(5000, 10000); |
---|
| 776 | + } else { |
---|
| 777 | + data_pin_contact_count = 0; |
---|
| 778 | + usleep_range(5000, 6000); |
---|
| 779 | + } |
---|
| 780 | + } |
---|
| 781 | + |
---|
| 782 | + /* Disable DCD after finished data contact check */ |
---|
| 783 | + spin_lock_irqsave(&usbmisc->lock, flags); |
---|
| 784 | + val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2); |
---|
| 785 | + writel(val & ~MX7D_USB_OTG_PHY_CFG2_CHRG_DCDENB, |
---|
| 786 | + usbmisc->base + MX7D_USB_OTG_PHY_CFG2); |
---|
| 787 | + spin_unlock_irqrestore(&usbmisc->lock, flags); |
---|
| 788 | + |
---|
| 789 | + if (i == 100) { |
---|
| 790 | + dev_err(data->dev, |
---|
| 791 | + "VBUS is coming from a dedicated power supply.\n"); |
---|
| 792 | + return -ENXIO; |
---|
| 793 | + } |
---|
| 794 | + |
---|
| 795 | + return 0; |
---|
| 796 | +} |
---|
| 797 | + |
---|
| 798 | +static int imx7d_charger_primary_detection(struct imx_usbmisc_data *data) |
---|
| 799 | +{ |
---|
| 800 | + struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
---|
| 801 | + struct usb_phy *usb_phy = data->usb_phy; |
---|
| 802 | + unsigned long flags; |
---|
| 803 | + u32 val; |
---|
| 804 | + |
---|
| 805 | + /* VDP_SRC is connected to D+ and IDM_SINK is connected to D- */ |
---|
| 806 | + spin_lock_irqsave(&usbmisc->lock, flags); |
---|
| 807 | + val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2); |
---|
| 808 | + val &= ~MX7D_USB_OTG_PHY_CFG2_CHRG_CHRGSEL; |
---|
| 809 | + writel(val | MX7D_USB_OTG_PHY_CFG2_CHRG_VDATSRCENB0 | |
---|
| 810 | + MX7D_USB_OTG_PHY_CFG2_CHRG_VDATDETENB0, |
---|
| 811 | + usbmisc->base + MX7D_USB_OTG_PHY_CFG2); |
---|
| 812 | + spin_unlock_irqrestore(&usbmisc->lock, flags); |
---|
| 813 | + |
---|
| 814 | + /* TVDPSRC_ON */ |
---|
| 815 | + msleep(40); |
---|
| 816 | + |
---|
| 817 | + /* Check if D- is less than VDAT_REF to determine an SDP per BC 1.2 */ |
---|
| 818 | + val = readl(usbmisc->base + MX7D_USB_OTG_PHY_STATUS); |
---|
| 819 | + if (!(val & MX7D_USB_OTG_PHY_STATUS_CHRGDET)) { |
---|
| 820 | + dev_dbg(data->dev, "It is a standard downstream port\n"); |
---|
| 821 | + usb_phy->chg_type = SDP_TYPE; |
---|
| 822 | + } |
---|
| 823 | + |
---|
| 824 | + return 0; |
---|
| 825 | +} |
---|
| 826 | + |
---|
| 827 | +/* |
---|
| 828 | + * Whole charger detection process: |
---|
| 829 | + * 1. OPMODE override to be non-driving |
---|
| 830 | + * 2. Data contact check |
---|
| 831 | + * 3. Primary detection |
---|
| 832 | + * 4. Secondary detection |
---|
| 833 | + * 5. Disable charger detection |
---|
| 834 | + */ |
---|
| 835 | +static int imx7d_charger_detection(struct imx_usbmisc_data *data) |
---|
| 836 | +{ |
---|
| 837 | + struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
---|
| 838 | + struct usb_phy *usb_phy = data->usb_phy; |
---|
| 839 | + unsigned long flags; |
---|
| 840 | + u32 val; |
---|
| 841 | + int ret; |
---|
| 842 | + |
---|
| 843 | + /* Check if vbus is valid */ |
---|
| 844 | + val = readl(usbmisc->base + MX7D_USB_OTG_PHY_STATUS); |
---|
| 845 | + if (!(val & MX7D_USB_OTG_PHY_STATUS_VBUS_VLD)) { |
---|
| 846 | + dev_err(data->dev, "vbus is error\n"); |
---|
| 847 | + return -EINVAL; |
---|
| 848 | + } |
---|
| 849 | + |
---|
| 850 | + /* |
---|
| 851 | + * Keep OPMODE to be non-driving mode during the whole |
---|
| 852 | + * charger detection process. |
---|
| 853 | + */ |
---|
| 854 | + spin_lock_irqsave(&usbmisc->lock, flags); |
---|
| 855 | + val = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2); |
---|
| 856 | + val &= ~MX7D_USBNC_USB_CTRL2_OPMODE_OVERRIDE_MASK; |
---|
| 857 | + val |= MX7D_USBNC_USB_CTRL2_OPMODE_NON_DRIVING; |
---|
| 858 | + writel(val, usbmisc->base + MX7D_USBNC_USB_CTRL2); |
---|
| 859 | + |
---|
| 860 | + val = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2); |
---|
| 861 | + writel(val | MX7D_USBNC_USB_CTRL2_OPMODE_OVERRIDE_EN, |
---|
| 862 | + usbmisc->base + MX7D_USBNC_USB_CTRL2); |
---|
| 863 | + spin_unlock_irqrestore(&usbmisc->lock, flags); |
---|
| 864 | + |
---|
| 865 | + ret = imx7d_charger_data_contact_detect(data); |
---|
| 866 | + if (ret) |
---|
| 867 | + return ret; |
---|
| 868 | + |
---|
| 869 | + ret = imx7d_charger_primary_detection(data); |
---|
| 870 | + if (!ret && usb_phy->chg_type != SDP_TYPE) |
---|
| 871 | + ret = imx7d_charger_secondary_detection(data); |
---|
| 872 | + |
---|
| 873 | + imx7_disable_charger_detector(data); |
---|
| 874 | + |
---|
| 875 | + return ret; |
---|
| 876 | +} |
---|
| 877 | + |
---|
| 878 | +static int usbmisc_imx7ulp_init(struct imx_usbmisc_data *data) |
---|
| 879 | +{ |
---|
| 880 | + struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); |
---|
| 881 | + unsigned long flags; |
---|
| 882 | + u32 reg; |
---|
| 883 | + |
---|
| 884 | + if (data->index >= 1) |
---|
| 885 | + return -EINVAL; |
---|
| 886 | + |
---|
| 887 | + spin_lock_irqsave(&usbmisc->lock, flags); |
---|
| 888 | + reg = readl(usbmisc->base); |
---|
| 889 | + if (data->disable_oc) { |
---|
| 890 | + reg |= MX6_BM_OVER_CUR_DIS; |
---|
| 891 | + } else { |
---|
| 892 | + reg &= ~MX6_BM_OVER_CUR_DIS; |
---|
| 893 | + |
---|
| 894 | + /* |
---|
| 895 | + * If the polarity is not configured keep it as setup by the |
---|
| 896 | + * bootloader. |
---|
| 897 | + */ |
---|
| 898 | + if (data->oc_pol_configured && data->oc_pol_active_low) |
---|
| 899 | + reg |= MX6_BM_OVER_CUR_POLARITY; |
---|
| 900 | + else if (data->oc_pol_configured) |
---|
| 901 | + reg &= ~MX6_BM_OVER_CUR_POLARITY; |
---|
| 902 | + } |
---|
| 903 | + /* If the polarity is not set keep it as setup by the bootlader */ |
---|
| 904 | + if (data->pwr_pol == 1) |
---|
| 905 | + reg |= MX6_BM_PWR_POLARITY; |
---|
| 906 | + |
---|
| 907 | + writel(reg, usbmisc->base); |
---|
| 908 | + |
---|
| 909 | + /* SoC non-burst setting */ |
---|
| 910 | + reg = readl(usbmisc->base); |
---|
| 911 | + writel(reg | MX6_BM_NON_BURST_SETTING, usbmisc->base); |
---|
| 912 | + |
---|
| 913 | + if (data->hsic) { |
---|
| 914 | + reg = readl(usbmisc->base); |
---|
| 915 | + writel(reg | MX6_BM_UTMI_ON_CLOCK, usbmisc->base); |
---|
| 916 | + |
---|
| 917 | + reg = readl(usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET); |
---|
| 918 | + reg |= MX6_BM_HSIC_EN | MX6_BM_HSIC_CLK_ON; |
---|
| 919 | + writel(reg, usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET); |
---|
| 920 | + |
---|
| 921 | + /* |
---|
| 922 | + * For non-HSIC controller, the autoresume is enabled |
---|
| 923 | + * at MXS PHY driver (usbphy_ctrl bit18). |
---|
| 924 | + */ |
---|
| 925 | + reg = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2); |
---|
| 926 | + writel(reg | MX7D_USBNC_AUTO_RESUME, |
---|
| 927 | + usbmisc->base + MX7D_USBNC_USB_CTRL2); |
---|
| 928 | + } else { |
---|
| 929 | + reg = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2); |
---|
| 930 | + reg &= ~MX7D_USB_VBUS_WAKEUP_SOURCE_MASK; |
---|
| 931 | + writel(reg | MX7D_USB_VBUS_WAKEUP_SOURCE_BVALID, |
---|
| 932 | + usbmisc->base + MX7D_USBNC_USB_CTRL2); |
---|
| 933 | + } |
---|
| 934 | + |
---|
457 | 935 | spin_unlock_irqrestore(&usbmisc->lock, flags); |
---|
458 | 936 | |
---|
459 | 937 | usbmisc_imx7d_set_wakeup(data, false); |
---|
.. | .. |
---|
481 | 959 | static const struct usbmisc_ops imx6q_usbmisc_ops = { |
---|
482 | 960 | .set_wakeup = usbmisc_imx6q_set_wakeup, |
---|
483 | 961 | .init = usbmisc_imx6q_init, |
---|
| 962 | + .hsic_set_connect = usbmisc_imx6_hsic_set_connect, |
---|
| 963 | + .hsic_set_clk = usbmisc_imx6_hsic_set_clk, |
---|
484 | 964 | }; |
---|
485 | 965 | |
---|
486 | 966 | static const struct usbmisc_ops vf610_usbmisc_ops = { |
---|
.. | .. |
---|
490 | 970 | static const struct usbmisc_ops imx6sx_usbmisc_ops = { |
---|
491 | 971 | .set_wakeup = usbmisc_imx6q_set_wakeup, |
---|
492 | 972 | .init = usbmisc_imx6sx_init, |
---|
| 973 | + .hsic_set_connect = usbmisc_imx6_hsic_set_connect, |
---|
| 974 | + .hsic_set_clk = usbmisc_imx6_hsic_set_clk, |
---|
493 | 975 | }; |
---|
494 | 976 | |
---|
495 | 977 | static const struct usbmisc_ops imx7d_usbmisc_ops = { |
---|
496 | 978 | .init = usbmisc_imx7d_init, |
---|
497 | 979 | .set_wakeup = usbmisc_imx7d_set_wakeup, |
---|
| 980 | + .charger_detection = imx7d_charger_detection, |
---|
| 981 | +}; |
---|
| 982 | + |
---|
| 983 | +static const struct usbmisc_ops imx7ulp_usbmisc_ops = { |
---|
| 984 | + .init = usbmisc_imx7ulp_init, |
---|
| 985 | + .set_wakeup = usbmisc_imx7d_set_wakeup, |
---|
| 986 | + .hsic_set_connect = usbmisc_imx6_hsic_set_connect, |
---|
| 987 | + .hsic_set_clk = usbmisc_imx6_hsic_set_clk, |
---|
498 | 988 | }; |
---|
499 | 989 | |
---|
500 | 990 | static inline bool is_imx53_usbmisc(struct imx_usbmisc_data *data) |
---|
.. | .. |
---|
546 | 1036 | } |
---|
547 | 1037 | EXPORT_SYMBOL_GPL(imx_usbmisc_set_wakeup); |
---|
548 | 1038 | |
---|
| 1039 | +int imx_usbmisc_hsic_set_connect(struct imx_usbmisc_data *data) |
---|
| 1040 | +{ |
---|
| 1041 | + struct imx_usbmisc *usbmisc; |
---|
| 1042 | + |
---|
| 1043 | + if (!data) |
---|
| 1044 | + return 0; |
---|
| 1045 | + |
---|
| 1046 | + usbmisc = dev_get_drvdata(data->dev); |
---|
| 1047 | + if (!usbmisc->ops->hsic_set_connect || !data->hsic) |
---|
| 1048 | + return 0; |
---|
| 1049 | + return usbmisc->ops->hsic_set_connect(data); |
---|
| 1050 | +} |
---|
| 1051 | +EXPORT_SYMBOL_GPL(imx_usbmisc_hsic_set_connect); |
---|
| 1052 | + |
---|
| 1053 | +int imx_usbmisc_hsic_set_clk(struct imx_usbmisc_data *data, bool on) |
---|
| 1054 | +{ |
---|
| 1055 | + struct imx_usbmisc *usbmisc; |
---|
| 1056 | + |
---|
| 1057 | + if (!data) |
---|
| 1058 | + return 0; |
---|
| 1059 | + |
---|
| 1060 | + usbmisc = dev_get_drvdata(data->dev); |
---|
| 1061 | + if (!usbmisc->ops->hsic_set_clk || !data->hsic) |
---|
| 1062 | + return 0; |
---|
| 1063 | + return usbmisc->ops->hsic_set_clk(data, on); |
---|
| 1064 | +} |
---|
| 1065 | +EXPORT_SYMBOL_GPL(imx_usbmisc_hsic_set_clk); |
---|
| 1066 | + |
---|
| 1067 | +int imx_usbmisc_charger_detection(struct imx_usbmisc_data *data, bool connect) |
---|
| 1068 | +{ |
---|
| 1069 | + struct imx_usbmisc *usbmisc; |
---|
| 1070 | + struct usb_phy *usb_phy; |
---|
| 1071 | + int ret = 0; |
---|
| 1072 | + |
---|
| 1073 | + if (!data) |
---|
| 1074 | + return -EINVAL; |
---|
| 1075 | + |
---|
| 1076 | + usbmisc = dev_get_drvdata(data->dev); |
---|
| 1077 | + usb_phy = data->usb_phy; |
---|
| 1078 | + if (!usbmisc->ops->charger_detection) |
---|
| 1079 | + return -ENOTSUPP; |
---|
| 1080 | + |
---|
| 1081 | + if (connect) { |
---|
| 1082 | + ret = usbmisc->ops->charger_detection(data); |
---|
| 1083 | + if (ret) { |
---|
| 1084 | + dev_err(data->dev, |
---|
| 1085 | + "Error occurs during detection: %d\n", |
---|
| 1086 | + ret); |
---|
| 1087 | + usb_phy->chg_state = USB_CHARGER_ABSENT; |
---|
| 1088 | + } else { |
---|
| 1089 | + usb_phy->chg_state = USB_CHARGER_PRESENT; |
---|
| 1090 | + } |
---|
| 1091 | + } else { |
---|
| 1092 | + usb_phy->chg_state = USB_CHARGER_ABSENT; |
---|
| 1093 | + usb_phy->chg_type = UNKNOWN_TYPE; |
---|
| 1094 | + } |
---|
| 1095 | + return ret; |
---|
| 1096 | +} |
---|
| 1097 | +EXPORT_SYMBOL_GPL(imx_usbmisc_charger_detection); |
---|
| 1098 | + |
---|
549 | 1099 | static const struct of_device_id usbmisc_imx_dt_ids[] = { |
---|
550 | 1100 | { |
---|
551 | 1101 | .compatible = "fsl,imx25-usbmisc", |
---|
.. | .. |
---|
587 | 1137 | .compatible = "fsl,imx7d-usbmisc", |
---|
588 | 1138 | .data = &imx7d_usbmisc_ops, |
---|
589 | 1139 | }, |
---|
| 1140 | + { |
---|
| 1141 | + .compatible = "fsl,imx7ulp-usbmisc", |
---|
| 1142 | + .data = &imx7ulp_usbmisc_ops, |
---|
| 1143 | + }, |
---|
590 | 1144 | { /* sentinel */ } |
---|
591 | 1145 | }; |
---|
592 | 1146 | MODULE_DEVICE_TABLE(of, usbmisc_imx_dt_ids); |
---|
593 | 1147 | |
---|
594 | 1148 | static int usbmisc_imx_probe(struct platform_device *pdev) |
---|
595 | 1149 | { |
---|
596 | | - struct resource *res; |
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597 | 1150 | struct imx_usbmisc *data; |
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598 | 1151 | const struct of_device_id *of_id; |
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599 | 1152 | |
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.. | .. |
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607 | 1160 | |
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608 | 1161 | spin_lock_init(&data->lock); |
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609 | 1162 | |
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610 | | - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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611 | | - data->base = devm_ioremap_resource(&pdev->dev, res); |
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| 1163 | + data->base = devm_platform_ioremap_resource(pdev, 0); |
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612 | 1164 | if (IS_ERR(data->base)) |
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613 | 1165 | return PTR_ERR(data->base); |
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614 | 1166 | |
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.. | .. |
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635 | 1187 | module_platform_driver(usbmisc_imx_driver); |
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636 | 1188 | |
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637 | 1189 | MODULE_ALIAS("platform:usbmisc-imx"); |
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638 | | -MODULE_LICENSE("GPL v2"); |
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| 1190 | +MODULE_LICENSE("GPL"); |
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639 | 1191 | MODULE_DESCRIPTION("driver for imx usb non-core registers"); |
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640 | 1192 | MODULE_AUTHOR("Richard Zhao <richard.zhao@freescale.com>"); |
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