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2024-01-04 1543e317f1da31b75942316931e8f491a8920811 
 kernel/drivers/tty/serial/lantiq.c
....@@ -8,24 +8,23 @@
88  * Copyright (C) 2010 Thomas Langer, <thomas.langer@lantiq.com>
99  */
1010 
11
-#include <linux/slab.h>
12
-#include <linux/ioport.h>
13
-#include <linux/init.h>
11
+#include <linux/clk.h>
1412 #include <linux/console.h>
15
-#include <linux/sysrq.h>
1613 #include <linux/device.h>
17
-#include <linux/tty.h>
18
-#include <linux/tty_flip.h>
19
-#include <linux/serial_core.h>
20
-#include <linux/serial.h>
21
-#include <linux/of_platform.h>
14
+#include <linux/init.h>
15
+#include <linux/io.h>
16
+#include <linux/ioport.h>
17
+#include <linux/lantiq.h>
18
+#include <linux/module.h>
2219 #include <linux/of_address.h>
2320 #include <linux/of_irq.h>
24
-#include <linux/io.h>
25
-#include <linux/clk.h>
26
-#include <linux/gpio.h>
27
-
28
-#include <lantiq_soc.h>
21
+#include <linux/of_platform.h>
22
+#include <linux/serial.h>
23
+#include <linux/serial_core.h>
24
+#include <linux/slab.h>
25
+#include <linux/sysrq.h>
26
+#include <linux/tty.h>
27
+#include <linux/tty_flip.h>
2928 
3029 #define PORT_LTQ_ASC		111
3130 #define MAXPORTS		2
....@@ -58,6 +57,7 @@
5857 #define ASC_IRNCR_TIR		0x1
5958 #define ASC_IRNCR_RIR		0x2
6059 #define ASC_IRNCR_EIR		0x4
60
+#define ASC_IRNCR_MASK		GENMASK(2, 0)
6161 
6262 #define ASCOPT_CSIZE		0x3
6363 #define TXFIFO_FL		1
....@@ -100,18 +100,34 @@
100100 static void lqasc_tx_chars(struct uart_port *port);
101101 static struct ltq_uart_port *lqasc_port[MAXPORTS];
102102 static struct uart_driver lqasc_reg;
103
-static DEFINE_SPINLOCK(ltq_asc_lock);
103
+
104
+struct ltq_soc_data {
105
+	int	(*fetch_irq)(struct device *dev, struct ltq_uart_port *ltq_port);
106
+	int	(*request_irq)(struct uart_port *port);
107
+	void	(*free_irq)(struct uart_port *port);
108
+};
104109 
105110 struct ltq_uart_port {
106111 	struct uart_port	port;
107112 	/* clock used to derive divider */
108
-	struct clk		*fpiclk;
113
+	struct clk		*freqclk;
109114 	/* clock gating of the ASC core */
110115 	struct clk		*clk;
111116 	unsigned int		tx_irq;
112117 	unsigned int		rx_irq;
113118 	unsigned int		err_irq;
119
+	unsigned int		common_irq;
120
+	spinlock_t		lock; /* exclusive access for multi core */
121
+
122
+	const struct ltq_soc_data	*soc;
114123 };
124
+
125
+static inline void asc_update_bits(u32 clear, u32 set, void __iomem *reg)
126
+{
127
+	u32 tmp = __raw_readl(reg);
128
+
129
+	__raw_writel((tmp & ~clear) | set, reg);
130
+}
115131 
116132 static inline struct
117133 ltq_uart_port *to_ltq_uart_port(struct uart_port *port)
....@@ -129,16 +145,18 @@
129145 lqasc_start_tx(struct uart_port *port)
130146 {
131147 	unsigned long flags;
132
-	spin_lock_irqsave(&ltq_asc_lock, flags);
148
+	struct ltq_uart_port *ltq_port = to_ltq_uart_port(port);
149
+
150
+	spin_lock_irqsave(&ltq_port->lock, flags);
133151 	lqasc_tx_chars(port);
134
-	spin_unlock_irqrestore(&ltq_asc_lock, flags);
152
+	spin_unlock_irqrestore(&ltq_port->lock, flags);
135153 	return;
136154 }
137155 
138156 static void
139157 lqasc_stop_rx(struct uart_port *port)
140158 {
141
-	ltq_w32(ASCWHBSTATE_CLRREN, port->membase + LTQ_ASC_WHBSTATE);
159
+	__raw_writel(ASCWHBSTATE_CLRREN, port->membase + LTQ_ASC_WHBSTATE);
142160 }
143161 
144162 static int
....@@ -147,11 +165,12 @@
147165 	struct tty_port *tport = &port->state->port;
148166 	unsigned int ch = 0, rsr = 0, fifocnt;
149167 
150
-	fifocnt = ltq_r32(port->membase + LTQ_ASC_FSTAT) & ASCFSTAT_RXFFLMASK;
168
+	fifocnt = __raw_readl(port->membase + LTQ_ASC_FSTAT) &
169
+		  ASCFSTAT_RXFFLMASK;
151170 	while (fifocnt--) {
152171 		u8 flag = TTY_NORMAL;
153
-		ch = ltq_r8(port->membase + LTQ_ASC_RBUF);
154
-		rsr = (ltq_r32(port->membase + LTQ_ASC_STATE)
172
+		ch = readb(port->membase + LTQ_ASC_RBUF);
173
+		rsr = (__raw_readl(port->membase + LTQ_ASC_STATE)
155174 			& ASCSTATE_ANY) | UART_DUMMY_UER_RX;
156175 		tty_flip_buffer_push(tport);
157176 		port->icount.rx++;
....@@ -163,16 +182,16 @@
163182 		if (rsr & ASCSTATE_ANY) {
164183 			if (rsr & ASCSTATE_PE) {
165184 				port->icount.parity++;
166
-				ltq_w32_mask(0, ASCWHBSTATE_CLRPE,
185
+				asc_update_bits(0, ASCWHBSTATE_CLRPE,
167186 					port->membase + LTQ_ASC_WHBSTATE);
168187 			} else if (rsr & ASCSTATE_FE) {
169188 				port->icount.frame++;
170
-				ltq_w32_mask(0, ASCWHBSTATE_CLRFE,
189
+				asc_update_bits(0, ASCWHBSTATE_CLRFE,
171190 					port->membase + LTQ_ASC_WHBSTATE);
172191 			}
173192 			if (rsr & ASCSTATE_ROE) {
174193 				port->icount.overrun++;
175
-				ltq_w32_mask(0, ASCWHBSTATE_CLRROE,
194
+				asc_update_bits(0, ASCWHBSTATE_CLRROE,
176195 					port->membase + LTQ_ASC_WHBSTATE);
177196 			}
178197 
....@@ -211,10 +230,10 @@
211230 		return;
212231 	}
213232 
214
-	while (((ltq_r32(port->membase + LTQ_ASC_FSTAT) &
233
+	while (((__raw_readl(port->membase + LTQ_ASC_FSTAT) &
215234 		ASCFSTAT_TXFREEMASK) >> ASCFSTAT_TXFREEOFF) != 0) {
216235 		if (port->x_char) {
217
-			ltq_w8(port->x_char, port->membase + LTQ_ASC_TBUF);
236
+			writeb(port->x_char, port->membase + LTQ_ASC_TBUF);
218237 			port->icount.tx++;
219238 			port->x_char = 0;
220239 			continue;
....@@ -223,7 +242,7 @@
223242 		if (uart_circ_empty(xmit))
224243 			break;
225244 
226
-		ltq_w8(port->state->xmit.buf[port->state->xmit.tail],
245
+		writeb(port->state->xmit.buf[port->state->xmit.tail],
227246 			port->membase + LTQ_ASC_TBUF);
228247 		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
229248 		port->icount.tx++;
....@@ -238,9 +257,11 @@
238257 {
239258 	unsigned long flags;
240259 	struct uart_port *port = (struct uart_port *)_port;
241
-	spin_lock_irqsave(&ltq_asc_lock, flags);
242
-	ltq_w32(ASC_IRNCR_TIR, port->membase + LTQ_ASC_IRNCR);
243
-	spin_unlock_irqrestore(&ltq_asc_lock, flags);
260
+	struct ltq_uart_port *ltq_port = to_ltq_uart_port(port);
261
+
262
+	spin_lock_irqsave(&ltq_port->lock, flags);
263
+	__raw_writel(ASC_IRNCR_TIR, port->membase + LTQ_ASC_IRNCR);
264
+	spin_unlock_irqrestore(&ltq_port->lock, flags);
244265 	lqasc_start_tx(port);
245266 	return IRQ_HANDLED;
246267 }
....@@ -250,11 +271,14 @@
250271 {
251272 	unsigned long flags;
252273 	struct uart_port *port = (struct uart_port *)_port;
253
-	spin_lock_irqsave(&ltq_asc_lock, flags);
274
+	struct ltq_uart_port *ltq_port = to_ltq_uart_port(port);
275
+
276
+	spin_lock_irqsave(&ltq_port->lock, flags);
277
+	__raw_writel(ASC_IRNCR_EIR, port->membase + LTQ_ASC_IRNCR);
254278 	/* clear any pending interrupts */
255
-	ltq_w32_mask(0, ASCWHBSTATE_CLRPE | ASCWHBSTATE_CLRFE |
279
+	asc_update_bits(0, ASCWHBSTATE_CLRPE | ASCWHBSTATE_CLRFE |
256280 		ASCWHBSTATE_CLRROE, port->membase + LTQ_ASC_WHBSTATE);
257
-	spin_unlock_irqrestore(&ltq_asc_lock, flags);
281
+	spin_unlock_irqrestore(&ltq_port->lock, flags);
258282 	return IRQ_HANDLED;
259283 }
260284 
....@@ -263,10 +287,37 @@
263287 {
264288 	unsigned long flags;
265289 	struct uart_port *port = (struct uart_port *)_port;
266
-	spin_lock_irqsave(&ltq_asc_lock, flags);
267
-	ltq_w32(ASC_IRNCR_RIR, port->membase + LTQ_ASC_IRNCR);
290
+	struct ltq_uart_port *ltq_port = to_ltq_uart_port(port);
291
+
292
+	spin_lock_irqsave(&ltq_port->lock, flags);
293
+	__raw_writel(ASC_IRNCR_RIR, port->membase + LTQ_ASC_IRNCR);
268294 	lqasc_rx_chars(port);
269
-	spin_unlock_irqrestore(&ltq_asc_lock, flags);
295
+	spin_unlock_irqrestore(&ltq_port->lock, flags);
296
+	return IRQ_HANDLED;
297
+}
298
+
299
+static irqreturn_t lqasc_irq(int irq, void *p)
300
+{
301
+	unsigned long flags;
302
+	u32 stat;
303
+	struct uart_port *port = p;
304
+	struct ltq_uart_port *ltq_port = to_ltq_uart_port(port);
305
+
306
+	spin_lock_irqsave(&ltq_port->lock, flags);
307
+	stat = readl(port->membase + LTQ_ASC_IRNCR);
308
+	spin_unlock_irqrestore(&ltq_port->lock, flags);
309
+	if (!(stat & ASC_IRNCR_MASK))
310
+		return IRQ_NONE;
311
+
312
+	if (stat & ASC_IRNCR_TIR)
313
+		lqasc_tx_int(irq, p);
314
+
315
+	if (stat & ASC_IRNCR_RIR)
316
+		lqasc_rx_int(irq, p);
317
+
318
+	if (stat & ASC_IRNCR_EIR)
319
+		lqasc_err_int(irq, p);
320
+
270321 	return IRQ_HANDLED;
271322 }
272323 
....@@ -274,7 +325,8 @@
274325 lqasc_tx_empty(struct uart_port *port)
275326 {
276327 	int status;
277
-	status = ltq_r32(port->membase + LTQ_ASC_FSTAT) & ASCFSTAT_TXFFLMASK;
328
+	status = __raw_readl(port->membase + LTQ_ASC_FSTAT) &
329
+		 ASCFSTAT_TXFFLMASK;
278330 	return status ? 0 : TIOCSER_TEMT;
279331 }
280332 
....@@ -299,20 +351,22 @@
299351 {
300352 	struct ltq_uart_port *ltq_port = to_ltq_uart_port(port);
301353 	int retval;
354
+	unsigned long flags;
302355 
303356 	if (!IS_ERR(ltq_port->clk))
304
-		clk_enable(ltq_port->clk);
305
-	port->uartclk = clk_get_rate(ltq_port->fpiclk);
357
+		clk_prepare_enable(ltq_port->clk);
358
+	port->uartclk = clk_get_rate(ltq_port->freqclk);
306359 
307
-	ltq_w32_mask(ASCCLC_DISS | ASCCLC_RMCMASK, (1 << ASCCLC_RMCOFFSET),
360
+	spin_lock_irqsave(&ltq_port->lock, flags);
361
+	asc_update_bits(ASCCLC_DISS | ASCCLC_RMCMASK, (1 << ASCCLC_RMCOFFSET),
308362 		port->membase + LTQ_ASC_CLC);
309363 
310
-	ltq_w32(0, port->membase + LTQ_ASC_PISEL);
311
-	ltq_w32(
364
+	__raw_writel(0, port->membase + LTQ_ASC_PISEL);
365
+	__raw_writel(
312366 		((TXFIFO_FL << ASCTXFCON_TXFITLOFF) & ASCTXFCON_TXFITLMASK) |
313367 		ASCTXFCON_TXFEN | ASCTXFCON_TXFFLU,
314368 		port->membase + LTQ_ASC_TXFCON);
315
-	ltq_w32(
369
+	__raw_writel(
316370 		((RXFIFO_FL << ASCRXFCON_RXFITLOFF) & ASCRXFCON_RXFITLMASK)
317371 		| ASCRXFCON_RXFEN | ASCRXFCON_RXFFLU,
318372 		port->membase + LTQ_ASC_RXFCON);
....@@ -320,38 +374,17 @@
320374 	 * setting enable bits
321375 	 */
322376 	wmb();
323
-	ltq_w32_mask(0, ASCCON_M_8ASYNC | ASCCON_FEN | ASCCON_TOEN |
377
+	asc_update_bits(0, ASCCON_M_8ASYNC | ASCCON_FEN | ASCCON_TOEN |
324378 		ASCCON_ROEN, port->membase + LTQ_ASC_CON);
325379 
326
-	retval = request_irq(ltq_port->tx_irq, lqasc_tx_int,
327
-		0, "asc_tx", port);
328
-	if (retval) {
329
-		pr_err("failed to request lqasc_tx_int\n");
380
+	spin_unlock_irqrestore(&ltq_port->lock, flags);
381
+
382
+	retval = ltq_port->soc->request_irq(port);
383
+	if (retval)
330384 		return retval;
331
-	}
332385 
333
-	retval = request_irq(ltq_port->rx_irq, lqasc_rx_int,
334
-		0, "asc_rx", port);
335
-	if (retval) {
336
-		pr_err("failed to request lqasc_rx_int\n");
337
-		goto err1;
338
-	}
339
-
340
-	retval = request_irq(ltq_port->err_irq, lqasc_err_int,
341
-		0, "asc_err", port);
342
-	if (retval) {
343
-		pr_err("failed to request lqasc_err_int\n");
344
-		goto err2;
345
-	}
346
-
347
-	ltq_w32(ASC_IRNREN_RX | ASC_IRNREN_ERR | ASC_IRNREN_TX,
386
+	__raw_writel(ASC_IRNREN_RX | ASC_IRNREN_ERR | ASC_IRNREN_TX,
348387 		port->membase + LTQ_ASC_IRNREN);
349
-	return 0;
350
-
351
-err2:
352
-	free_irq(ltq_port->rx_irq, port);
353
-err1:
354
-	free_irq(ltq_port->tx_irq, port);
355388 	return retval;
356389 }
357390 
....@@ -359,17 +392,19 @@
359392 lqasc_shutdown(struct uart_port *port)
360393 {
361394 	struct ltq_uart_port *ltq_port = to_ltq_uart_port(port);
362
-	free_irq(ltq_port->tx_irq, port);
363
-	free_irq(ltq_port->rx_irq, port);
364
-	free_irq(ltq_port->err_irq, port);
395
+	unsigned long flags;
365396 
366
-	ltq_w32(0, port->membase + LTQ_ASC_CON);
367
-	ltq_w32_mask(ASCRXFCON_RXFEN, ASCRXFCON_RXFFLU,
397
+	ltq_port->soc->free_irq(port);
398
+
399
+	spin_lock_irqsave(&ltq_port->lock, flags);
400
+	__raw_writel(0, port->membase + LTQ_ASC_CON);
401
+	asc_update_bits(ASCRXFCON_RXFEN, ASCRXFCON_RXFFLU,
368402 		port->membase + LTQ_ASC_RXFCON);
369
-	ltq_w32_mask(ASCTXFCON_TXFEN, ASCTXFCON_TXFFLU,
403
+	asc_update_bits(ASCTXFCON_TXFEN, ASCTXFCON_TXFFLU,
370404 		port->membase + LTQ_ASC_TXFCON);
405
+	spin_unlock_irqrestore(&ltq_port->lock, flags);
371406 	if (!IS_ERR(ltq_port->clk))
372
-		clk_disable(ltq_port->clk);
407
+		clk_disable_unprepare(ltq_port->clk);
373408 }
374409 
375410 static void
....@@ -382,6 +417,7 @@
382417 	unsigned int baud;
383418 	unsigned int con = 0;
384419 	unsigned long flags;
420
+	struct ltq_uart_port *ltq_port = to_ltq_uart_port(port);
385421 
386422 	cflag = new->c_cflag;
387423 	iflag = new->c_iflag;
....@@ -435,10 +471,10 @@
435471 	/* set error signals  - framing, parity  and overrun, enable receiver */
436472 	con |= ASCCON_FEN | ASCCON_TOEN | ASCCON_ROEN;
437473 
438
-	spin_lock_irqsave(&ltq_asc_lock, flags);
474
+	spin_lock_irqsave(&ltq_port->lock, flags);
439475 
440476 	/* set up CON */
441
-	ltq_w32_mask(0, con, port->membase + LTQ_ASC_CON);
477
+	asc_update_bits(0, con, port->membase + LTQ_ASC_CON);
442478 
443479 	/* Set baud rate - take a divider of 2 into account */
444480 	baud = uart_get_baud_rate(port, new, old, 0, port->uartclk / 16);
....@@ -446,24 +482,24 @@
446482 	divisor = divisor / 2 - 1;
447483 
448484 	/* disable the baudrate generator */
449
-	ltq_w32_mask(ASCCON_R, 0, port->membase + LTQ_ASC_CON);
485
+	asc_update_bits(ASCCON_R, 0, port->membase + LTQ_ASC_CON);
450486 
451487 	/* make sure the fractional divider is off */
452
-	ltq_w32_mask(ASCCON_FDE, 0, port->membase + LTQ_ASC_CON);
488
+	asc_update_bits(ASCCON_FDE, 0, port->membase + LTQ_ASC_CON);
453489 
454490 	/* set up to use divisor of 2 */
455
-	ltq_w32_mask(ASCCON_BRS, 0, port->membase + LTQ_ASC_CON);
491
+	asc_update_bits(ASCCON_BRS, 0, port->membase + LTQ_ASC_CON);
456492 
457493 	/* now we can write the new baudrate into the register */
458
-	ltq_w32(divisor, port->membase + LTQ_ASC_BG);
494
+	__raw_writel(divisor, port->membase + LTQ_ASC_BG);
459495 
460496 	/* turn the baudrate generator back on */
461
-	ltq_w32_mask(0, ASCCON_R, port->membase + LTQ_ASC_CON);
497
+	asc_update_bits(0, ASCCON_R, port->membase + LTQ_ASC_CON);
462498 
463499 	/* enable rx */
464
-	ltq_w32(ASCWHBSTATE_SETREN, port->membase + LTQ_ASC_WHBSTATE);
500
+	__raw_writel(ASCWHBSTATE_SETREN, port->membase + LTQ_ASC_WHBSTATE);
465501 
466
-	spin_unlock_irqrestore(&ltq_asc_lock, flags);
502
+	spin_unlock_irqrestore(&ltq_port->lock, flags);
467503 
468504 	/* Don't rewrite B0 */
469505 	if (tty_termios_baud_rate(new))
....@@ -514,7 +550,7 @@
514550 	}
515551 
516552 	if (port->flags & UPF_IOREMAP) {
517
-		port->membase = devm_ioremap_nocache(&pdev->dev,
553
+		port->membase = devm_ioremap(&pdev->dev,
518554 			port->mapbase, size);
519555 		if (port->membase == NULL)
520556 			return -ENOMEM;
....@@ -563,6 +599,7 @@
563599 	.verify_port =	lqasc_verify_port,
564600 };
565601 
602
+#ifdef CONFIG_SERIAL_LANTIQ_CONSOLE
566603 static void
567604 lqasc_console_putchar(struct uart_port *port, int ch)
568605 {
....@@ -572,26 +609,23 @@
572609 		return;
573610 
574611 	do {
575
-		fifofree = (ltq_r32(port->membase + LTQ_ASC_FSTAT)
612
+		fifofree = (__raw_readl(port->membase + LTQ_ASC_FSTAT)
576613 			& ASCFSTAT_TXFREEMASK) >> ASCFSTAT_TXFREEOFF;
577614 	} while (fifofree == 0);
578
-	ltq_w8(ch, port->membase + LTQ_ASC_TBUF);
615
+	writeb(ch, port->membase + LTQ_ASC_TBUF);
579616 }
580617 
581618 static void lqasc_serial_port_write(struct uart_port *port, const char *s,
582619 				    u_int count)
583620 {
584
-	unsigned long flags;
585
-
586
-	spin_lock_irqsave(&ltq_asc_lock, flags);
587621 	uart_console_write(port, s, count, lqasc_console_putchar);
588
-	spin_unlock_irqrestore(&ltq_asc_lock, flags);
589622 }
590623 
591624 static void
592625 lqasc_console_write(struct console *co, const char *s, u_int count)
593626 {
594627 	struct ltq_uart_port *ltq_port;
628
+	unsigned long flags;
595629 
596630 	if (co->index >= MAXPORTS)
597631 		return;
....@@ -600,7 +634,9 @@
600634 	if (!ltq_port)
601635 		return;
602636 
637
+	spin_lock_irqsave(&ltq_port->lock, flags);
603638 	lqasc_serial_port_write(&ltq_port->port, s, count);
639
+	spin_unlock_irqrestore(&ltq_port->lock, flags);
604640 }
605641 
606642 static int __init
....@@ -623,9 +659,9 @@
623659 	port = &ltq_port->port;
624660 
625661 	if (!IS_ERR(ltq_port->clk))
626
-		clk_enable(ltq_port->clk);
662
+		clk_prepare_enable(ltq_port->clk);
627663 
628
-	port->uartclk = clk_get_rate(ltq_port->fpiclk);
664
+	port->uartclk = clk_get_rate(ltq_port->freqclk);
629665 
630666 	if (options)
631667 		uart_parse_options(options, &baud, &parity, &bits, &flow);
....@@ -669,7 +705,16 @@
669705 	device->con->write = lqasc_serial_early_console_write;
670706 	return 0;
671707 }
672
-OF_EARLYCON_DECLARE(lantiq, DRVNAME, lqasc_serial_early_console_setup);
708
+OF_EARLYCON_DECLARE(lantiq, "lantiq,asc", lqasc_serial_early_console_setup);
709
+OF_EARLYCON_DECLARE(lantiq, "intel,lgm-asc", lqasc_serial_early_console_setup);
710
+
711
+#define LANTIQ_SERIAL_CONSOLE	(&lqasc_console)
712
+
713
+#else
714
+
715
+#define LANTIQ_SERIAL_CONSOLE	NULL
716
+
717
+#endif /* CONFIG_SERIAL_LANTIQ_CONSOLE */
673718 
674719 static struct uart_driver lqasc_reg = {
675720 	.owner =	THIS_MODULE,
....@@ -678,42 +723,155 @@
678723 	.major =	0,
679724 	.minor =	0,
680725 	.nr =		MAXPORTS,
681
-	.cons =		&lqasc_console,
726
+	.cons =		LANTIQ_SERIAL_CONSOLE,
682727 };
683728 
684
-static int __init
685
-lqasc_probe(struct platform_device *pdev)
729
+static int fetch_irq_lantiq(struct device *dev, struct ltq_uart_port *ltq_port)
730
+{
731
+	struct uart_port *port = &ltq_port->port;
732
+	struct resource irqres[3];
733
+	int ret;
734
+
735
+	ret = of_irq_to_resource_table(dev->of_node, irqres, 3);
736
+	if (ret != 3) {
737
+		dev_err(dev,
738
+			"failed to get IRQs for serial port\n");
739
+		return -ENODEV;
740
+	}
741
+	ltq_port->tx_irq = irqres[0].start;
742
+	ltq_port->rx_irq = irqres[1].start;
743
+	ltq_port->err_irq = irqres[2].start;
744
+	port->irq = irqres[0].start;
745
+
746
+	return 0;
747
+}
748
+
749
+static int request_irq_lantiq(struct uart_port *port)
750
+{
751
+	struct ltq_uart_port *ltq_port = to_ltq_uart_port(port);
752
+	int retval;
753
+
754
+	retval = request_irq(ltq_port->tx_irq, lqasc_tx_int,
755
+			     0, "asc_tx", port);
756
+	if (retval) {
757
+		dev_err(port->dev, "failed to request asc_tx\n");
758
+		return retval;
759
+	}
760
+
761
+	retval = request_irq(ltq_port->rx_irq, lqasc_rx_int,
762
+			     0, "asc_rx", port);
763
+	if (retval) {
764
+		dev_err(port->dev, "failed to request asc_rx\n");
765
+		goto err1;
766
+	}
767
+
768
+	retval = request_irq(ltq_port->err_irq, lqasc_err_int,
769
+			     0, "asc_err", port);
770
+	if (retval) {
771
+		dev_err(port->dev, "failed to request asc_err\n");
772
+		goto err2;
773
+	}
774
+	return 0;
775
+
776
+err2:
777
+	free_irq(ltq_port->rx_irq, port);
778
+err1:
779
+	free_irq(ltq_port->tx_irq, port);
780
+	return retval;
781
+}
782
+
783
+static void free_irq_lantiq(struct uart_port *port)
784
+{
785
+	struct ltq_uart_port *ltq_port = to_ltq_uart_port(port);
786
+
787
+	free_irq(ltq_port->tx_irq, port);
788
+	free_irq(ltq_port->rx_irq, port);
789
+	free_irq(ltq_port->err_irq, port);
790
+}
791
+
792
+static int fetch_irq_intel(struct device *dev, struct ltq_uart_port *ltq_port)
793
+{
794
+	struct uart_port *port = &ltq_port->port;
795
+	int ret;
796
+
797
+	ret = of_irq_get(dev->of_node, 0);
798
+	if (ret < 0) {
799
+		dev_err(dev, "failed to fetch IRQ for serial port\n");
800
+		return ret;
801
+	}
802
+	ltq_port->common_irq = ret;
803
+	port->irq = ret;
804
+
805
+	return 0;
806
+}
807
+
808
+static int request_irq_intel(struct uart_port *port)
809
+{
810
+	struct ltq_uart_port *ltq_port = to_ltq_uart_port(port);
811
+	int retval;
812
+
813
+	retval = request_irq(ltq_port->common_irq, lqasc_irq, 0,
814
+			     "asc_irq", port);
815
+	if (retval)
816
+		dev_err(port->dev, "failed to request asc_irq\n");
817
+
818
+	return retval;
819
+}
820
+
821
+static void free_irq_intel(struct uart_port *port)
822
+{
823
+	struct ltq_uart_port *ltq_port = to_ltq_uart_port(port);
824
+
825
+	free_irq(ltq_port->common_irq, port);
826
+}
827
+
828
+static int lqasc_probe(struct platform_device *pdev)
686829 {
687830 	struct device_node *node = pdev->dev.of_node;
688831 	struct ltq_uart_port *ltq_port;
689832 	struct uart_port *port;
690
-	struct resource *mmres, irqres[3];
691
-	int line = 0;
833
+	struct resource *mmres;
834
+	int line;
692835 	int ret;
693836 
694837 	mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
695
-	ret = of_irq_to_resource_table(node, irqres, 3);
696
-	if (!mmres || (ret != 3)) {
838
+	if (!mmres) {
697839 		dev_err(&pdev->dev,
698
-			"failed to get memory/irq for serial port\n");
840
+			"failed to get memory for serial port\n");
699841 		return -ENODEV;
700842 	}
701843 
702
-	/* check if this is the console port */
703
-	if (mmres->start != CPHYSADDR(LTQ_EARLY_ASC))
704
-		line = 1;
844
+	ltq_port = devm_kzalloc(&pdev->dev, sizeof(struct ltq_uart_port),
845
+				GFP_KERNEL);
846
+	if (!ltq_port)
847
+		return -ENOMEM;
848
+
849
+	port = &ltq_port->port;
850
+
851
+	ltq_port->soc = of_device_get_match_data(&pdev->dev);
852
+	ret = ltq_port->soc->fetch_irq(&pdev->dev, ltq_port);
853
+	if (ret)
854
+		return ret;
855
+
856
+	/* get serial id */
857
+	line = of_alias_get_id(node, "serial");
858
+	if (line < 0) {
859
+		if (IS_ENABLED(CONFIG_LANTIQ)) {
860
+			if (mmres->start == CPHYSADDR(LTQ_EARLY_ASC))
861
+				line = 0;
862
+			else
863
+				line = 1;
864
+		} else {
865
+			dev_err(&pdev->dev, "failed to get alias id, errno %d\n",
866
+				line);
867
+			return line;
868
+		}
869
+	}
705870 
706871 	if (lqasc_port[line]) {
707872 		dev_err(&pdev->dev, "port %d already allocated\n", line);
708873 		return -EBUSY;
709874 	}
710
-
711
-	ltq_port = devm_kzalloc(&pdev->dev, sizeof(struct ltq_uart_port),
712
-			GFP_KERNEL);
713
-	if (!ltq_port)
714
-		return -ENOMEM;
715
-
716
-	port = &ltq_port->port;
717875 
718876 	port->iotype	= SERIAL_IO_MEM;
719877 	port->flags	= UPF_BOOT_AUTOCONF | UPF_IOREMAP;
....@@ -723,22 +881,26 @@
723881 	port->line	= line;
724882 	port->dev	= &pdev->dev;
725883 	/* unused, just to be backward-compatible */
726
-	port->irq	= irqres[0].start;
727884 	port->mapbase	= mmres->start;
728885 
729
-	ltq_port->fpiclk = clk_get_fpi();
730
-	if (IS_ERR(ltq_port->fpiclk)) {
886
+	if (IS_ENABLED(CONFIG_LANTIQ) && !IS_ENABLED(CONFIG_COMMON_CLK))
887
+		ltq_port->freqclk = clk_get_fpi();
888
+	else
889
+		ltq_port->freqclk = devm_clk_get(&pdev->dev, "freq");
890
+
891
+
892
+	if (IS_ERR(ltq_port->freqclk)) {
731893 		pr_err("failed to get fpi clk\n");
732894 		return -ENOENT;
733895 	}
734896 
735897 	/* not all asc ports have clock gates, lets ignore the return code */
736
-	ltq_port->clk = clk_get(&pdev->dev, NULL);
898
+	if (IS_ENABLED(CONFIG_LANTIQ) && !IS_ENABLED(CONFIG_COMMON_CLK))
899
+		ltq_port->clk = clk_get(&pdev->dev, NULL);
900
+	else
901
+		ltq_port->clk = devm_clk_get(&pdev->dev, "asc");
737902 
738
-	ltq_port->tx_irq = irqres[0].start;
739
-	ltq_port->rx_irq = irqres[1].start;
740
-	ltq_port->err_irq = irqres[2].start;
741
-
903
+	spin_lock_init(&ltq_port->lock);
742904 	lqasc_port[line] = ltq_port;
743905 	platform_set_drvdata(pdev, ltq_port);
744906 
....@@ -747,19 +909,42 @@
747909 	return ret;
748910 }
749911 
750
-static const struct of_device_id ltq_asc_match[] = {
751
-	{ .compatible = DRVNAME },
752
-	{},
912
+static int lqasc_remove(struct platform_device *pdev)
913
+{
914
+	struct uart_port *port = platform_get_drvdata(pdev);
915
+
916
+	return uart_remove_one_port(&lqasc_reg, port);
917
+}
918
+
919
+static const struct ltq_soc_data soc_data_lantiq = {
920
+	.fetch_irq = fetch_irq_lantiq,
921
+	.request_irq = request_irq_lantiq,
922
+	.free_irq = free_irq_lantiq,
753923 };
754924 
925
+static const struct ltq_soc_data soc_data_intel = {
926
+	.fetch_irq = fetch_irq_intel,
927
+	.request_irq = request_irq_intel,
928
+	.free_irq = free_irq_intel,
929
+};
930
+
931
+static const struct of_device_id ltq_asc_match[] = {
932
+	{ .compatible = "lantiq,asc", .data = &soc_data_lantiq },
933
+	{ .compatible = "intel,lgm-asc", .data = &soc_data_intel },
934
+	{},
935
+};
936
+MODULE_DEVICE_TABLE(of, ltq_asc_match);
937
+
755938 static struct platform_driver lqasc_driver = {
939
+	.probe		= lqasc_probe,
940
+	.remove		= lqasc_remove,
756941 	.driver		= {
757942 		.name	= DRVNAME,
758943 		.of_match_table = ltq_asc_match,
759944 	},
760945 };
761946 
762
-int __init
947
+static int __init
763948 init_lqasc(void)
764949 {
765950 	int ret;
....@@ -768,10 +953,21 @@
768953 	if (ret != 0)
769954 		return ret;
770955 
771
-	ret = platform_driver_probe(&lqasc_driver, lqasc_probe);
956
+	ret = platform_driver_register(&lqasc_driver);
772957 	if (ret != 0)
773958 		uart_unregister_driver(&lqasc_reg);
774959 
775960 	return ret;
776961 }
777
-device_initcall(init_lqasc);
962
+
963
+static void __exit exit_lqasc(void)
964
+{
965
+	platform_driver_unregister(&lqasc_driver);
966
+	uart_unregister_driver(&lqasc_reg);
967
+}
968
+
969
+module_init(init_lqasc);
970
+module_exit(exit_lqasc);
971
+
972
+MODULE_DESCRIPTION("Serial driver for Lantiq & Intel gateway SoCs");
973
+MODULE_LICENSE("GPL v2");