| .. | .. |
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| 10 | 10 | #include <linux/module.h> |
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| 11 | 11 | #include <linux/of_irq.h> |
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| 12 | 12 | #include <linux/of_platform.h> |
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| 13 | +#include <linux/pinctrl/consumer.h> |
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| 13 | 14 | #include <linux/platform_device.h> |
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| 14 | 15 | #include <linux/pm_runtime.h> |
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| 15 | 16 | #include <linux/serial_8250.h> |
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| 16 | 17 | #include <linux/serial_reg.h> |
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| 18 | +#include <linux/console.h> |
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| 19 | +#include <linux/dma-mapping.h> |
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| 20 | +#include <linux/tty.h> |
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| 21 | +#include <linux/tty_flip.h> |
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| 17 | 22 | |
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| 18 | 23 | #include "8250.h" |
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| 19 | 24 | |
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| 20 | | -#define UART_MTK_HIGHS 0x09 /* Highspeed register */ |
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| 21 | | -#define UART_MTK_SAMPLE_COUNT 0x0a /* Sample count register */ |
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| 22 | | -#define UART_MTK_SAMPLE_POINT 0x0b /* Sample point register */ |
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| 25 | +#define MTK_UART_HIGHS 0x09 /* Highspeed register */ |
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| 26 | +#define MTK_UART_SAMPLE_COUNT 0x0a /* Sample count register */ |
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| 27 | +#define MTK_UART_SAMPLE_POINT 0x0b /* Sample point register */ |
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| 23 | 28 | #define MTK_UART_RATE_FIX 0x0d /* UART Rate Fix Register */ |
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| 29 | +#define MTK_UART_ESCAPE_DAT 0x10 /* Escape Character register */ |
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| 30 | +#define MTK_UART_ESCAPE_EN 0x11 /* Escape Enable register */ |
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| 31 | +#define MTK_UART_DMA_EN 0x13 /* DMA Enable register */ |
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| 32 | +#define MTK_UART_RXTRI_AD 0x14 /* RX Trigger address */ |
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| 33 | +#define MTK_UART_FRACDIV_L 0x15 /* Fractional divider LSB address */ |
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| 34 | +#define MTK_UART_FRACDIV_M 0x16 /* Fractional divider MSB address */ |
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| 35 | +#define MTK_UART_DEBUG0 0x18 |
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| 36 | +#define MTK_UART_IER_XOFFI 0x20 /* Enable XOFF character interrupt */ |
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| 37 | +#define MTK_UART_IER_RTSI 0x40 /* Enable RTS Modem status interrupt */ |
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| 38 | +#define MTK_UART_IER_CTSI 0x80 /* Enable CTS Modem status interrupt */ |
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| 39 | + |
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| 40 | +#define MTK_UART_EFR 38 /* I/O: Extended Features Register */ |
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| 41 | +#define MTK_UART_EFR_EN 0x10 /* Enable enhancement feature */ |
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| 42 | +#define MTK_UART_EFR_RTS 0x40 /* Enable hardware rx flow control */ |
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| 43 | +#define MTK_UART_EFR_CTS 0x80 /* Enable hardware tx flow control */ |
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| 44 | +#define MTK_UART_EFR_NO_SW_FC 0x0 /* no sw flow control */ |
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| 45 | +#define MTK_UART_EFR_XON1_XOFF1 0xa /* XON1/XOFF1 as sw flow control */ |
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| 46 | +#define MTK_UART_EFR_XON2_XOFF2 0x5 /* XON2/XOFF2 as sw flow control */ |
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| 47 | +#define MTK_UART_EFR_SW_FC_MASK 0xf /* Enable CTS Modem status interrupt */ |
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| 48 | +#define MTK_UART_EFR_HW_FC (MTK_UART_EFR_RTS | MTK_UART_EFR_CTS) |
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| 49 | +#define MTK_UART_DMA_EN_TX 0x2 |
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| 50 | +#define MTK_UART_DMA_EN_RX 0x5 |
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| 51 | + |
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| 52 | +#define MTK_UART_ESCAPE_CHAR 0x77 /* Escape char added under sw fc */ |
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| 53 | +#define MTK_UART_RX_SIZE 0x8000 |
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| 54 | +#define MTK_UART_TX_TRIGGER 1 |
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| 55 | +#define MTK_UART_RX_TRIGGER MTK_UART_RX_SIZE |
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| 56 | + |
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| 57 | +#define MTK_UART_XON1 40 /* I/O: Xon character 1 */ |
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| 58 | +#define MTK_UART_XOFF1 42 /* I/O: Xoff character 1 */ |
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| 59 | + |
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| 60 | +#ifdef CONFIG_SERIAL_8250_DMA |
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| 61 | +enum dma_rx_status { |
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| 62 | + DMA_RX_START = 0, |
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| 63 | + DMA_RX_RUNNING = 1, |
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| 64 | + DMA_RX_SHUTDOWN = 2, |
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| 65 | +}; |
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| 66 | +#endif |
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| 24 | 67 | |
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| 25 | 68 | struct mtk8250_data { |
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| 26 | 69 | int line; |
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| 70 | + unsigned int rx_pos; |
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| 71 | + unsigned int clk_count; |
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| 27 | 72 | struct clk *uart_clk; |
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| 28 | 73 | struct clk *bus_clk; |
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| 74 | + struct uart_8250_dma *dma; |
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| 75 | +#ifdef CONFIG_SERIAL_8250_DMA |
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| 76 | + enum dma_rx_status rx_status; |
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| 77 | +#endif |
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| 78 | + int rx_wakeup_irq; |
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| 29 | 79 | }; |
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| 80 | + |
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| 81 | +/* flow control mode */ |
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| 82 | +enum { |
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| 83 | + MTK_UART_FC_NONE, |
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| 84 | + MTK_UART_FC_SW, |
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| 85 | + MTK_UART_FC_HW, |
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| 86 | +}; |
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| 87 | + |
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| 88 | +#ifdef CONFIG_SERIAL_8250_DMA |
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| 89 | +static void mtk8250_rx_dma(struct uart_8250_port *up); |
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| 90 | + |
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| 91 | +static void mtk8250_dma_rx_complete(void *param) |
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| 92 | +{ |
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| 93 | + struct uart_8250_port *up = param; |
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| 94 | + struct uart_8250_dma *dma = up->dma; |
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| 95 | + struct mtk8250_data *data = up->port.private_data; |
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| 96 | + struct tty_port *tty_port = &up->port.state->port; |
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| 97 | + struct dma_tx_state state; |
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| 98 | + int copied, total, cnt; |
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| 99 | + unsigned char *ptr; |
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| 100 | + unsigned long flags; |
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| 101 | + |
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| 102 | + if (data->rx_status == DMA_RX_SHUTDOWN) |
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| 103 | + return; |
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| 104 | + |
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| 105 | + spin_lock_irqsave(&up->port.lock, flags); |
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| 106 | + |
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| 107 | + dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); |
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| 108 | + total = dma->rx_size - state.residue; |
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| 109 | + cnt = total; |
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| 110 | + |
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| 111 | + if ((data->rx_pos + cnt) > dma->rx_size) |
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| 112 | + cnt = dma->rx_size - data->rx_pos; |
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| 113 | + |
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| 114 | + ptr = (unsigned char *)(data->rx_pos + dma->rx_buf); |
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| 115 | + copied = tty_insert_flip_string(tty_port, ptr, cnt); |
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| 116 | + data->rx_pos += cnt; |
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| 117 | + |
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| 118 | + if (total > cnt) { |
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| 119 | + ptr = (unsigned char *)(dma->rx_buf); |
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| 120 | + cnt = total - cnt; |
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| 121 | + copied += tty_insert_flip_string(tty_port, ptr, cnt); |
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| 122 | + data->rx_pos = cnt; |
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| 123 | + } |
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| 124 | + |
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| 125 | + up->port.icount.rx += copied; |
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| 126 | + |
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| 127 | + tty_flip_buffer_push(tty_port); |
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| 128 | + |
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| 129 | + mtk8250_rx_dma(up); |
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| 130 | + |
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| 131 | + spin_unlock_irqrestore(&up->port.lock, flags); |
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| 132 | +} |
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| 133 | + |
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| 134 | +static void mtk8250_rx_dma(struct uart_8250_port *up) |
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| 135 | +{ |
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| 136 | + struct uart_8250_dma *dma = up->dma; |
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| 137 | + struct dma_async_tx_descriptor *desc; |
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| 138 | + |
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| 139 | + desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr, |
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| 140 | + dma->rx_size, DMA_DEV_TO_MEM, |
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| 141 | + DMA_PREP_INTERRUPT | DMA_CTRL_ACK); |
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| 142 | + if (!desc) { |
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| 143 | + pr_err("failed to prepare rx slave single\n"); |
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| 144 | + return; |
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| 145 | + } |
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| 146 | + |
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| 147 | + desc->callback = mtk8250_dma_rx_complete; |
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| 148 | + desc->callback_param = up; |
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| 149 | + |
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| 150 | + dma->rx_cookie = dmaengine_submit(desc); |
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| 151 | + |
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| 152 | + dma_async_issue_pending(dma->rxchan); |
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| 153 | +} |
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| 154 | + |
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| 155 | +static void mtk8250_dma_enable(struct uart_8250_port *up) |
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| 156 | +{ |
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| 157 | + struct uart_8250_dma *dma = up->dma; |
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| 158 | + struct mtk8250_data *data = up->port.private_data; |
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| 159 | + int lcr = serial_in(up, UART_LCR); |
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| 160 | + |
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| 161 | + if (data->rx_status != DMA_RX_START) |
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| 162 | + return; |
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| 163 | + |
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| 164 | + dma->rxconf.src_port_window_size = dma->rx_size; |
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| 165 | + dma->rxconf.src_addr = dma->rx_addr; |
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| 166 | + |
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| 167 | + dma->txconf.dst_port_window_size = UART_XMIT_SIZE; |
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| 168 | + dma->txconf.dst_addr = dma->tx_addr; |
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| 169 | + |
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| 170 | + serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | |
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| 171 | + UART_FCR_CLEAR_XMIT); |
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| 172 | + serial_out(up, MTK_UART_DMA_EN, |
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| 173 | + MTK_UART_DMA_EN_RX | MTK_UART_DMA_EN_TX); |
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| 174 | + |
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| 175 | + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); |
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| 176 | + serial_out(up, MTK_UART_EFR, UART_EFR_ECB); |
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| 177 | + serial_out(up, UART_LCR, lcr); |
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| 178 | + |
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| 179 | + if (dmaengine_slave_config(dma->rxchan, &dma->rxconf) != 0) |
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| 180 | + pr_err("failed to configure rx dma channel\n"); |
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| 181 | + if (dmaengine_slave_config(dma->txchan, &dma->txconf) != 0) |
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| 182 | + pr_err("failed to configure tx dma channel\n"); |
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| 183 | + |
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| 184 | + data->rx_status = DMA_RX_RUNNING; |
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| 185 | + data->rx_pos = 0; |
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| 186 | + mtk8250_rx_dma(up); |
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| 187 | +} |
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| 188 | +#endif |
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| 189 | + |
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| 190 | +static int mtk8250_startup(struct uart_port *port) |
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| 191 | +{ |
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| 192 | +#ifdef CONFIG_SERIAL_8250_DMA |
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| 193 | + struct uart_8250_port *up = up_to_u8250p(port); |
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| 194 | + struct mtk8250_data *data = port->private_data; |
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| 195 | + |
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| 196 | + /* disable DMA for console */ |
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| 197 | + if (uart_console(port)) |
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| 198 | + up->dma = NULL; |
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| 199 | + |
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| 200 | + if (up->dma) { |
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| 201 | + data->rx_status = DMA_RX_START; |
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| 202 | + uart_circ_clear(&port->state->xmit); |
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| 203 | + } |
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| 204 | +#endif |
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| 205 | + memset(&port->icount, 0, sizeof(port->icount)); |
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| 206 | + |
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| 207 | + return serial8250_do_startup(port); |
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| 208 | +} |
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| 209 | + |
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| 210 | +static void mtk8250_shutdown(struct uart_port *port) |
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| 211 | +{ |
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| 212 | +#ifdef CONFIG_SERIAL_8250_DMA |
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| 213 | + struct uart_8250_port *up = up_to_u8250p(port); |
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| 214 | + struct mtk8250_data *data = port->private_data; |
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| 215 | + |
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| 216 | + if (up->dma) |
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| 217 | + data->rx_status = DMA_RX_SHUTDOWN; |
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| 218 | +#endif |
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| 219 | + |
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| 220 | + return serial8250_do_shutdown(port); |
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| 221 | +} |
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| 222 | + |
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| 223 | +static void mtk8250_disable_intrs(struct uart_8250_port *up, int mask) |
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| 224 | +{ |
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| 225 | + serial_out(up, UART_IER, serial_in(up, UART_IER) & (~mask)); |
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| 226 | +} |
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| 227 | + |
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| 228 | +static void mtk8250_enable_intrs(struct uart_8250_port *up, int mask) |
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| 229 | +{ |
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| 230 | + serial_out(up, UART_IER, serial_in(up, UART_IER) | mask); |
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| 231 | +} |
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| 232 | + |
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| 233 | +static void mtk8250_set_flow_ctrl(struct uart_8250_port *up, int mode) |
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| 234 | +{ |
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| 235 | + struct uart_port *port = &up->port; |
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| 236 | + int lcr = serial_in(up, UART_LCR); |
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| 237 | + |
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| 238 | + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); |
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| 239 | + serial_out(up, MTK_UART_EFR, UART_EFR_ECB); |
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| 240 | + serial_out(up, UART_LCR, lcr); |
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| 241 | + lcr = serial_in(up, UART_LCR); |
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| 242 | + |
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| 243 | + switch (mode) { |
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| 244 | + case MTK_UART_FC_NONE: |
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| 245 | + serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR); |
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| 246 | + serial_out(up, MTK_UART_ESCAPE_EN, 0x00); |
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| 247 | + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); |
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| 248 | + serial_out(up, MTK_UART_EFR, serial_in(up, MTK_UART_EFR) & |
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| 249 | + (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK))); |
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| 250 | + serial_out(up, UART_LCR, lcr); |
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| 251 | + mtk8250_disable_intrs(up, MTK_UART_IER_XOFFI | |
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| 252 | + MTK_UART_IER_RTSI | MTK_UART_IER_CTSI); |
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| 253 | + break; |
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| 254 | + |
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| 255 | + case MTK_UART_FC_HW: |
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| 256 | + serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR); |
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| 257 | + serial_out(up, MTK_UART_ESCAPE_EN, 0x00); |
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| 258 | + serial_out(up, UART_MCR, UART_MCR_RTS); |
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| 259 | + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); |
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| 260 | + |
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| 261 | + /*enable hw flow control*/ |
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| 262 | + serial_out(up, MTK_UART_EFR, MTK_UART_EFR_HW_FC | |
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| 263 | + (serial_in(up, MTK_UART_EFR) & |
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| 264 | + (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK)))); |
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| 265 | + |
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| 266 | + serial_out(up, UART_LCR, lcr); |
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| 267 | + mtk8250_disable_intrs(up, MTK_UART_IER_XOFFI); |
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| 268 | + mtk8250_enable_intrs(up, MTK_UART_IER_CTSI | MTK_UART_IER_RTSI); |
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| 269 | + break; |
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| 270 | + |
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| 271 | + case MTK_UART_FC_SW: /*MTK software flow control */ |
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| 272 | + serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR); |
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| 273 | + serial_out(up, MTK_UART_ESCAPE_EN, 0x01); |
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| 274 | + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); |
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| 275 | + |
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| 276 | + /*enable sw flow control */ |
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| 277 | + serial_out(up, MTK_UART_EFR, MTK_UART_EFR_XON1_XOFF1 | |
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| 278 | + (serial_in(up, MTK_UART_EFR) & |
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| 279 | + (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK)))); |
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| 280 | + |
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| 281 | + serial_out(up, MTK_UART_XON1, START_CHAR(port->state->port.tty)); |
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| 282 | + serial_out(up, MTK_UART_XOFF1, STOP_CHAR(port->state->port.tty)); |
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| 283 | + serial_out(up, UART_LCR, lcr); |
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| 284 | + mtk8250_disable_intrs(up, MTK_UART_IER_CTSI|MTK_UART_IER_RTSI); |
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| 285 | + mtk8250_enable_intrs(up, MTK_UART_IER_XOFFI); |
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| 286 | + break; |
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| 287 | + default: |
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| 288 | + break; |
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| 289 | + } |
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| 290 | +} |
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| 30 | 291 | |
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| 31 | 292 | static void |
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| 32 | 293 | mtk8250_set_termios(struct uart_port *port, struct ktermios *termios, |
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| 33 | 294 | struct ktermios *old) |
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| 34 | 295 | { |
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| 296 | + unsigned short fraction_L_mapping[] = { |
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| 297 | + 0, 1, 0x5, 0x15, 0x55, 0x57, 0x57, 0x77, 0x7F, 0xFF, 0xFF |
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| 298 | + }; |
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| 299 | + unsigned short fraction_M_mapping[] = { |
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| 300 | + 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 3 |
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| 301 | + }; |
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| 35 | 302 | struct uart_8250_port *up = up_to_u8250p(port); |
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| 303 | + unsigned int baud, quot, fraction; |
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| 36 | 304 | unsigned long flags; |
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| 37 | | - unsigned int baud, quot; |
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| 305 | + int mode; |
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| 306 | + |
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| 307 | +#ifdef CONFIG_SERIAL_8250_DMA |
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| 308 | + if (up->dma) { |
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| 309 | + if (uart_console(port)) { |
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| 310 | + devm_kfree(up->port.dev, up->dma); |
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| 311 | + up->dma = NULL; |
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| 312 | + } else { |
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| 313 | + mtk8250_dma_enable(up); |
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| 314 | + } |
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| 315 | + } |
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| 316 | +#endif |
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| 38 | 317 | |
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| 39 | 318 | /* |
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| 40 | 319 | * Store the requested baud rate before calling the generic 8250 |
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| .. | .. |
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| 52 | 331 | tty_termios_encode_baud_rate(termios, baud, baud); |
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| 53 | 332 | |
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| 54 | 333 | /* |
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| 55 | | - * Mediatek UARTs use an extra highspeed register (UART_MTK_HIGHS) |
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| 334 | + * Mediatek UARTs use an extra highspeed register (MTK_UART_HIGHS) |
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| 56 | 335 | * |
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| 57 | 336 | * We need to recalcualte the quot register, as the claculation depends |
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| 58 | 337 | * on the vaule in the highspeed register. |
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| .. | .. |
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| 68 | 347 | port->uartclk / 16 / UART_DIV_MAX, |
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| 69 | 348 | port->uartclk); |
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| 70 | 349 | |
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| 71 | | - if (baud <= 115200) { |
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| 72 | | - serial_port_out(port, UART_MTK_HIGHS, 0x0); |
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| 350 | + if (baud < 115200) { |
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| 351 | + serial_port_out(port, MTK_UART_HIGHS, 0x0); |
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| 73 | 352 | quot = uart_get_divisor(port, baud); |
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| 74 | | - } else if (baud <= 576000) { |
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| 75 | | - serial_port_out(port, UART_MTK_HIGHS, 0x2); |
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| 76 | | - |
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| 77 | | - /* Set to next lower baudrate supported */ |
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| 78 | | - if ((baud == 500000) || (baud == 576000)) |
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| 79 | | - baud = 460800; |
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| 80 | | - quot = DIV_ROUND_UP(port->uartclk, 4 * baud); |
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| 81 | 353 | } else { |
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| 82 | | - serial_port_out(port, UART_MTK_HIGHS, 0x3); |
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| 354 | + serial_port_out(port, MTK_UART_HIGHS, 0x3); |
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| 83 | 355 | quot = DIV_ROUND_UP(port->uartclk, 256 * baud); |
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| 84 | 356 | } |
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| 85 | 357 | |
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| .. | .. |
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| 101 | 373 | /* reset DLAB */ |
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| 102 | 374 | serial_port_out(port, UART_LCR, up->lcr); |
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| 103 | 375 | |
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| 104 | | - if (baud > 460800) { |
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| 376 | + if (baud >= 115200) { |
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| 105 | 377 | unsigned int tmp; |
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| 106 | 378 | |
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| 107 | | - tmp = DIV_ROUND_CLOSEST(port->uartclk, quot * baud); |
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| 108 | | - serial_port_out(port, UART_MTK_SAMPLE_COUNT, tmp - 1); |
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| 109 | | - serial_port_out(port, UART_MTK_SAMPLE_POINT, |
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| 110 | | - (tmp - 2) >> 1); |
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| 379 | + tmp = (port->uartclk / (baud * quot)) - 1; |
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| 380 | + serial_port_out(port, MTK_UART_SAMPLE_COUNT, tmp); |
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| 381 | + serial_port_out(port, MTK_UART_SAMPLE_POINT, |
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| 382 | + (tmp >> 1) - 1); |
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| 383 | + |
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| 384 | + /*count fraction to set fractoin register */ |
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| 385 | + fraction = ((port->uartclk * 100) / baud / quot) % 100; |
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| 386 | + fraction = DIV_ROUND_CLOSEST(fraction, 10); |
|---|
| 387 | + serial_port_out(port, MTK_UART_FRACDIV_L, |
|---|
| 388 | + fraction_L_mapping[fraction]); |
|---|
| 389 | + serial_port_out(port, MTK_UART_FRACDIV_M, |
|---|
| 390 | + fraction_M_mapping[fraction]); |
|---|
| 111 | 391 | } else { |
|---|
| 112 | | - serial_port_out(port, UART_MTK_SAMPLE_COUNT, 0x00); |
|---|
| 113 | | - serial_port_out(port, UART_MTK_SAMPLE_POINT, 0xff); |
|---|
| 392 | + serial_port_out(port, MTK_UART_SAMPLE_COUNT, 0x00); |
|---|
| 393 | + serial_port_out(port, MTK_UART_SAMPLE_POINT, 0xff); |
|---|
| 394 | + serial_port_out(port, MTK_UART_FRACDIV_L, 0x00); |
|---|
| 395 | + serial_port_out(port, MTK_UART_FRACDIV_M, 0x00); |
|---|
| 114 | 396 | } |
|---|
| 397 | + |
|---|
| 398 | + if ((termios->c_cflag & CRTSCTS) && (!(termios->c_iflag & CRTSCTS))) |
|---|
| 399 | + mode = MTK_UART_FC_HW; |
|---|
| 400 | + else if (termios->c_iflag & CRTSCTS) |
|---|
| 401 | + mode = MTK_UART_FC_SW; |
|---|
| 402 | + else |
|---|
| 403 | + mode = MTK_UART_FC_NONE; |
|---|
| 404 | + |
|---|
| 405 | + mtk8250_set_flow_ctrl(up, mode); |
|---|
| 406 | + |
|---|
| 407 | + if (uart_console(port)) |
|---|
| 408 | + up->port.cons->cflag = termios->c_cflag; |
|---|
| 115 | 409 | |
|---|
| 116 | 410 | spin_unlock_irqrestore(&port->lock, flags); |
|---|
| 117 | 411 | /* Don't rewrite B0 */ |
|---|
| .. | .. |
|---|
| 122 | 416 | static int __maybe_unused mtk8250_runtime_suspend(struct device *dev) |
|---|
| 123 | 417 | { |
|---|
| 124 | 418 | struct mtk8250_data *data = dev_get_drvdata(dev); |
|---|
| 419 | + struct uart_8250_port *up = serial8250_get_port(data->line); |
|---|
| 125 | 420 | |
|---|
| 126 | | - clk_disable_unprepare(data->uart_clk); |
|---|
| 127 | | - clk_disable_unprepare(data->bus_clk); |
|---|
| 421 | + /* wait until UART in idle status */ |
|---|
| 422 | + while |
|---|
| 423 | + (serial_in(up, MTK_UART_DEBUG0)); |
|---|
| 424 | + |
|---|
| 425 | + if (data->clk_count == 0U) { |
|---|
| 426 | + dev_dbg(dev, "%s clock count is 0\n", __func__); |
|---|
| 427 | + } else { |
|---|
| 428 | + clk_disable_unprepare(data->bus_clk); |
|---|
| 429 | + data->clk_count--; |
|---|
| 430 | + } |
|---|
| 128 | 431 | |
|---|
| 129 | 432 | return 0; |
|---|
| 130 | 433 | } |
|---|
| .. | .. |
|---|
| 134 | 437 | struct mtk8250_data *data = dev_get_drvdata(dev); |
|---|
| 135 | 438 | int err; |
|---|
| 136 | 439 | |
|---|
| 137 | | - err = clk_prepare_enable(data->uart_clk); |
|---|
| 138 | | - if (err) { |
|---|
| 139 | | - dev_warn(dev, "Can't enable clock\n"); |
|---|
| 140 | | - return err; |
|---|
| 141 | | - } |
|---|
| 142 | | - |
|---|
| 143 | | - err = clk_prepare_enable(data->bus_clk); |
|---|
| 144 | | - if (err) { |
|---|
| 145 | | - dev_warn(dev, "Can't enable bus clock\n"); |
|---|
| 146 | | - return err; |
|---|
| 440 | + if (data->clk_count > 0U) { |
|---|
| 441 | + dev_dbg(dev, "%s clock count is %d\n", __func__, |
|---|
| 442 | + data->clk_count); |
|---|
| 443 | + } else { |
|---|
| 444 | + err = clk_prepare_enable(data->bus_clk); |
|---|
| 445 | + if (err) { |
|---|
| 446 | + dev_warn(dev, "Can't enable bus clock\n"); |
|---|
| 447 | + return err; |
|---|
| 448 | + } |
|---|
| 449 | + data->clk_count++; |
|---|
| 147 | 450 | } |
|---|
| 148 | 451 | |
|---|
| 149 | 452 | return 0; |
|---|
| .. | .. |
|---|
| 153 | 456 | mtk8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old) |
|---|
| 154 | 457 | { |
|---|
| 155 | 458 | if (!state) |
|---|
| 156 | | - pm_runtime_get_sync(port->dev); |
|---|
| 459 | + if (!mtk8250_runtime_resume(port->dev)) |
|---|
| 460 | + pm_runtime_get_sync(port->dev); |
|---|
| 157 | 461 | |
|---|
| 158 | 462 | serial8250_do_pm(port, state, old); |
|---|
| 159 | 463 | |
|---|
| 160 | 464 | if (state) |
|---|
| 161 | | - pm_runtime_put_sync_suspend(port->dev); |
|---|
| 465 | + if (!pm_runtime_put_sync_suspend(port->dev)) |
|---|
| 466 | + mtk8250_runtime_suspend(port->dev); |
|---|
| 162 | 467 | } |
|---|
| 468 | + |
|---|
| 469 | +#ifdef CONFIG_SERIAL_8250_DMA |
|---|
| 470 | +static bool mtk8250_dma_filter(struct dma_chan *chan, void *param) |
|---|
| 471 | +{ |
|---|
| 472 | + return false; |
|---|
| 473 | +} |
|---|
| 474 | +#endif |
|---|
| 163 | 475 | |
|---|
| 164 | 476 | static int mtk8250_probe_of(struct platform_device *pdev, struct uart_port *p, |
|---|
| 165 | 477 | struct mtk8250_data *data) |
|---|
| 166 | 478 | { |
|---|
| 479 | +#ifdef CONFIG_SERIAL_8250_DMA |
|---|
| 480 | + int dmacnt; |
|---|
| 481 | +#endif |
|---|
| 482 | + |
|---|
| 167 | 483 | data->uart_clk = devm_clk_get(&pdev->dev, "baud"); |
|---|
| 168 | 484 | if (IS_ERR(data->uart_clk)) { |
|---|
| 169 | 485 | /* |
|---|
| .. | .. |
|---|
| 180 | 496 | } |
|---|
| 181 | 497 | |
|---|
| 182 | 498 | data->bus_clk = devm_clk_get(&pdev->dev, "bus"); |
|---|
| 183 | | - return PTR_ERR_OR_ZERO(data->bus_clk); |
|---|
| 499 | + if (IS_ERR(data->bus_clk)) |
|---|
| 500 | + return PTR_ERR(data->bus_clk); |
|---|
| 501 | + |
|---|
| 502 | + data->dma = NULL; |
|---|
| 503 | +#ifdef CONFIG_SERIAL_8250_DMA |
|---|
| 504 | + dmacnt = of_property_count_strings(pdev->dev.of_node, "dma-names"); |
|---|
| 505 | + if (dmacnt == 2) { |
|---|
| 506 | + data->dma = devm_kzalloc(&pdev->dev, sizeof(*data->dma), |
|---|
| 507 | + GFP_KERNEL); |
|---|
| 508 | + if (!data->dma) |
|---|
| 509 | + return -ENOMEM; |
|---|
| 510 | + |
|---|
| 511 | + data->dma->fn = mtk8250_dma_filter; |
|---|
| 512 | + data->dma->rx_size = MTK_UART_RX_SIZE; |
|---|
| 513 | + data->dma->rxconf.src_maxburst = MTK_UART_RX_TRIGGER; |
|---|
| 514 | + data->dma->txconf.dst_maxburst = MTK_UART_TX_TRIGGER; |
|---|
| 515 | + } |
|---|
| 516 | +#endif |
|---|
| 517 | + |
|---|
| 518 | + return 0; |
|---|
| 184 | 519 | } |
|---|
| 185 | 520 | |
|---|
| 186 | 521 | static int mtk8250_probe(struct platform_device *pdev) |
|---|
| 187 | 522 | { |
|---|
| 188 | 523 | struct uart_8250_port uart = {}; |
|---|
| 189 | | - struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
|---|
| 190 | | - struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
|---|
| 191 | 524 | struct mtk8250_data *data; |
|---|
| 192 | | - int err; |
|---|
| 525 | + struct resource *regs; |
|---|
| 526 | + int irq, err; |
|---|
| 193 | 527 | |
|---|
| 194 | | - if (!regs || !irq) { |
|---|
| 195 | | - dev_err(&pdev->dev, "no registers/irq defined\n"); |
|---|
| 528 | + irq = platform_get_irq(pdev, 0); |
|---|
| 529 | + if (irq < 0) |
|---|
| 530 | + return irq; |
|---|
| 531 | + |
|---|
| 532 | + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
|---|
| 533 | + if (!regs) { |
|---|
| 534 | + dev_err(&pdev->dev, "no registers defined\n"); |
|---|
| 196 | 535 | return -EINVAL; |
|---|
| 197 | 536 | } |
|---|
| 198 | 537 | |
|---|
| .. | .. |
|---|
| 205 | 544 | if (!data) |
|---|
| 206 | 545 | return -ENOMEM; |
|---|
| 207 | 546 | |
|---|
| 547 | + data->clk_count = 0; |
|---|
| 548 | + |
|---|
| 208 | 549 | if (pdev->dev.of_node) { |
|---|
| 209 | 550 | err = mtk8250_probe_of(pdev, &uart.port, data); |
|---|
| 210 | 551 | if (err) |
|---|
| .. | .. |
|---|
| 214 | 555 | |
|---|
| 215 | 556 | spin_lock_init(&uart.port.lock); |
|---|
| 216 | 557 | uart.port.mapbase = regs->start; |
|---|
| 217 | | - uart.port.irq = irq->start; |
|---|
| 558 | + uart.port.irq = irq; |
|---|
| 218 | 559 | uart.port.pm = mtk8250_do_pm; |
|---|
| 219 | 560 | uart.port.type = PORT_16550; |
|---|
| 220 | 561 | uart.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT; |
|---|
| .. | .. |
|---|
| 222 | 563 | uart.port.iotype = UPIO_MEM32; |
|---|
| 223 | 564 | uart.port.regshift = 2; |
|---|
| 224 | 565 | uart.port.private_data = data; |
|---|
| 566 | + uart.port.shutdown = mtk8250_shutdown; |
|---|
| 567 | + uart.port.startup = mtk8250_startup; |
|---|
| 225 | 568 | uart.port.set_termios = mtk8250_set_termios; |
|---|
| 226 | 569 | uart.port.uartclk = clk_get_rate(data->uart_clk); |
|---|
| 570 | +#ifdef CONFIG_SERIAL_8250_DMA |
|---|
| 571 | + if (data->dma) |
|---|
| 572 | + uart.dma = data->dma; |
|---|
| 573 | +#endif |
|---|
| 227 | 574 | |
|---|
| 228 | 575 | /* Disable Rate Fix function */ |
|---|
| 229 | 576 | writel(0x0, uart.port.membase + |
|---|
| .. | .. |
|---|
| 231 | 578 | |
|---|
| 232 | 579 | platform_set_drvdata(pdev, data); |
|---|
| 233 | 580 | |
|---|
| 581 | + pm_runtime_enable(&pdev->dev); |
|---|
| 234 | 582 | err = mtk8250_runtime_resume(&pdev->dev); |
|---|
| 235 | 583 | if (err) |
|---|
| 236 | | - return err; |
|---|
| 584 | + goto err_pm_disable; |
|---|
| 237 | 585 | |
|---|
| 238 | 586 | data->line = serial8250_register_8250_port(&uart); |
|---|
| 239 | | - if (data->line < 0) |
|---|
| 240 | | - return data->line; |
|---|
| 587 | + if (data->line < 0) { |
|---|
| 588 | + err = data->line; |
|---|
| 589 | + goto err_pm_disable; |
|---|
| 590 | + } |
|---|
| 241 | 591 | |
|---|
| 242 | | - pm_runtime_set_active(&pdev->dev); |
|---|
| 243 | | - pm_runtime_enable(&pdev->dev); |
|---|
| 592 | + data->rx_wakeup_irq = platform_get_irq_optional(pdev, 1); |
|---|
| 244 | 593 | |
|---|
| 245 | 594 | return 0; |
|---|
| 595 | + |
|---|
| 596 | +err_pm_disable: |
|---|
| 597 | + pm_runtime_disable(&pdev->dev); |
|---|
| 598 | + |
|---|
| 599 | + return err; |
|---|
| 246 | 600 | } |
|---|
| 247 | 601 | |
|---|
| 248 | 602 | static int mtk8250_remove(struct platform_device *pdev) |
|---|
| .. | .. |
|---|
| 252 | 606 | pm_runtime_get_sync(&pdev->dev); |
|---|
| 253 | 607 | |
|---|
| 254 | 608 | serial8250_unregister_port(data->line); |
|---|
| 255 | | - mtk8250_runtime_suspend(&pdev->dev); |
|---|
| 256 | 609 | |
|---|
| 257 | 610 | pm_runtime_disable(&pdev->dev); |
|---|
| 258 | 611 | pm_runtime_put_noidle(&pdev->dev); |
|---|
| 612 | + |
|---|
| 613 | + if (!pm_runtime_status_suspended(&pdev->dev)) |
|---|
| 614 | + mtk8250_runtime_suspend(&pdev->dev); |
|---|
| 259 | 615 | |
|---|
| 260 | 616 | return 0; |
|---|
| 261 | 617 | } |
|---|
| .. | .. |
|---|
| 263 | 619 | static int __maybe_unused mtk8250_suspend(struct device *dev) |
|---|
| 264 | 620 | { |
|---|
| 265 | 621 | struct mtk8250_data *data = dev_get_drvdata(dev); |
|---|
| 622 | + int irq = data->rx_wakeup_irq; |
|---|
| 623 | + int err; |
|---|
| 266 | 624 | |
|---|
| 267 | 625 | serial8250_suspend_port(data->line); |
|---|
| 626 | + |
|---|
| 627 | + pinctrl_pm_select_sleep_state(dev); |
|---|
| 628 | + if (irq >= 0) { |
|---|
| 629 | + err = enable_irq_wake(irq); |
|---|
| 630 | + if (err) { |
|---|
| 631 | + dev_err(dev, |
|---|
| 632 | + "failed to enable irq wake on IRQ %d: %d\n", |
|---|
| 633 | + irq, err); |
|---|
| 634 | + pinctrl_pm_select_default_state(dev); |
|---|
| 635 | + serial8250_resume_port(data->line); |
|---|
| 636 | + return err; |
|---|
| 637 | + } |
|---|
| 638 | + } |
|---|
| 268 | 639 | |
|---|
| 269 | 640 | return 0; |
|---|
| 270 | 641 | } |
|---|
| .. | .. |
|---|
| 272 | 643 | static int __maybe_unused mtk8250_resume(struct device *dev) |
|---|
| 273 | 644 | { |
|---|
| 274 | 645 | struct mtk8250_data *data = dev_get_drvdata(dev); |
|---|
| 646 | + int irq = data->rx_wakeup_irq; |
|---|
| 647 | + |
|---|
| 648 | + if (irq >= 0) |
|---|
| 649 | + disable_irq_wake(irq); |
|---|
| 650 | + pinctrl_pm_select_default_state(dev); |
|---|
| 275 | 651 | |
|---|
| 276 | 652 | serial8250_resume_port(data->line); |
|---|
| 277 | 653 | |
|---|
| .. | .. |
|---|
| 309 | 685 | return -ENODEV; |
|---|
| 310 | 686 | |
|---|
| 311 | 687 | device->port.iotype = UPIO_MEM32; |
|---|
| 688 | + device->port.regshift = 2; |
|---|
| 312 | 689 | |
|---|
| 313 | 690 | return early_serial8250_setup(device, NULL); |
|---|
| 314 | 691 | } |
|---|