disable FB

hc

2024-01-04 1543e317f1da31b75942316931e8f491a8920811

 kernel/drivers/thermal/tegra/soctherm.h
..
..
@@ -1,3 +1,4 @@
1
+/* SPDX-License-Identifier: GPL-2.0 */
1
2
 /*
2
3
  * Copyright (c) 2014-2016, NVIDIA CORPORATION.  All rights reserved.
3
4
  *
..
..
@@ -28,6 +29,14 @@
28
29
 
29
30
 #define THERMCTL_THERMTRIP_CTL			0x80
30
31
 /* BITs are defined in device file */
32
+
33
+#define THERMCTL_INTR_ENABLE			0x88
34
+#define THERMCTL_INTR_DISABLE			0x8c
35
+#define TH_INTR_UP_DN_EN			0x3
36
+#define THERM_IRQ_MEM_MASK			(TH_INTR_UP_DN_EN << 24)
37
+#define THERM_IRQ_GPU_MASK			(TH_INTR_UP_DN_EN << 16)
38
+#define THERM_IRQ_CPU_MASK			(TH_INTR_UP_DN_EN << 8)
39
+#define THERM_IRQ_TSENSE_MASK			(TH_INTR_UP_DN_EN << 0)
31
40
 
32
41
 #define SENSOR_PDIV				0x1c0
33
42
 #define SENSOR_PDIV_CPU_MASK			(0xf << 12)
..
..
@@ -70,6 +79,7 @@
70
79
 	u32 thermtrip_enable_mask;
71
80
 	u32 thermtrip_any_en_mask;
72
81
 	u32 thermtrip_threshold_mask;
82
+	u32 thermctl_isr_mask;
73
83
 	u16 thermctl_lvl0_offset;
74
84
 	u32 thermctl_lvl0_up_thresh_mask;
75
85
 	u32 thermctl_lvl0_dn_thresh_mask;
..
..
@@ -90,6 +100,11 @@
90
100
 	 */
91
101
 	const s32 fuse_corr_alpha, fuse_corr_beta;
92
102
 	const struct tegra_tsensor_group *group;
103
+};
104
+
105
+struct tsensor_group_thermtrips {
106
+	u8 id;
107
+	u32 temp;
93
108
 };
94
109
 
95
110
 struct tegra_soctherm_fuse {
..
..
@@ -113,6 +128,7 @@
113
128
 	const int thresh_grain;
114
129
 	const unsigned int bptt;
115
130
 	const bool use_ccroc;
131
+	struct tsensor_group_thermtrips *thermtrips;
116
132
 };
117
133
 
118
134
 int tegra_calc_shared_calib(const struct tegra_soctherm_fuse *tfuse,