| .. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0 |
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| 1 | 2 | /* |
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| 2 | 3 | * Copyright (c) 2015, The Linux Foundation. All rights reserved. |
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| 3 | | - * |
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| 4 | | - * This program is free software; you can redistribute it and/or modify |
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| 5 | | - * it under the terms of the GNU General Public License version 2 and |
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| 6 | | - * only version 2 as published by the Free Software Foundation. |
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| 7 | | - * |
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| 8 | | - * This program is distributed in the hope that it will be useful, |
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| 9 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 10 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 11 | | - * GNU General Public License for more details. |
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| 12 | | - * |
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| 13 | 4 | */ |
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| 14 | 5 | |
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| 15 | 6 | #include <linux/platform_device.h> |
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| .. | .. |
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| 65 | 56 | #define TRDY_MASK BIT(7) |
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| 66 | 57 | #define TIMEOUT_US 100 |
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| 67 | 58 | |
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| 68 | | -static int suspend_8960(struct tsens_device *tmdev) |
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| 59 | +static int suspend_8960(struct tsens_priv *priv) |
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| 69 | 60 | { |
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| 70 | 61 | int ret; |
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| 71 | 62 | unsigned int mask; |
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| 72 | | - struct regmap *map = tmdev->map; |
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| 63 | + struct regmap *map = priv->tm_map; |
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| 73 | 64 | |
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| 74 | | - ret = regmap_read(map, THRESHOLD_ADDR, &tmdev->ctx.threshold); |
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| 65 | + ret = regmap_read(map, THRESHOLD_ADDR, &priv->ctx.threshold); |
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| 75 | 66 | if (ret) |
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| 76 | 67 | return ret; |
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| 77 | 68 | |
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| 78 | | - ret = regmap_read(map, CNTL_ADDR, &tmdev->ctx.control); |
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| 69 | + ret = regmap_read(map, CNTL_ADDR, &priv->ctx.control); |
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| 79 | 70 | if (ret) |
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| 80 | 71 | return ret; |
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| 81 | 72 | |
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| 82 | | - if (tmdev->num_sensors > 1) |
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| 73 | + if (priv->num_sensors > 1) |
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| 83 | 74 | mask = SLP_CLK_ENA | EN; |
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| 84 | 75 | else |
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| 85 | 76 | mask = SLP_CLK_ENA_8660 | EN; |
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| .. | .. |
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| 91 | 82 | return 0; |
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| 92 | 83 | } |
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| 93 | 84 | |
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| 94 | | -static int resume_8960(struct tsens_device *tmdev) |
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| 85 | +static int resume_8960(struct tsens_priv *priv) |
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| 95 | 86 | { |
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| 96 | 87 | int ret; |
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| 97 | | - struct regmap *map = tmdev->map; |
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| 88 | + struct regmap *map = priv->tm_map; |
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| 98 | 89 | |
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| 99 | 90 | ret = regmap_update_bits(map, CNTL_ADDR, SW_RST, SW_RST); |
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| 100 | 91 | if (ret) |
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| .. | .. |
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| 104 | 95 | * Separate CONFIG restore is not needed only for 8660 as |
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| 105 | 96 | * config is part of CTRL Addr and its restored as such |
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| 106 | 97 | */ |
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| 107 | | - if (tmdev->num_sensors > 1) { |
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| 98 | + if (priv->num_sensors > 1) { |
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| 108 | 99 | ret = regmap_update_bits(map, CONFIG_ADDR, CONFIG_MASK, CONFIG); |
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| 109 | 100 | if (ret) |
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| 110 | 101 | return ret; |
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| 111 | 102 | } |
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| 112 | 103 | |
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| 113 | | - ret = regmap_write(map, THRESHOLD_ADDR, tmdev->ctx.threshold); |
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| 104 | + ret = regmap_write(map, THRESHOLD_ADDR, priv->ctx.threshold); |
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| 114 | 105 | if (ret) |
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| 115 | 106 | return ret; |
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| 116 | 107 | |
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| 117 | | - ret = regmap_write(map, CNTL_ADDR, tmdev->ctx.control); |
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| 108 | + ret = regmap_write(map, CNTL_ADDR, priv->ctx.control); |
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| 118 | 109 | if (ret) |
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| 119 | 110 | return ret; |
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| 120 | 111 | |
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| 121 | 112 | return 0; |
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| 122 | 113 | } |
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| 123 | 114 | |
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| 124 | | -static int enable_8960(struct tsens_device *tmdev, int id) |
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| 115 | +static int enable_8960(struct tsens_priv *priv, int id) |
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| 125 | 116 | { |
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| 126 | 117 | int ret; |
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| 127 | 118 | u32 reg, mask; |
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| 128 | 119 | |
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| 129 | | - ret = regmap_read(tmdev->map, CNTL_ADDR, ®); |
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| 120 | + ret = regmap_read(priv->tm_map, CNTL_ADDR, ®); |
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| 130 | 121 | if (ret) |
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| 131 | 122 | return ret; |
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| 132 | 123 | |
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| 133 | 124 | mask = BIT(id + SENSOR0_SHIFT); |
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| 134 | | - ret = regmap_write(tmdev->map, CNTL_ADDR, reg | SW_RST); |
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| 125 | + ret = regmap_write(priv->tm_map, CNTL_ADDR, reg | SW_RST); |
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| 135 | 126 | if (ret) |
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| 136 | 127 | return ret; |
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| 137 | 128 | |
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| 138 | | - if (tmdev->num_sensors > 1) |
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| 129 | + if (priv->num_sensors > 1) |
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| 139 | 130 | reg |= mask | SLP_CLK_ENA | EN; |
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| 140 | 131 | else |
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| 141 | 132 | reg |= mask | SLP_CLK_ENA_8660 | EN; |
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| 142 | 133 | |
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| 143 | | - ret = regmap_write(tmdev->map, CNTL_ADDR, reg); |
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| 134 | + ret = regmap_write(priv->tm_map, CNTL_ADDR, reg); |
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| 144 | 135 | if (ret) |
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| 145 | 136 | return ret; |
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| 146 | 137 | |
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| 147 | 138 | return 0; |
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| 148 | 139 | } |
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| 149 | 140 | |
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| 150 | | -static void disable_8960(struct tsens_device *tmdev) |
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| 141 | +static void disable_8960(struct tsens_priv *priv) |
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| 151 | 142 | { |
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| 152 | 143 | int ret; |
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| 153 | 144 | u32 reg_cntl; |
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| 154 | 145 | u32 mask; |
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| 155 | 146 | |
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| 156 | | - mask = GENMASK(tmdev->num_sensors - 1, 0); |
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| 147 | + mask = GENMASK(priv->num_sensors - 1, 0); |
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| 157 | 148 | mask <<= SENSOR0_SHIFT; |
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| 158 | 149 | mask |= EN; |
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| 159 | 150 | |
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| 160 | | - ret = regmap_read(tmdev->map, CNTL_ADDR, ®_cntl); |
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| 151 | + ret = regmap_read(priv->tm_map, CNTL_ADDR, ®_cntl); |
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| 161 | 152 | if (ret) |
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| 162 | 153 | return; |
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| 163 | 154 | |
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| 164 | 155 | reg_cntl &= ~mask; |
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| 165 | 156 | |
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| 166 | | - if (tmdev->num_sensors > 1) |
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| 157 | + if (priv->num_sensors > 1) |
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| 167 | 158 | reg_cntl &= ~SLP_CLK_ENA; |
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| 168 | 159 | else |
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| 169 | 160 | reg_cntl &= ~SLP_CLK_ENA_8660; |
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| 170 | 161 | |
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| 171 | | - regmap_write(tmdev->map, CNTL_ADDR, reg_cntl); |
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| 162 | + regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl); |
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| 172 | 163 | } |
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| 173 | 164 | |
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| 174 | | -static int init_8960(struct tsens_device *tmdev) |
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| 165 | +static int init_8960(struct tsens_priv *priv) |
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| 175 | 166 | { |
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| 176 | 167 | int ret, i; |
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| 177 | 168 | u32 reg_cntl; |
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| 178 | 169 | |
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| 179 | | - tmdev->map = dev_get_regmap(tmdev->dev, NULL); |
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| 180 | | - if (!tmdev->map) |
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| 170 | + priv->tm_map = dev_get_regmap(priv->dev, NULL); |
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| 171 | + if (!priv->tm_map) |
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| 181 | 172 | return -ENODEV; |
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| 182 | 173 | |
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| 183 | 174 | /* |
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| .. | .. |
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| 186 | 177 | * but the control registers stay in the same place, i.e |
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| 187 | 178 | * directly after the first 5 status registers. |
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| 188 | 179 | */ |
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| 189 | | - for (i = 0; i < tmdev->num_sensors; i++) { |
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| 180 | + for (i = 0; i < priv->num_sensors; i++) { |
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| 190 | 181 | if (i >= 5) |
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| 191 | | - tmdev->sensor[i].status = S0_STATUS_ADDR + 40; |
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| 192 | | - tmdev->sensor[i].status += i * 4; |
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| 182 | + priv->sensor[i].status = S0_STATUS_ADDR + 40; |
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| 183 | + priv->sensor[i].status += i * 4; |
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| 193 | 184 | } |
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| 194 | 185 | |
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| 195 | 186 | reg_cntl = SW_RST; |
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| 196 | | - ret = regmap_update_bits(tmdev->map, CNTL_ADDR, SW_RST, reg_cntl); |
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| 187 | + ret = regmap_update_bits(priv->tm_map, CNTL_ADDR, SW_RST, reg_cntl); |
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| 197 | 188 | if (ret) |
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| 198 | 189 | return ret; |
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| 199 | 190 | |
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| 200 | | - if (tmdev->num_sensors > 1) { |
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| 191 | + if (priv->num_sensors > 1) { |
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| 201 | 192 | reg_cntl |= SLP_CLK_ENA | (MEASURE_PERIOD << 18); |
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| 202 | 193 | reg_cntl &= ~SW_RST; |
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| 203 | | - ret = regmap_update_bits(tmdev->map, CONFIG_ADDR, |
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| 194 | + ret = regmap_update_bits(priv->tm_map, CONFIG_ADDR, |
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| 204 | 195 | CONFIG_MASK, CONFIG); |
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| 205 | 196 | } else { |
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| 206 | 197 | reg_cntl |= SLP_CLK_ENA_8660 | (MEASURE_PERIOD << 16); |
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| .. | .. |
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| 208 | 199 | reg_cntl |= CONFIG_8660 << CONFIG_SHIFT_8660; |
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| 209 | 200 | } |
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| 210 | 201 | |
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| 211 | | - reg_cntl |= GENMASK(tmdev->num_sensors - 1, 0) << SENSOR0_SHIFT; |
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| 212 | | - ret = regmap_write(tmdev->map, CNTL_ADDR, reg_cntl); |
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| 202 | + reg_cntl |= GENMASK(priv->num_sensors - 1, 0) << SENSOR0_SHIFT; |
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| 203 | + ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl); |
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| 213 | 204 | if (ret) |
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| 214 | 205 | return ret; |
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| 215 | 206 | |
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| 216 | 207 | reg_cntl |= EN; |
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| 217 | | - ret = regmap_write(tmdev->map, CNTL_ADDR, reg_cntl); |
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| 208 | + ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl); |
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| 218 | 209 | if (ret) |
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| 219 | 210 | return ret; |
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| 220 | 211 | |
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| 221 | 212 | return 0; |
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| 222 | 213 | } |
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| 223 | 214 | |
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| 224 | | -static int calibrate_8960(struct tsens_device *tmdev) |
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| 215 | +static int calibrate_8960(struct tsens_priv *priv) |
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| 225 | 216 | { |
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| 226 | 217 | int i; |
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| 227 | 218 | char *data; |
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| 228 | 219 | |
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| 229 | | - ssize_t num_read = tmdev->num_sensors; |
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| 230 | | - struct tsens_sensor *s = tmdev->sensor; |
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| 220 | + ssize_t num_read = priv->num_sensors; |
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| 221 | + struct tsens_sensor *s = priv->sensor; |
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| 231 | 222 | |
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| 232 | | - data = qfprom_read(tmdev->dev, "calib"); |
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| 223 | + data = qfprom_read(priv->dev, "calib"); |
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| 233 | 224 | if (IS_ERR(data)) |
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| 234 | | - data = qfprom_read(tmdev->dev, "calib_backup"); |
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| 225 | + data = qfprom_read(priv->dev, "calib_backup"); |
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| 235 | 226 | if (IS_ERR(data)) |
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| 236 | 227 | return PTR_ERR(data); |
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| 237 | 228 | |
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| 238 | 229 | for (i = 0; i < num_read; i++, s++) |
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| 239 | 230 | s->offset = data[i]; |
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| 231 | + |
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| 232 | + kfree(data); |
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| 240 | 233 | |
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| 241 | 234 | return 0; |
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| 242 | 235 | } |
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| .. | .. |
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| 252 | 245 | return adc_code * slope + offset; |
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| 253 | 246 | } |
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| 254 | 247 | |
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| 255 | | -static int get_temp_8960(struct tsens_device *tmdev, int id, int *temp) |
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| 248 | +static int get_temp_8960(const struct tsens_sensor *s, int *temp) |
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| 256 | 249 | { |
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| 257 | 250 | int ret; |
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| 258 | 251 | u32 code, trdy; |
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| 259 | | - const struct tsens_sensor *s = &tmdev->sensor[id]; |
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| 252 | + struct tsens_priv *priv = s->priv; |
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| 260 | 253 | unsigned long timeout; |
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| 261 | 254 | |
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| 262 | 255 | timeout = jiffies + usecs_to_jiffies(TIMEOUT_US); |
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| 263 | 256 | do { |
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| 264 | | - ret = regmap_read(tmdev->map, INT_STATUS_ADDR, &trdy); |
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| 257 | + ret = regmap_read(priv->tm_map, INT_STATUS_ADDR, &trdy); |
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| 265 | 258 | if (ret) |
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| 266 | 259 | return ret; |
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| 267 | 260 | if (!(trdy & TRDY_MASK)) |
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| 268 | 261 | continue; |
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| 269 | | - ret = regmap_read(tmdev->map, s->status, &code); |
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| 262 | + ret = regmap_read(priv->tm_map, s->status, &code); |
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| 270 | 263 | if (ret) |
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| 271 | 264 | return ret; |
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| 272 | 265 | *temp = code_to_mdegC(code, s); |
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| .. | .. |
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| 286 | 279 | .resume = resume_8960, |
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| 287 | 280 | }; |
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| 288 | 281 | |
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| 289 | | -const struct tsens_data data_8960 = { |
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| 282 | +struct tsens_plat_data data_8960 = { |
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| 290 | 283 | .num_sensors = 11, |
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| 291 | 284 | .ops = &ops_8960, |
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| 292 | 285 | }; |
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