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| 43 | 43 | #define RTL8188E_TRANS_LPS_TO_ACT_STEPS 15 |
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| 44 | 44 | #define RTL8188E_TRANS_END_STEPS 1 |
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| 45 | 45 | |
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| 46 | | - |
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| 47 | 46 | #define RTL8188E_TRANS_CARDEMU_TO_ACT \ |
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| 48 | 47 | /* format |
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| 49 | 48 | * { offset, cut_msk, cmd, msk, value |
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| .. | .. |
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| 179 | 178 | {0x0553, PWR_CUT_ALL_MSK, PWR_CMD_WRITE, BIT(5), BIT(5)}, \ |
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| 180 | 179 | /*Respond TxOK to scheduler*/ |
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| 181 | 180 | |
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| 182 | | - |
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| 183 | 181 | #define RTL8188E_TRANS_LPS_TO_ACT \ |
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| 184 | 182 | /* format |
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| 185 | 183 | * { offset, cut_msk, cmd, msk, |
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| .. | .. |
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| 212 | 210 | * comments here |
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| 213 | 211 | */ \ |
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| 214 | 212 | {0xFFFF, PWR_CUT_ALL_MSK, PWR_CMD_END, 0, 0}, |
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| 215 | | - |
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| 216 | 213 | |
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| 217 | 214 | extern struct wl_pwr_cfg rtl8188E_power_on_flow |
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| 218 | 215 | [RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS + RTL8188E_TRANS_END_STEPS]; |
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