| .. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0 |
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| 1 | 2 | /* |
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| 2 | 3 | * AD9832 SPI DDS driver |
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| 3 | 4 | * |
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| 4 | 5 | * Copyright 2011 Analog Devices Inc. |
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| 5 | | - * |
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| 6 | | - * Licensed under the GPL-2. |
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| 7 | 6 | */ |
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| 8 | 7 | |
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| 9 | | -#include <linux/device.h> |
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| 10 | | -#include <linux/kernel.h> |
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| 11 | | -#include <linux/slab.h> |
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| 12 | | -#include <linux/sysfs.h> |
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| 13 | | -#include <linux/spi/spi.h> |
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| 14 | | -#include <linux/regulator/consumer.h> |
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| 15 | | -#include <linux/err.h> |
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| 16 | | -#include <linux/module.h> |
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| 17 | 8 | #include <asm/div64.h> |
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| 9 | + |
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| 10 | +#include <linux/clk.h> |
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| 11 | +#include <linux/device.h> |
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| 12 | +#include <linux/err.h> |
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| 13 | +#include <linux/kernel.h> |
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| 14 | +#include <linux/module.h> |
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| 15 | +#include <linux/regulator/consumer.h> |
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| 16 | +#include <linux/slab.h> |
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| 17 | +#include <linux/spi/spi.h> |
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| 18 | +#include <linux/sysfs.h> |
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| 18 | 19 | |
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| 19 | 20 | #include <linux/iio/iio.h> |
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| 20 | 21 | #include <linux/iio/sysfs.h> |
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| 21 | | -#include "dds.h" |
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| 22 | 22 | |
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| 23 | 23 | #include "ad9832.h" |
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| 24 | + |
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| 25 | +#include "dds.h" |
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| 24 | 26 | |
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| 25 | 27 | /* Registers */ |
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| 26 | 28 | |
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| .. | .. |
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| 94 | 96 | struct spi_device *spi; |
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| 95 | 97 | struct regulator *avdd; |
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| 96 | 98 | struct regulator *dvdd; |
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| 97 | | - unsigned long mclk; |
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| 99 | + struct clk *mclk; |
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| 98 | 100 | unsigned short ctrl_fp; |
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| 99 | 101 | unsigned short ctrl_ss; |
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| 100 | 102 | unsigned short ctrl_src; |
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| .. | .. |
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| 129 | 131 | { |
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| 130 | 132 | unsigned long regval; |
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| 131 | 133 | |
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| 132 | | - if (fout > (st->mclk / 2)) |
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| 134 | + if (fout > (clk_get_rate(st->mclk) / 2)) |
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| 133 | 135 | return -EINVAL; |
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| 134 | 136 | |
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| 135 | | - regval = ad9832_calc_freqreg(st->mclk, fout); |
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| 137 | + regval = ad9832_calc_freqreg(clk_get_rate(st->mclk), fout); |
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| 136 | 138 | |
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| 137 | 139 | st->freq_data[0] = cpu_to_be16((AD9832_CMD_FRE8BITSW << CMD_SHIFT) | |
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| 138 | 140 | (addr << ADD_SHIFT) | |
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| .. | .. |
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| 333 | 335 | goto error_disable_avdd; |
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| 334 | 336 | } |
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| 335 | 337 | |
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| 336 | | - st->mclk = pdata->mclk; |
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| 338 | + st->mclk = devm_clk_get(&spi->dev, "mclk"); |
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| 339 | + if (IS_ERR(st->mclk)) { |
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| 340 | + ret = PTR_ERR(st->mclk); |
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| 341 | + goto error_disable_dvdd; |
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| 342 | + } |
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| 343 | + |
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| 344 | + ret = clk_prepare_enable(st->mclk); |
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| 345 | + if (ret < 0) |
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| 346 | + goto error_disable_dvdd; |
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| 347 | + |
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| 337 | 348 | st->spi = spi; |
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| 338 | 349 | mutex_init(&st->lock); |
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| 339 | 350 | |
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| 340 | | - indio_dev->dev.parent = &spi->dev; |
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| 341 | 351 | indio_dev->name = spi_get_device_id(spi)->name; |
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| 342 | 352 | indio_dev->info = &ad9832_info; |
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| 343 | 353 | indio_dev->modes = INDIO_DIRECT_MODE; |
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| .. | .. |
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| 384 | 394 | ret = spi_sync(st->spi, &st->msg); |
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| 385 | 395 | if (ret) { |
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| 386 | 396 | dev_err(&spi->dev, "device init failed\n"); |
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| 387 | | - goto error_disable_dvdd; |
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| 397 | + goto error_unprepare_mclk; |
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| 388 | 398 | } |
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| 389 | 399 | |
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| 390 | 400 | ret = ad9832_write_frequency(st, AD9832_FREQ0HM, pdata->freq0); |
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| 391 | 401 | if (ret) |
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| 392 | | - goto error_disable_dvdd; |
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| 402 | + goto error_unprepare_mclk; |
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| 393 | 403 | |
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| 394 | 404 | ret = ad9832_write_frequency(st, AD9832_FREQ1HM, pdata->freq1); |
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| 395 | 405 | if (ret) |
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| 396 | | - goto error_disable_dvdd; |
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| 406 | + goto error_unprepare_mclk; |
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| 397 | 407 | |
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| 398 | 408 | ret = ad9832_write_phase(st, AD9832_PHASE0H, pdata->phase0); |
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| 399 | 409 | if (ret) |
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| 400 | | - goto error_disable_dvdd; |
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| 410 | + goto error_unprepare_mclk; |
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| 401 | 411 | |
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| 402 | 412 | ret = ad9832_write_phase(st, AD9832_PHASE1H, pdata->phase1); |
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| 403 | 413 | if (ret) |
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| 404 | | - goto error_disable_dvdd; |
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| 414 | + goto error_unprepare_mclk; |
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| 405 | 415 | |
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| 406 | 416 | ret = ad9832_write_phase(st, AD9832_PHASE2H, pdata->phase2); |
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| 407 | 417 | if (ret) |
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| 408 | | - goto error_disable_dvdd; |
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| 418 | + goto error_unprepare_mclk; |
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| 409 | 419 | |
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| 410 | 420 | ret = ad9832_write_phase(st, AD9832_PHASE3H, pdata->phase3); |
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| 411 | 421 | if (ret) |
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| 412 | | - goto error_disable_dvdd; |
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| 422 | + goto error_unprepare_mclk; |
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| 413 | 423 | |
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| 414 | 424 | ret = iio_device_register(indio_dev); |
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| 415 | 425 | if (ret) |
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| 416 | | - goto error_disable_dvdd; |
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| 426 | + goto error_unprepare_mclk; |
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| 417 | 427 | |
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| 418 | 428 | return 0; |
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| 419 | 429 | |
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| 430 | +error_unprepare_mclk: |
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| 431 | + clk_disable_unprepare(st->mclk); |
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| 420 | 432 | error_disable_dvdd: |
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| 421 | 433 | regulator_disable(st->dvdd); |
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| 422 | 434 | error_disable_avdd: |
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| .. | .. |
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| 431 | 443 | struct ad9832_state *st = iio_priv(indio_dev); |
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| 432 | 444 | |
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| 433 | 445 | iio_device_unregister(indio_dev); |
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| 446 | + clk_disable_unprepare(st->mclk); |
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| 434 | 447 | regulator_disable(st->dvdd); |
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| 435 | 448 | regulator_disable(st->avdd); |
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| 436 | 449 | |
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| .. | .. |
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| 454 | 467 | }; |
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| 455 | 468 | module_spi_driver(ad9832_driver); |
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| 456 | 469 | |
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| 457 | | -MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); |
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| 470 | +MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); |
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| 458 | 471 | MODULE_DESCRIPTION("Analog Devices AD9832/AD9835 DDS"); |
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| 459 | 472 | MODULE_LICENSE("GPL v2"); |
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