| .. | .. |
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| 6 | 6 | * Vaibhav Bedia, Dave Gerlach |
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| 7 | 7 | */ |
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| 8 | 8 | |
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| 9 | +#include <linux/clk.h> |
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| 9 | 10 | #include <linux/cpu.h> |
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| 10 | 11 | #include <linux/err.h> |
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| 11 | 12 | #include <linux/genalloc.h> |
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| .. | .. |
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| 13 | 14 | #include <linux/init.h> |
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| 14 | 15 | #include <linux/io.h> |
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| 15 | 16 | #include <linux/module.h> |
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| 17 | +#include <linux/nvmem-consumer.h> |
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| 16 | 18 | #include <linux/of.h> |
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| 19 | +#include <linux/of_address.h> |
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| 17 | 20 | #include <linux/platform_data/pm33xx.h> |
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| 18 | 21 | #include <linux/platform_device.h> |
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| 22 | +#include <linux/pm_runtime.h> |
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| 23 | +#include <linux/rtc.h> |
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| 24 | +#include <linux/rtc/rtc-omap.h> |
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| 19 | 25 | #include <linux/sizes.h> |
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| 20 | 26 | #include <linux/sram.h> |
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| 21 | 27 | #include <linux/suspend.h> |
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| .. | .. |
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| 29 | 35 | #define AMX3_PM_SRAM_SYMBOL_OFFSET(sym) ((unsigned long)(sym) - \ |
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| 30 | 36 | (unsigned long)pm_sram->do_wfi) |
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| 31 | 37 | |
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| 38 | +#define RTC_SCRATCH_RESUME_REG 0 |
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| 39 | +#define RTC_SCRATCH_MAGIC_REG 1 |
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| 40 | +#define RTC_REG_BOOT_MAGIC 0x8cd0 /* RTC */ |
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| 41 | +#define GIC_INT_SET_PENDING_BASE 0x200 |
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| 42 | +#define AM43XX_GIC_DIST_BASE 0x48241000 |
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| 43 | + |
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| 44 | +static void __iomem *rtc_base_virt; |
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| 45 | +static struct clk *rtc_fck; |
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| 46 | +static u32 rtc_magic_val; |
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| 47 | + |
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| 32 | 48 | static int (*am33xx_do_wfi_sram)(unsigned long unused); |
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| 33 | 49 | static phys_addr_t am33xx_do_wfi_sram_phys; |
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| 34 | 50 | |
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| 35 | 51 | static struct gen_pool *sram_pool, *sram_pool_data; |
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| 36 | 52 | static unsigned long ocmcram_location, ocmcram_location_data; |
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| 53 | + |
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| 54 | +static struct rtc_device *omap_rtc; |
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| 55 | +static void __iomem *gic_dist_base; |
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| 37 | 56 | |
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| 38 | 57 | static struct am33xx_pm_platform_data *pm_ops; |
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| 39 | 58 | static struct am33xx_pm_sram_addr *pm_sram; |
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| .. | .. |
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| 41 | 60 | static struct device *pm33xx_dev; |
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| 42 | 61 | static struct wkup_m3_ipc *m3_ipc; |
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| 43 | 62 | |
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| 63 | +#ifdef CONFIG_SUSPEND |
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| 64 | +static int rtc_only_idle; |
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| 65 | +static int retrigger_irq; |
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| 44 | 66 | static unsigned long suspend_wfi_flags; |
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| 67 | + |
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| 68 | +static struct wkup_m3_wakeup_src wakeup_src = {.irq_nr = 0, |
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| 69 | + .src = "Unknown", |
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| 70 | +}; |
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| 71 | + |
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| 72 | +static struct wkup_m3_wakeup_src rtc_alarm_wakeup = { |
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| 73 | + .irq_nr = 108, .src = "RTC Alarm", |
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| 74 | +}; |
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| 75 | + |
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| 76 | +static struct wkup_m3_wakeup_src rtc_ext_wakeup = { |
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| 77 | + .irq_nr = 0, .src = "Ext wakeup", |
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| 78 | +}; |
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| 79 | +#endif |
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| 45 | 80 | |
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| 46 | 81 | static u32 sram_suspend_address(unsigned long addr) |
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| 47 | 82 | { |
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| .. | .. |
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| 49 | 84 | AMX3_PM_SRAM_SYMBOL_OFFSET(addr)); |
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| 50 | 85 | } |
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| 51 | 86 | |
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| 87 | +static int am33xx_push_sram_idle(void) |
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| 88 | +{ |
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| 89 | + struct am33xx_pm_ro_sram_data ro_sram_data; |
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| 90 | + int ret; |
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| 91 | + u32 table_addr, ro_data_addr; |
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| 92 | + void *copy_addr; |
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| 93 | + |
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| 94 | + ro_sram_data.amx3_pm_sram_data_virt = ocmcram_location_data; |
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| 95 | + ro_sram_data.amx3_pm_sram_data_phys = |
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| 96 | + gen_pool_virt_to_phys(sram_pool_data, ocmcram_location_data); |
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| 97 | + ro_sram_data.rtc_base_virt = rtc_base_virt; |
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| 98 | + |
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| 99 | + /* Save physical address to calculate resume offset during pm init */ |
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| 100 | + am33xx_do_wfi_sram_phys = gen_pool_virt_to_phys(sram_pool, |
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| 101 | + ocmcram_location); |
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| 102 | + |
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| 103 | + am33xx_do_wfi_sram = sram_exec_copy(sram_pool, (void *)ocmcram_location, |
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| 104 | + pm_sram->do_wfi, |
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| 105 | + *pm_sram->do_wfi_sz); |
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| 106 | + if (!am33xx_do_wfi_sram) { |
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| 107 | + dev_err(pm33xx_dev, |
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| 108 | + "PM: %s: am33xx_do_wfi copy to sram failed\n", |
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| 109 | + __func__); |
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| 110 | + return -ENODEV; |
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| 111 | + } |
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| 112 | + |
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| 113 | + table_addr = |
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| 114 | + sram_suspend_address((unsigned long)pm_sram->emif_sram_table); |
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| 115 | + ret = ti_emif_copy_pm_function_table(sram_pool, (void *)table_addr); |
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| 116 | + if (ret) { |
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| 117 | + dev_dbg(pm33xx_dev, |
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| 118 | + "PM: %s: EMIF function copy failed\n", __func__); |
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| 119 | + return -EPROBE_DEFER; |
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| 120 | + } |
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| 121 | + |
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| 122 | + ro_data_addr = |
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| 123 | + sram_suspend_address((unsigned long)pm_sram->ro_sram_data); |
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| 124 | + copy_addr = sram_exec_copy(sram_pool, (void *)ro_data_addr, |
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| 125 | + &ro_sram_data, |
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| 126 | + sizeof(ro_sram_data)); |
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| 127 | + if (!copy_addr) { |
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| 128 | + dev_err(pm33xx_dev, |
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| 129 | + "PM: %s: ro_sram_data copy to sram failed\n", |
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| 130 | + __func__); |
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| 131 | + return -ENODEV; |
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| 132 | + } |
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| 133 | + |
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| 134 | + return 0; |
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| 135 | +} |
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| 136 | + |
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| 137 | +static int am33xx_do_sram_idle(u32 wfi_flags) |
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| 138 | +{ |
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| 139 | + int ret = 0; |
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| 140 | + |
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| 141 | + if (!m3_ipc || !pm_ops) |
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| 142 | + return 0; |
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| 143 | + |
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| 144 | + if (wfi_flags & WFI_FLAG_WAKE_M3) |
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| 145 | + ret = m3_ipc->ops->prepare_low_power(m3_ipc, WKUP_M3_IDLE); |
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| 146 | + |
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| 147 | + return pm_ops->cpu_suspend(am33xx_do_wfi_sram, wfi_flags); |
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| 148 | +} |
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| 149 | + |
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| 150 | +static int __init am43xx_map_gic(void) |
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| 151 | +{ |
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| 152 | + gic_dist_base = ioremap(AM43XX_GIC_DIST_BASE, SZ_4K); |
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| 153 | + |
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| 154 | + if (!gic_dist_base) |
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| 155 | + return -ENOMEM; |
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| 156 | + |
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| 157 | + return 0; |
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| 158 | +} |
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| 159 | + |
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| 52 | 160 | #ifdef CONFIG_SUSPEND |
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| 161 | +static struct wkup_m3_wakeup_src rtc_wake_src(void) |
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| 162 | +{ |
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| 163 | + u32 i; |
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| 164 | + |
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| 165 | + i = __raw_readl(rtc_base_virt + 0x44) & 0x40; |
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| 166 | + |
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| 167 | + if (i) { |
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| 168 | + retrigger_irq = rtc_alarm_wakeup.irq_nr; |
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| 169 | + return rtc_alarm_wakeup; |
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| 170 | + } |
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| 171 | + |
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| 172 | + retrigger_irq = rtc_ext_wakeup.irq_nr; |
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| 173 | + |
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| 174 | + return rtc_ext_wakeup; |
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| 175 | +} |
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| 176 | + |
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| 177 | +static int am33xx_rtc_only_idle(unsigned long wfi_flags) |
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| 178 | +{ |
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| 179 | + omap_rtc_power_off_program(&omap_rtc->dev); |
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| 180 | + am33xx_do_wfi_sram(wfi_flags); |
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| 181 | + return 0; |
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| 182 | +} |
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| 183 | + |
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| 184 | +/* |
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| 185 | + * Note that the RTC module clock must be re-enabled only for rtc+ddr suspend. |
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| 186 | + * And looks like the module can stay in SYSC_IDLE_SMART_WKUP mode configured |
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| 187 | + * by the interconnect code just fine for both rtc+ddr suspend and retention |
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| 188 | + * suspend. |
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| 189 | + */ |
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| 53 | 190 | static int am33xx_pm_suspend(suspend_state_t suspend_state) |
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| 54 | 191 | { |
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| 55 | 192 | int i, ret = 0; |
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| 56 | 193 | |
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| 57 | | - ret = pm_ops->soc_suspend((unsigned long)suspend_state, |
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| 58 | | - am33xx_do_wfi_sram, suspend_wfi_flags); |
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| 194 | + if (suspend_state == PM_SUSPEND_MEM && |
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| 195 | + pm_ops->check_off_mode_enable()) { |
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| 196 | + ret = clk_prepare_enable(rtc_fck); |
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| 197 | + if (ret) { |
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| 198 | + dev_err(pm33xx_dev, "Failed to enable clock: %i\n", ret); |
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| 199 | + return ret; |
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| 200 | + } |
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| 201 | + |
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| 202 | + pm_ops->save_context(); |
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| 203 | + suspend_wfi_flags |= WFI_FLAG_RTC_ONLY; |
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| 204 | + clk_save_context(); |
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| 205 | + ret = pm_ops->soc_suspend(suspend_state, am33xx_rtc_only_idle, |
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| 206 | + suspend_wfi_flags); |
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| 207 | + |
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| 208 | + suspend_wfi_flags &= ~WFI_FLAG_RTC_ONLY; |
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| 209 | + dev_info(pm33xx_dev, "Entering RTC Only mode with DDR in self-refresh\n"); |
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| 210 | + |
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| 211 | + if (!ret) { |
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| 212 | + clk_restore_context(); |
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| 213 | + pm_ops->restore_context(); |
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| 214 | + m3_ipc->ops->set_rtc_only(m3_ipc); |
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| 215 | + am33xx_push_sram_idle(); |
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| 216 | + } |
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| 217 | + } else { |
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| 218 | + ret = pm_ops->soc_suspend(suspend_state, am33xx_do_wfi_sram, |
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| 219 | + suspend_wfi_flags); |
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| 220 | + } |
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| 59 | 221 | |
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| 60 | 222 | if (ret) { |
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| 61 | 223 | dev_err(pm33xx_dev, "PM: Kernel suspend failure\n"); |
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| .. | .. |
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| 77 | 239 | "PM: CM3 returned unknown result = %d\n", i); |
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| 78 | 240 | ret = -1; |
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| 79 | 241 | } |
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| 242 | + |
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| 243 | + /* print the wakeup reason */ |
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| 244 | + if (rtc_only_idle) { |
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| 245 | + wakeup_src = rtc_wake_src(); |
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| 246 | + pr_info("PM: Wakeup source %s\n", wakeup_src.src); |
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| 247 | + } else { |
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| 248 | + pr_info("PM: Wakeup source %s\n", |
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| 249 | + m3_ipc->ops->request_wake_src(m3_ipc)); |
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| 250 | + } |
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| 80 | 251 | } |
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| 252 | + |
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| 253 | + if (suspend_state == PM_SUSPEND_MEM && pm_ops->check_off_mode_enable()) |
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| 254 | + clk_disable_unprepare(rtc_fck); |
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| 81 | 255 | |
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| 82 | 256 | return ret; |
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| 83 | 257 | } |
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| .. | .. |
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| 101 | 275 | static int am33xx_pm_begin(suspend_state_t state) |
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| 102 | 276 | { |
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| 103 | 277 | int ret = -EINVAL; |
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| 278 | + struct nvmem_device *nvmem; |
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| 279 | + |
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| 280 | + if (state == PM_SUSPEND_MEM && pm_ops->check_off_mode_enable()) { |
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| 281 | + nvmem = devm_nvmem_device_get(&omap_rtc->dev, |
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| 282 | + "omap_rtc_scratch0"); |
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| 283 | + if (!IS_ERR(nvmem)) |
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| 284 | + nvmem_device_write(nvmem, RTC_SCRATCH_MAGIC_REG * 4, 4, |
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| 285 | + (void *)&rtc_magic_val); |
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| 286 | + rtc_only_idle = 1; |
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| 287 | + } else { |
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| 288 | + rtc_only_idle = 0; |
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| 289 | + } |
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| 290 | + |
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| 291 | + pm_ops->begin_suspend(); |
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| 104 | 292 | |
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| 105 | 293 | switch (state) { |
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| 106 | 294 | case PM_SUSPEND_MEM: |
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| .. | .. |
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| 116 | 304 | |
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| 117 | 305 | static void am33xx_pm_end(void) |
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| 118 | 306 | { |
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| 307 | + u32 val = 0; |
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| 308 | + struct nvmem_device *nvmem; |
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| 309 | + |
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| 310 | + nvmem = devm_nvmem_device_get(&omap_rtc->dev, "omap_rtc_scratch0"); |
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| 311 | + if (IS_ERR(nvmem)) |
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| 312 | + return; |
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| 313 | + |
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| 119 | 314 | m3_ipc->ops->finish_low_power(m3_ipc); |
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| 315 | + if (rtc_only_idle) { |
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| 316 | + if (retrigger_irq) { |
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| 317 | + /* |
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| 318 | + * 32 bits of Interrupt Set-Pending correspond to 32 |
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| 319 | + * 32 interrupts. Compute the bit offset of the |
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| 320 | + * Interrupt and set that particular bit |
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| 321 | + * Compute the register offset by dividing interrupt |
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| 322 | + * number by 32 and mutiplying by 4 |
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| 323 | + */ |
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| 324 | + writel_relaxed(1 << (retrigger_irq & 31), |
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| 325 | + gic_dist_base + GIC_INT_SET_PENDING_BASE |
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| 326 | + + retrigger_irq / 32 * 4); |
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| 327 | + } |
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| 328 | + |
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| 329 | + nvmem_device_write(nvmem, RTC_SCRATCH_MAGIC_REG * 4, 4, |
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| 330 | + (void *)&val); |
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| 331 | + } |
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| 332 | + |
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| 333 | + rtc_only_idle = 0; |
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| 334 | + |
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| 335 | + pm_ops->finish_suspend(); |
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| 120 | 336 | } |
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| 121 | 337 | |
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| 122 | 338 | static int am33xx_pm_valid(suspend_state_t state) |
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| .. | .. |
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| 219 | 435 | return ret; |
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| 220 | 436 | } |
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| 221 | 437 | |
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| 222 | | -static int am33xx_push_sram_idle(void) |
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| 438 | +static int am33xx_pm_rtc_setup(void) |
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| 223 | 439 | { |
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| 224 | | - struct am33xx_pm_ro_sram_data ro_sram_data; |
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| 225 | | - int ret; |
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| 226 | | - u32 table_addr, ro_data_addr; |
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| 227 | | - void *copy_addr; |
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| 440 | + struct device_node *np; |
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| 441 | + unsigned long val = 0; |
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| 442 | + struct nvmem_device *nvmem; |
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| 443 | + int error; |
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| 228 | 444 | |
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| 229 | | - ro_sram_data.amx3_pm_sram_data_virt = ocmcram_location_data; |
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| 230 | | - ro_sram_data.amx3_pm_sram_data_phys = |
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| 231 | | - gen_pool_virt_to_phys(sram_pool_data, ocmcram_location_data); |
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| 232 | | - ro_sram_data.rtc_base_virt = pm_ops->get_rtc_base_addr(); |
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| 445 | + np = of_find_node_by_name(NULL, "rtc"); |
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| 233 | 446 | |
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| 234 | | - /* Save physical address to calculate resume offset during pm init */ |
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| 235 | | - am33xx_do_wfi_sram_phys = gen_pool_virt_to_phys(sram_pool, |
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| 236 | | - ocmcram_location); |
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| 447 | + if (of_device_is_available(np)) { |
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| 448 | + /* RTC interconnect target module clock */ |
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| 449 | + rtc_fck = of_clk_get_by_name(np->parent, "fck"); |
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| 450 | + if (IS_ERR(rtc_fck)) |
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| 451 | + return PTR_ERR(rtc_fck); |
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| 237 | 452 | |
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| 238 | | - am33xx_do_wfi_sram = sram_exec_copy(sram_pool, (void *)ocmcram_location, |
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| 239 | | - pm_sram->do_wfi, |
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| 240 | | - *pm_sram->do_wfi_sz); |
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| 241 | | - if (!am33xx_do_wfi_sram) { |
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| 242 | | - dev_err(pm33xx_dev, |
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| 243 | | - "PM: %s: am33xx_do_wfi copy to sram failed\n", |
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| 244 | | - __func__); |
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| 245 | | - return -ENODEV; |
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| 246 | | - } |
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| 453 | + rtc_base_virt = of_iomap(np, 0); |
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| 454 | + if (!rtc_base_virt) { |
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| 455 | + pr_warn("PM: could not iomap rtc"); |
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| 456 | + error = -ENODEV; |
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| 457 | + goto err_clk_put; |
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| 458 | + } |
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| 247 | 459 | |
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| 248 | | - table_addr = |
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| 249 | | - sram_suspend_address((unsigned long)pm_sram->emif_sram_table); |
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| 250 | | - ret = ti_emif_copy_pm_function_table(sram_pool, (void *)table_addr); |
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| 251 | | - if (ret) { |
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| 252 | | - dev_dbg(pm33xx_dev, |
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| 253 | | - "PM: %s: EMIF function copy failed\n", __func__); |
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| 254 | | - return -EPROBE_DEFER; |
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| 255 | | - } |
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| 460 | + omap_rtc = rtc_class_open("rtc0"); |
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| 461 | + if (!omap_rtc) { |
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| 462 | + pr_warn("PM: rtc0 not available"); |
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| 463 | + error = -EPROBE_DEFER; |
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| 464 | + goto err_iounmap; |
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| 465 | + } |
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| 256 | 466 | |
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| 257 | | - ro_data_addr = |
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| 258 | | - sram_suspend_address((unsigned long)pm_sram->ro_sram_data); |
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| 259 | | - copy_addr = sram_exec_copy(sram_pool, (void *)ro_data_addr, |
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| 260 | | - &ro_sram_data, |
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| 261 | | - sizeof(ro_sram_data)); |
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| 262 | | - if (!copy_addr) { |
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| 263 | | - dev_err(pm33xx_dev, |
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| 264 | | - "PM: %s: ro_sram_data copy to sram failed\n", |
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| 265 | | - __func__); |
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| 266 | | - return -ENODEV; |
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| 467 | + nvmem = devm_nvmem_device_get(&omap_rtc->dev, |
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| 468 | + "omap_rtc_scratch0"); |
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| 469 | + if (!IS_ERR(nvmem)) { |
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| 470 | + nvmem_device_read(nvmem, RTC_SCRATCH_MAGIC_REG * 4, |
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| 471 | + 4, (void *)&rtc_magic_val); |
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| 472 | + if ((rtc_magic_val & 0xffff) != RTC_REG_BOOT_MAGIC) |
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| 473 | + pr_warn("PM: bootloader does not support rtc-only!\n"); |
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| 474 | + |
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| 475 | + nvmem_device_write(nvmem, RTC_SCRATCH_MAGIC_REG * 4, |
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| 476 | + 4, (void *)&val); |
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| 477 | + val = pm_sram->resume_address; |
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| 478 | + nvmem_device_write(nvmem, RTC_SCRATCH_RESUME_REG * 4, |
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| 479 | + 4, (void *)&val); |
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| 480 | + } |
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| 481 | + } else { |
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| 482 | + pr_warn("PM: no-rtc available, rtc-only mode disabled.\n"); |
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| 267 | 483 | } |
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| 268 | 484 | |
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| 269 | 485 | return 0; |
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| 486 | + |
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| 487 | +err_iounmap: |
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| 488 | + iounmap(rtc_base_virt); |
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| 489 | +err_clk_put: |
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| 490 | + clk_put(rtc_fck); |
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| 491 | + |
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| 492 | + return error; |
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| 270 | 493 | } |
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| 271 | 494 | |
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| 272 | 495 | static int am33xx_pm_probe(struct platform_device *pdev) |
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| .. | .. |
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| 284 | 507 | return -ENODEV; |
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| 285 | 508 | } |
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| 286 | 509 | |
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| 510 | + ret = am43xx_map_gic(); |
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| 511 | + if (ret) { |
|---|
| 512 | + pr_err("PM: Could not ioremap GIC base\n"); |
|---|
| 513 | + return ret; |
|---|
| 514 | + } |
|---|
| 515 | + |
|---|
| 287 | 516 | pm_sram = pm_ops->get_sram_addrs(); |
|---|
| 288 | 517 | if (!pm_sram) { |
|---|
| 289 | 518 | dev_err(dev, "PM: Cannot get PM asm function addresses!!\n"); |
|---|
| 290 | 519 | return -ENODEV; |
|---|
| 291 | 520 | } |
|---|
| 292 | 521 | |
|---|
| 522 | + m3_ipc = wkup_m3_ipc_get(); |
|---|
| 523 | + if (!m3_ipc) { |
|---|
| 524 | + pr_err("PM: Cannot get wkup_m3_ipc handle\n"); |
|---|
| 525 | + return -EPROBE_DEFER; |
|---|
| 526 | + } |
|---|
| 527 | + |
|---|
| 293 | 528 | pm33xx_dev = dev; |
|---|
| 294 | 529 | |
|---|
| 295 | 530 | ret = am33xx_pm_alloc_sram(); |
|---|
| 296 | 531 | if (ret) |
|---|
| 297 | | - return ret; |
|---|
| 532 | + goto err_wkup_m3_ipc_put; |
|---|
| 298 | 533 | |
|---|
| 299 | | - ret = am33xx_push_sram_idle(); |
|---|
| 534 | + ret = am33xx_pm_rtc_setup(); |
|---|
| 300 | 535 | if (ret) |
|---|
| 301 | 536 | goto err_free_sram; |
|---|
| 302 | 537 | |
|---|
| 303 | | - m3_ipc = wkup_m3_ipc_get(); |
|---|
| 304 | | - if (!m3_ipc) { |
|---|
| 305 | | - dev_dbg(dev, "PM: Cannot get wkup_m3_ipc handle\n"); |
|---|
| 306 | | - ret = -EPROBE_DEFER; |
|---|
| 307 | | - goto err_free_sram; |
|---|
| 308 | | - } |
|---|
| 538 | + ret = am33xx_push_sram_idle(); |
|---|
| 539 | + if (ret) |
|---|
| 540 | + goto err_unsetup_rtc; |
|---|
| 309 | 541 | |
|---|
| 310 | 542 | am33xx_pm_set_ipc_ops(); |
|---|
| 311 | 543 | |
|---|
| 312 | 544 | #ifdef CONFIG_SUSPEND |
|---|
| 313 | 545 | suspend_set_ops(&am33xx_pm_ops); |
|---|
| 314 | | -#endif /* CONFIG_SUSPEND */ |
|---|
| 315 | 546 | |
|---|
| 316 | 547 | /* |
|---|
| 317 | 548 | * For a system suspend we must flush the caches, we want |
|---|
| .. | .. |
|---|
| 323 | 554 | suspend_wfi_flags |= WFI_FLAG_SELF_REFRESH; |
|---|
| 324 | 555 | suspend_wfi_flags |= WFI_FLAG_SAVE_EMIF; |
|---|
| 325 | 556 | suspend_wfi_flags |= WFI_FLAG_WAKE_M3; |
|---|
| 557 | +#endif /* CONFIG_SUSPEND */ |
|---|
| 326 | 558 | |
|---|
| 327 | | - ret = pm_ops->init(); |
|---|
| 559 | + pm_runtime_enable(dev); |
|---|
| 560 | + ret = pm_runtime_get_sync(dev); |
|---|
| 561 | + if (ret < 0) { |
|---|
| 562 | + pm_runtime_put_noidle(dev); |
|---|
| 563 | + goto err_pm_runtime_disable; |
|---|
| 564 | + } |
|---|
| 565 | + |
|---|
| 566 | + ret = pm_ops->init(am33xx_do_sram_idle); |
|---|
| 328 | 567 | if (ret) { |
|---|
| 329 | 568 | dev_err(dev, "Unable to call core pm init!\n"); |
|---|
| 330 | 569 | ret = -ENODEV; |
|---|
| 331 | | - goto err_put_wkup_m3_ipc; |
|---|
| 570 | + goto err_pm_runtime_put; |
|---|
| 332 | 571 | } |
|---|
| 333 | 572 | |
|---|
| 334 | 573 | return 0; |
|---|
| 335 | 574 | |
|---|
| 336 | | -err_put_wkup_m3_ipc: |
|---|
| 337 | | - wkup_m3_ipc_put(m3_ipc); |
|---|
| 575 | +err_pm_runtime_put: |
|---|
| 576 | + pm_runtime_put_sync(dev); |
|---|
| 577 | +err_pm_runtime_disable: |
|---|
| 578 | + pm_runtime_disable(dev); |
|---|
| 579 | +err_unsetup_rtc: |
|---|
| 580 | + iounmap(rtc_base_virt); |
|---|
| 581 | + clk_put(rtc_fck); |
|---|
| 338 | 582 | err_free_sram: |
|---|
| 339 | 583 | am33xx_pm_free_sram(); |
|---|
| 340 | 584 | pm33xx_dev = NULL; |
|---|
| 585 | +err_wkup_m3_ipc_put: |
|---|
| 586 | + wkup_m3_ipc_put(m3_ipc); |
|---|
| 341 | 587 | return ret; |
|---|
| 342 | 588 | } |
|---|
| 343 | 589 | |
|---|
| 344 | 590 | static int am33xx_pm_remove(struct platform_device *pdev) |
|---|
| 345 | 591 | { |
|---|
| 592 | + pm_runtime_put_sync(&pdev->dev); |
|---|
| 593 | + pm_runtime_disable(&pdev->dev); |
|---|
| 594 | + if (pm_ops->deinit) |
|---|
| 595 | + pm_ops->deinit(); |
|---|
| 346 | 596 | suspend_set_ops(NULL); |
|---|
| 347 | 597 | wkup_m3_ipc_put(m3_ipc); |
|---|
| 348 | 598 | am33xx_pm_free_sram(); |
|---|
| 599 | + iounmap(rtc_base_virt); |
|---|
| 600 | + clk_put(rtc_fck); |
|---|
| 349 | 601 | return 0; |
|---|
| 350 | 602 | } |
|---|
| 351 | 603 | |
|---|