disable FB

hc

2024-01-04 1543e317f1da31b75942316931e8f491a8920811

 kernel/drivers/soc/fsl/qbman/qman_ccsr.c
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@@ -274,6 +274,7 @@
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 /* A SDQCR mask comprising all the available/visible pool channels */
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 static u32 qm_pools_sdqcr;
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 static int __qman_probed;
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+static int  __qman_requires_cleanup;
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 static inline u32 qm_ccsr_in(u32 offset)
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 {
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@@ -340,19 +341,55 @@
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 }
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 #define PFDR_AR_EN		BIT(31)
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-static void qm_set_memory(enum qm_memory memory, u64 ba, u32 size)
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+static int qm_set_memory(enum qm_memory memory, u64 ba, u32 size)
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 {
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+	void *ptr;
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 	u32 offset = (memory == qm_memory_fqd) ? REG_FQD_BARE : REG_PFDR_BARE;
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 	u32 exp = ilog2(size);
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+	u32 bar, bare;
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 	/* choke if size isn't within range */
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 	DPAA_ASSERT((size >= 4096) && (size <= 1024*1024*1024) &&
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 		    is_power_of_2(size));
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 	/* choke if 'ba' has lower-alignment than 'size' */
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 	DPAA_ASSERT(!(ba & (size - 1)));
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+
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+	/* Check to see if QMan has already been initialized */
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+	bar = qm_ccsr_in(offset + REG_offset_BAR);
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+	if (bar) {
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+		/* Maker sure ba == what was programmed) */
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+		bare = qm_ccsr_in(offset);
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+		if (bare != upper_32_bits(ba) || bar != lower_32_bits(ba)) {
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+			pr_err("Attempted to reinitialize QMan with different BAR, got 0x%llx read BARE=0x%x BAR=0x%x\n",
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+			       ba, bare, bar);
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+			return -ENOMEM;
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+		}
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+		__qman_requires_cleanup = 1;
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+		/* Return 1 to indicate memory was previously programmed */
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+		return 1;
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+	}
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+	/* Need to temporarily map the area to make sure it is zeroed */
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+	ptr = memremap(ba, size, MEMREMAP_WB);
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+	if (!ptr) {
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+		pr_crit("memremap() of QMan private memory failed\n");
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+		return -ENOMEM;
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+	}
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+	memset(ptr, 0, size);
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+
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+#ifdef CONFIG_PPC
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+	/*
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+	 * PPC doesn't appear to flush the cache on memunmap() but the
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+	 * cache must be flushed since QMan does non coherent accesses
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+	 * to this memory
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+	 */
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+	flush_dcache_range((unsigned long) ptr, (unsigned long) ptr+size);
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+#endif
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+	memunmap(ptr);
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+
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 	qm_ccsr_out(offset, upper_32_bits(ba));
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 	qm_ccsr_out(offset + REG_offset_BAR, lower_32_bits(ba));
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 	qm_ccsr_out(offset + REG_offset_AR, PFDR_AR_EN | (exp - 1));
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+	return 0;
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 }
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 static void qm_set_pfdr_threshold(u32 th, u8 k)
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@@ -419,7 +456,7 @@
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 static int zero_priv_mem(phys_addr_t addr, size_t sz)
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 {
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 	/* map as cacheable, non-guarded */
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-	void __iomem *tmpp = ioremap_prot(addr, sz, 0);
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+	void __iomem *tmpp = ioremap_cache(addr, sz);
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460
 
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 	if (!tmpp)
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 		return -ENOMEM;
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@@ -455,7 +492,7 @@
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492
 
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 #endif
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-static unsigned int qm_get_fqid_maxcnt(void)
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+unsigned int qm_get_fqid_maxcnt(void)
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 {
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 	return fqd_sz / 64;
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 }
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@@ -571,12 +608,19 @@
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 	int i, err;
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609
 
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 	/* FQD memory */
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-	qm_set_memory(qm_memory_fqd, fqd_a, fqd_sz);
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-	/* PFDR memory */
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-	qm_set_memory(qm_memory_pfdr, pfdr_a, pfdr_sz);
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-	err = qm_init_pfdr(dev, 8, pfdr_sz / 64 - 8);
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-	if (err)
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+	err = qm_set_memory(qm_memory_fqd, fqd_a, fqd_sz);
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+	if (err < 0)
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 		return err;
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+	/* PFDR memory */
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+	err = qm_set_memory(qm_memory_pfdr, pfdr_a, pfdr_sz);
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+	if (err < 0)
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+		return err;
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+	/* Only initialize PFDRs if the QMan was not initialized before */
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+	if (err == 0) {
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+		err = qm_init_pfdr(dev, 8, pfdr_sz / 64 - 8);
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+		if (err)
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+			return err;
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+	}
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 	/* thresholds */
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 	qm_set_pfdr_threshold(512, 64);
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 	qm_set_sfdr_threshold(128);
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@@ -596,7 +640,7 @@
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 }
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 #define LIO_CFG_LIODN_MASK 0x0fff0000
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-void qman_liodn_fixup(u16 channel)
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+void __qman_liodn_fixup(u16 channel)
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 {
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 	static int done;
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 	static u32 liodn_offset;
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@@ -693,6 +737,18 @@
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 }
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 EXPORT_SYMBOL_GPL(qman_is_probed);
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739
 
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+int qman_requires_cleanup(void)
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+{
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+	return __qman_requires_cleanup;
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+}
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+
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+void qman_done_cleanup(void)
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+{
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+	qman_enable_irqs();
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+	__qman_requires_cleanup = 0;
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+}
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+
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+
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 static int fsl_qman_probe(struct platform_device *pdev)
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 {
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 	struct device *dev = &pdev->dev;