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2024-01-04 1543e317f1da31b75942316931e8f491a8920811

 kernel/drivers/pinctrl/tegra/pinctrl-tegra124.c
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@@ -1,18 +1,10 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * Pinctrl data for the NVIDIA Tegra124 pinmux
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  *
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  * Author: Ashwini Ghuge <aghuge@nvidia.com>
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  *
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  * Copyright (c) 2013-2014, NVIDIA CORPORATION.  All rights reserved.
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- *
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- * This program is free software; you can redistribute it and/or modify it
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- * under the terms and conditions of the GNU General Public License,
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- * version 2, as published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope it will be useful, but WITHOUT
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- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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- * more details.
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  */
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 #include <linux/init.h>
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@@ -1749,8 +1741,8 @@
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 		.lock_bit = 7,						\
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 		.ioreset_bit = PINGROUP_BIT_##ior(8),			\
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 		.rcv_sel_bit = PINGROUP_BIT_##rcv_sel(9),		\
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-		.parked_bit = -1,					\
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 		.drv_reg = -1,						\
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+		.parked_bitmask = 0,					\
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 	}
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 #define DRV_PINGROUP(pg_name, r, hsm_b, schmitt_b, lpmd_b, drvdn_b,	\
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@@ -1770,7 +1762,6 @@
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 		.rcv_sel_bit = -1,					\
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 		.drv_reg = DRV_PINGROUP_REG(r),				\
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 		.drv_bank = 0,						\
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-		.parked_bit = -1,					\
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 		.hsm_bit = hsm_b,					\
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 		.schmitt_bit = schmitt_b,				\
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 		.lpmd_bit = lpmd_b,					\
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@@ -1783,6 +1774,7 @@
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 		.slwf_bit = slwf_b,					\
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 		.slwf_width = slwf_w,					\
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 		.drvtype_bit = PINGROUP_BIT_##drvtype(6),		\
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+		.parked_bitmask = 0,					\
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 	}
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 #define MIPI_PAD_CTRL_PINGROUP(pg_name, r, b, f0, f1)			\
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@@ -2051,7 +2043,7 @@
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 static const struct tegra_pinctrl_soc_data tegra124_pinctrl = {
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 	.ngpios = NUM_GPIOS,
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-	.gpio_compatible = "nvidia,tegra30-gpio",
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+	.gpio_compatible = "nvidia,tegra124-gpio",
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 	.pins = tegra124_pins,
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 	.npins = ARRAY_SIZE(tegra124_pins),
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 	.functions = tegra124_functions,