| .. | .. |
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| 1 | +/* SPDX-License-Identifier: GPL-2.0-only */ |
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| 1 | 2 | /* |
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| 2 | 3 | * Pin controller and GPIO driver for Amlogic Meson SoCs |
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| 3 | 4 | * |
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| 4 | 5 | * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com> |
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| 5 | | - * |
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| 6 | | - * This program is free software; you can redistribute it and/or |
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| 7 | | - * modify it under the terms of the GNU General Public License |
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| 8 | | - * version 2 as published by the Free Software Foundation. |
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| 9 | | - * |
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| 10 | | - * You should have received a copy of the GNU General Public License |
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| 11 | | - * along with this program. If not, see <http://www.gnu.org/licenses/>. |
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| 12 | 6 | */ |
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| 13 | 7 | |
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| 14 | | -#include <linux/gpio.h> |
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| 8 | +#include <linux/gpio/driver.h> |
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| 15 | 9 | #include <linux/pinctrl/pinctrl.h> |
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| 16 | 10 | #include <linux/platform_device.h> |
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| 17 | 11 | #include <linux/regmap.h> |
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| 18 | 12 | #include <linux/types.h> |
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| 13 | +#include <linux/module.h> |
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| 14 | + |
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| 15 | +struct meson_pinctrl; |
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| 19 | 16 | |
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| 20 | 17 | /** |
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| 21 | 18 | * struct meson_pmx_group - a pinmux group |
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| .. | .. |
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| 71 | 68 | REG_DIR, |
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| 72 | 69 | REG_OUT, |
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| 73 | 70 | REG_IN, |
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| 71 | + REG_DS, |
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| 74 | 72 | NUM_REG, |
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| 73 | +}; |
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| 74 | + |
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| 75 | +/** |
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| 76 | + * enum meson_pinconf_drv - value of drive-strength supported |
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| 77 | + */ |
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| 78 | +enum meson_pinconf_drv { |
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| 79 | + MESON_PINCONF_DRV_500UA, |
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| 80 | + MESON_PINCONF_DRV_2500UA, |
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| 81 | + MESON_PINCONF_DRV_3000UA, |
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| 82 | + MESON_PINCONF_DRV_4000UA, |
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| 75 | 83 | }; |
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| 76 | 84 | |
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| 77 | 85 | /** |
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| .. | .. |
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| 109 | 117 | unsigned int num_banks; |
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| 110 | 118 | const struct pinmux_ops *pmx_ops; |
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| 111 | 119 | void *pmx_data; |
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| 120 | + int (*parse_dt)(struct meson_pinctrl *pc); |
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| 112 | 121 | }; |
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| 113 | 122 | |
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| 114 | 123 | struct meson_pinctrl { |
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| .. | .. |
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| 120 | 129 | struct regmap *reg_pullen; |
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| 121 | 130 | struct regmap *reg_pull; |
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| 122 | 131 | struct regmap *reg_gpio; |
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| 132 | + struct regmap *reg_ds; |
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| 123 | 133 | struct gpio_chip chip; |
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| 124 | 134 | struct device_node *of_node; |
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| 125 | 135 | }; |
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| .. | .. |
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| 131 | 141 | .num_groups = ARRAY_SIZE(fn ## _groups), \ |
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| 132 | 142 | } |
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| 133 | 143 | |
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| 134 | | -#define BANK(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib) \ |
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| 144 | +#define BANK_DS(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib, \ |
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| 145 | + dsr, dsb) \ |
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| 135 | 146 | { \ |
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| 136 | 147 | .name = n, \ |
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| 137 | 148 | .first = f, \ |
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| .. | .. |
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| 144 | 155 | [REG_DIR] = { dr, db }, \ |
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| 145 | 156 | [REG_OUT] = { or, ob }, \ |
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| 146 | 157 | [REG_IN] = { ir, ib }, \ |
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| 158 | + [REG_DS] = { dsr, dsb }, \ |
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| 147 | 159 | }, \ |
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| 148 | 160 | } |
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| 161 | + |
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| 162 | +#define BANK(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib) \ |
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| 163 | + BANK_DS(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib, 0, 0) |
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| 149 | 164 | |
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| 150 | 165 | #define MESON_PIN(x) PINCTRL_PIN(x, #x) |
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| 151 | 166 | |
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| .. | .. |
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| 160 | 175 | |
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| 161 | 176 | /* Common probe function */ |
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| 162 | 177 | int meson_pinctrl_probe(struct platform_device *pdev); |
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| 178 | +/* Common ao groups extra dt parse function for SoCs before g12a */ |
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| 179 | +int meson8_aobus_parse_dt_extra(struct meson_pinctrl *pc); |
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| 180 | +/* Common extra dt parse function for SoCs like A1 */ |
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| 181 | +int meson_a1_parse_dt_extra(struct meson_pinctrl *pc); |
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