disable FB

hc

2024-01-04 1543e317f1da31b75942316931e8f491a8920811

 kernel/drivers/pinctrl/actions/pinctrl-owl.c
..
..
@@ -35,8 +35,12 @@
35
35
  * @pctrldev: pinctrl handle
36
36
  * @chip: gpio chip
37
37
  * @lock: spinlock to protect registers
38
+ * @clk: clock control
38
39
  * @soc: reference to soc_data
39
40
  * @base: pinctrl register base address
41
+ * @irq_chip: IRQ chip information
42
+ * @num_irq: number of possible interrupts
43
+ * @irq: interrupt numbers
40
44
  */
41
45
 struct owl_pinctrl {
42
46
 	struct device *dev;
..
..
@@ -121,7 +125,7 @@
121
125
 	seq_printf(s, "%s", dev_name(pctrl->dev));
122
126
 }
123
127
 
124
-static struct pinctrl_ops owl_pinctrl_ops = {
128
+static const struct pinctrl_ops owl_pinctrl_ops = {
125
129
 	.get_groups_count = owl_get_groups_count,
126
130
 	.get_group_name = owl_get_group_name,
127
131
 	.get_group_pins = owl_get_group_pins,
..
..
@@ -208,7 +212,7 @@
208
212
 	return 0;
209
213
 }
210
214
 
211
-static struct pinmux_ops owl_pinmux_ops = {
215
+static const struct pinmux_ops owl_pinmux_ops = {
212
216
 	.get_functions_count = owl_get_funcs_count,
213
217
 	.get_function_name = owl_get_func_name,
214
218
 	.get_function_groups = owl_get_func_groups,
..
..
@@ -246,60 +250,6 @@
246
250
 	return 0;
247
251
 }
248
252
 
249
-static int owl_pad_pinconf_arg2val(const struct owl_padinfo *info,
250
-				unsigned int param,
251
-				u32 *arg)
252
-{
253
-	switch (param) {
254
-	case PIN_CONFIG_BIAS_BUS_HOLD:
255
-		*arg = OWL_PINCONF_PULL_HOLD;
256
-		break;
257
-	case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
258
-		*arg = OWL_PINCONF_PULL_HIZ;
259
-		break;
260
-	case PIN_CONFIG_BIAS_PULL_DOWN:
261
-		*arg = OWL_PINCONF_PULL_DOWN;
262
-		break;
263
-	case PIN_CONFIG_BIAS_PULL_UP:
264
-		*arg = OWL_PINCONF_PULL_UP;
265
-		break;
266
-	case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
267
-		*arg = (*arg >= 1 ? 1 : 0);
268
-		break;
269
-	default:
270
-		return -ENOTSUPP;
271
-	}
272
-
273
-	return 0;
274
-}
275
-
276
-static int owl_pad_pinconf_val2arg(const struct owl_padinfo *padinfo,
277
-				unsigned int param,
278
-				u32 *arg)
279
-{
280
-	switch (param) {
281
-	case PIN_CONFIG_BIAS_BUS_HOLD:
282
-		*arg = *arg == OWL_PINCONF_PULL_HOLD;
283
-		break;
284
-	case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
285
-		*arg = *arg == OWL_PINCONF_PULL_HIZ;
286
-		break;
287
-	case PIN_CONFIG_BIAS_PULL_DOWN:
288
-		*arg = *arg == OWL_PINCONF_PULL_DOWN;
289
-		break;
290
-	case PIN_CONFIG_BIAS_PULL_UP:
291
-		*arg = *arg == OWL_PINCONF_PULL_UP;
292
-		break;
293
-	case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
294
-		*arg = *arg == 1;
295
-		break;
296
-	default:
297
-		return -ENOTSUPP;
298
-	}
299
-
300
-	return 0;
301
-}
302
-
303
253
 static int owl_pin_config_get(struct pinctrl_dev *pctrldev,
304
254
 				unsigned int pin,
305
255
 				unsigned long *config)
..
..
@@ -318,7 +268,10 @@
318
268
 
319
269
 	arg = owl_read_field(pctrl, reg, bit, width);
320
270
 
321
-	ret = owl_pad_pinconf_val2arg(info, param, &arg);
271
+	if (!pctrl->soc->padctl_val2arg)
272
+		return -ENOTSUPP;
273
+
274
+	ret = pctrl->soc->padctl_val2arg(info, param, &arg);
322
275
 	if (ret)
323
276
 		return ret;
324
277
 
..
..
@@ -349,7 +302,10 @@
349
302
 		if (ret)
350
303
 			return ret;
351
304
 
352
-		ret = owl_pad_pinconf_arg2val(info, param, &arg);
305
+		if (!pctrl->soc->padctl_arg2val)
306
+			return -ENOTSUPP;
307
+
308
+		ret = pctrl->soc->padctl_arg2val(info, param, &arg);
353
309
 		if (ret)
354
310
 			return ret;
355
311
 
..
..
@@ -488,7 +444,6 @@
488
444
 	*config = pinconf_to_config_packed(param, arg);
489
445
 
490
446
 	return ret;
491
-
492
447
 }
493
448
 
494
449
 static int owl_group_config_set(struct pinctrl_dev *pctrldev,
..
..
@@ -787,7 +742,7 @@
787
742
 	val = readl_relaxed(gpio_base + port->intc_msk);
788
743
 	if (val == 0)
789
744
 		owl_gpio_update_reg(gpio_base + port->intc_ctl,
790
-					OWL_GPIO_CTLR_ENABLE, false);
745
+					OWL_GPIO_CTLR_ENABLE + port->shared_ctl_offset * 5, false);
791
746
 
792
747
 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
793
748
 }
..
..
@@ -811,7 +766,8 @@
811
766
 
812
767
 	/* enable port interrupt */
813
768
 	value = readl_relaxed(gpio_base + port->intc_ctl);
814
-	value |= BIT(OWL_GPIO_CTLR_ENABLE) | BIT(OWL_GPIO_CTLR_SAMPLE_CLK_24M);
769
+	value |= ((BIT(OWL_GPIO_CTLR_ENABLE) | BIT(OWL_GPIO_CTLR_SAMPLE_CLK_24M))
770
+			<< port->shared_ctl_offset * 5);
815
771
 	writel_relaxed(value, gpio_base + port->intc_ctl);
816
772
 
817
773
 	/* enable GPIO interrupt */
..
..
@@ -849,7 +805,7 @@
849
805
 	raw_spin_lock_irqsave(&pctrl->lock, flags);
850
806
 
851
807
 	owl_gpio_update_reg(gpio_base + port->intc_ctl,
852
-				OWL_GPIO_CTLR_PENDING, true);
808
+				OWL_GPIO_CTLR_PENDING + port->shared_ctl_offset * 5, true);
853
809
 
854
810
 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
855
811
 }
..
..
@@ -962,7 +918,6 @@
962
918
 int owl_pinctrl_probe(struct platform_device *pdev,
963
919
 				struct owl_pinctrl_soc_data *soc_data)
964
920
 {
965
-	struct resource *res;
966
921
 	struct owl_pinctrl *pctrl;
967
922
 	int ret, i;
968
923
 
..
..
@@ -970,8 +925,7 @@
970
925
 	if (!pctrl)
971
926
 		return -ENOMEM;
972
927
 
973
-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
974
-	pctrl->base = devm_ioremap_resource(&pdev->dev, res);
928
+	pctrl->base = devm_platform_ioremap_resource(pdev, 0);
975
929
 	if (IS_ERR(pctrl->base))
976
930
 		return PTR_ERR(pctrl->base);
977
931