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| 1 | +/* SPDX-License-Identifier: GPL-2.0-or-later */ |
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| 1 | 2 | /* Freescale QUICC Engine HDLC Device Driver |
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| 2 | 3 | * |
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| 3 | 4 | * Copyright 2014 Freescale Semiconductor Inc. |
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| 4 | | - * |
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| 5 | | - * This program is free software; you can redistribute it and/or modify it |
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| 6 | | - * under the terms of the GNU General Public License as published by the |
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| 7 | | - * Free Software Foundation; either version 2 of the License, or (at your |
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| 8 | | - * option) any later version. |
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| 9 | 5 | */ |
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| 10 | 6 | |
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| 11 | 7 | #ifndef _UCC_HDLC_H_ |
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| .. | .. |
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| 102 | 98 | |
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| 103 | 99 | unsigned short tx_ring_size; |
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| 104 | 100 | unsigned short rx_ring_size; |
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| 105 | | - u32 ucc_pram_offset; |
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| 101 | + s32 ucc_pram_offset; |
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| 106 | 102 | |
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| 107 | 103 | unsigned short encoding; |
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| 108 | 104 | unsigned short parity; |
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| 105 | + unsigned short hmask; |
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| 109 | 106 | u32 clocking; |
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| 110 | 107 | spinlock_t lock; /* lock for Tx BD and Tx buffer */ |
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| 111 | 108 | #ifdef CONFIG_PM |
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