~hc/RK356X_SDK_RELEASE.git

..	..	@@ -32,6 +32,7 @@
32	32
33	33	#include "en.h"
34	34	#include "en/port.h"
	35	+#include "en/xsk/pool.h"
35	36	#include "lib/clock.h"
36	37
37	38	void mlx5e_ethtool_get_drvinfo(struct mlx5e_priv *priv,
..	..	@@ -46,7 +47,7 @@
46	47	"%d.%d.%04d (%.16s)",
47	48	fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev),
48	49	mdev->board_id);
49		- strlcpy(drvinfo->bus_info, pci_name(mdev->pdev),
	50	+ strlcpy(drvinfo->bus_info, dev_name(mdev->device),
50	51	sizeof(drvinfo->bus_info));
51	52	}
52	53
..	..	@@ -63,92 +64,185 @@
63	64	__ETHTOOL_DECLARE_LINK_MODE_MASK(advertised);
64	65	};
65	66
66		-static struct ptys2ethtool_config ptys2ethtool_table[MLX5E_LINK_MODES_NUMBER];
	67	+static
	68	+struct ptys2ethtool_config ptys2legacy_ethtool_table[MLX5E_LINK_MODES_NUMBER];
	69	+static
	70	+struct ptys2ethtool_config ptys2ext_ethtool_table[MLX5E_EXT_LINK_MODES_NUMBER];
67	71
68		-#define MLX5_BUILD_PTYS2ETHTOOL_CONFIG(reg_, ...) \
	72	+#define MLX5_BUILD_PTYS2ETHTOOL_CONFIG(reg_, table, ...) \
69	73	({ \
70	74	struct ptys2ethtool_config *cfg; \
71	75	const unsigned int modes[] = { __VA_ARGS__ }; \
72		- unsigned int i; \
73		- cfg = &ptys2ethtool_table[reg_]; \
	76	+ unsigned int i, bit, idx; \
	77	+ cfg = &ptys2##table##_ethtool_table[reg_]; \
74	78	bitmap_zero(cfg->supported, \
75	79	__ETHTOOL_LINK_MODE_MASK_NBITS); \
76	80	bitmap_zero(cfg->advertised, \
77	81	__ETHTOOL_LINK_MODE_MASK_NBITS); \
78	82	for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) { \
79		- __set_bit(modes[i], cfg->supported); \
80		- __set_bit(modes[i], cfg->advertised); \
	83	+ bit = modes[i] % 64; \
	84	+ idx = modes[i] / 64; \
	85	+ __set_bit(bit, &cfg->supported[idx]); \
	86	+ __set_bit(bit, &cfg->advertised[idx]); \
81	87	} \
82	88	})
83	89
84	90	void mlx5e_build_ptys2ethtool_map(void)
85	91	{
86		- MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_CX_SGMII,
	92	+ memset(ptys2legacy_ethtool_table, 0, sizeof(ptys2legacy_ethtool_table));
	93	+ memset(ptys2ext_ethtool_table, 0, sizeof(ptys2ext_ethtool_table));
	94	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_CX_SGMII, legacy,
87	95	ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
88		- MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_KX,
	96	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_KX, legacy,
89	97	ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
90		- MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CX4,
	98	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CX4, legacy,
91	99	ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
92		- MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KX4,
	100	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KX4, legacy,
93	101	ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
94		- MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KR,
	102	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KR, legacy,
95	103	ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
96		- MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_20GBASE_KR2,
	104	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_20GBASE_KR2, legacy,
97	105	ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
98		- MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_CR4,
	106	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_CR4, legacy,
99	107	ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT);
100		- MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_KR4,
	108	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_KR4, legacy,
101	109	ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT);
102		- MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_56GBASE_R4,
	110	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_56GBASE_R4, legacy,
103	111	ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT);
104		- MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CR,
	112	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CR, legacy,
105	113	ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
106		- MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_SR,
	114	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_SR, legacy,
107	115	ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
108		- MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_ER,
	116	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_ER, legacy,
109	117	ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
110		- MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_SR4,
	118	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_SR4, legacy,
111	119	ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT);
112		- MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_LR4,
	120	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_LR4, legacy,
113	121	ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
114		- MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_SR2,
	122	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_SR2, legacy,
115	123	ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
116		- MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_CR4,
	124	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_CR4, legacy,
117	125	ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT);
118		- MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_SR4,
	126	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_SR4, legacy,
119	127	ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT);
120		- MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_KR4,
	128	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_KR4, legacy,
121	129	ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT);
122		- MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_LR4,
	130	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_LR4, legacy,
123	131	ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
124		- MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_T,
	132	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_T, legacy,
125	133	ETHTOOL_LINK_MODE_10000baseT_Full_BIT);
126		- MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_CR,
	134	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_CR, legacy,
127	135	ETHTOOL_LINK_MODE_25000baseCR_Full_BIT);
128		- MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_KR,
	136	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_KR, legacy,
129	137	ETHTOOL_LINK_MODE_25000baseKR_Full_BIT);
130		- MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_SR,
	138	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_SR, legacy,
131	139	ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
132		- MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_CR2,
	140	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_CR2, legacy,
133	141	ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT);
134		- MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_KR2,
	142	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_KR2, legacy,
135	143	ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT);
	144	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_SGMII_100M, ext,
	145	+ ETHTOOL_LINK_MODE_100baseT_Full_BIT);
	146	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_X_SGMII, ext,
	147	+ ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
	148	+ ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
	149	+ ETHTOOL_LINK_MODE_1000baseX_Full_BIT);
	150	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_5GBASE_R, ext,
	151	+ ETHTOOL_LINK_MODE_5000baseT_Full_BIT);
	152	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_XFI_XAUI_1, ext,
	153	+ ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
	154	+ ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
	155	+ ETHTOOL_LINK_MODE_10000baseR_FEC_BIT,
	156	+ ETHTOOL_LINK_MODE_10000baseCR_Full_BIT,
	157	+ ETHTOOL_LINK_MODE_10000baseSR_Full_BIT,
	158	+ ETHTOOL_LINK_MODE_10000baseLR_Full_BIT,
	159	+ ETHTOOL_LINK_MODE_10000baseER_Full_BIT);
	160	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_XLAUI_4_XLPPI_4, ext,
	161	+ ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
	162	+ ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
	163	+ ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
	164	+ ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
	165	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GAUI_1_25GBASE_CR_KR, ext,
	166	+ ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
	167	+ ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
	168	+ ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
	169	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GAUI_2_LAUI_2_50GBASE_CR2_KR2,
	170	+ ext,
	171	+ ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
	172	+ ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
	173	+ ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
	174	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GAUI_1_LAUI_1_50GBASE_CR_KR, ext,
	175	+ ETHTOOL_LINK_MODE_50000baseKR_Full_BIT,
	176	+ ETHTOOL_LINK_MODE_50000baseSR_Full_BIT,
	177	+ ETHTOOL_LINK_MODE_50000baseCR_Full_BIT,
	178	+ ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
	179	+ ETHTOOL_LINK_MODE_50000baseDR_Full_BIT);
	180	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_CAUI_4_100GBASE_CR4_KR4, ext,
	181	+ ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
	182	+ ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
	183	+ ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
	184	+ ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
	185	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GAUI_2_100GBASE_CR2_KR2, ext,
	186	+ ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT,
	187	+ ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT,
	188	+ ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT,
	189	+ ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
	190	+ ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT);
	191	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_200GAUI_4_200GBASE_CR4_KR4, ext,
	192	+ ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT,
	193	+ ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT,
	194	+ ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
	195	+ ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT,
	196	+ ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT);
	197	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GAUI_1_100GBASE_CR_KR, ext,
	198	+ ETHTOOL_LINK_MODE_100000baseKR_Full_BIT,
	199	+ ETHTOOL_LINK_MODE_100000baseSR_Full_BIT,
	200	+ ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
	201	+ ETHTOOL_LINK_MODE_100000baseDR_Full_BIT,
	202	+ ETHTOOL_LINK_MODE_100000baseCR_Full_BIT);
	203	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_200GAUI_2_200GBASE_CR2_KR2, ext,
	204	+ ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT,
	205	+ ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT,
	206	+ ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
	207	+ ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT,
	208	+ ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT);
	209	+ MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_400GAUI_4_400GBASE_CR4_KR4, ext,
	210	+ ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT,
	211	+ ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT,
	212	+ ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
	213	+ ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT,
	214	+ ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT);
136	215	}
	216	+
	217	+static void mlx5e_ethtool_get_speed_arr(struct mlx5_core_dev *mdev,
	218	+ struct ptys2ethtool_config **arr,
	219	+ u32 *size)
	220	+{
	221	+ bool ext = mlx5e_ptys_ext_supported(mdev);
	222	+
	223	+ *arr = ext ? ptys2ext_ethtool_table : ptys2legacy_ethtool_table;
	224	+ *size = ext ? ARRAY_SIZE(ptys2ext_ethtool_table) :
	225	+ ARRAY_SIZE(ptys2legacy_ethtool_table);
	226	+}
	227	+
	228	+typedef int (mlx5e_pflag_handler)(struct net_device netdev, bool enable);
	229	+
	230	+struct pflag_desc {
	231	+ char name[ETH_GSTRING_LEN];
	232	+ mlx5e_pflag_handler handler;
	233	+};
	234	+
	235	+static const struct pflag_desc mlx5e_priv_flags[MLX5E_NUM_PFLAGS];
137	236
138	237	int mlx5e_ethtool_get_sset_count(struct mlx5e_priv *priv, int sset)
139	238	{
140		- int i, num_stats = 0;
141		-
142	239	switch (sset) {
143	240	case ETH_SS_STATS:
144		- for (i = 0; i < mlx5e_num_stats_grps; i++)
145		- num_stats += mlx5e_stats_grps[i].get_num_stats(priv);
146		- return num_stats;
	241	+ return mlx5e_stats_total_num(priv);
147	242	case ETH_SS_PRIV_FLAGS:
148		- return ARRAY_SIZE(mlx5e_priv_flags);
	243	+ return MLX5E_NUM_PFLAGS;
149	244	case ETH_SS_TEST:
150	245	return mlx5e_self_test_num(priv);
151		- /* fallthrough */
152	246	default:
153	247	return -EOPNOTSUPP;
154	248	}
..	..	@@ -161,22 +255,15 @@
161	255	return mlx5e_ethtool_get_sset_count(priv, sset);
162	256	}
163	257
164		-static void mlx5e_fill_stats_strings(struct mlx5e_priv priv, u8 data)
165		-{
166		- int i, idx = 0;
167		-
168		- for (i = 0; i < mlx5e_num_stats_grps; i++)
169		- idx = mlx5e_stats_grps[i].fill_strings(priv, data, idx);
170		-}
171		-
172	258	void mlx5e_ethtool_get_strings(struct mlx5e_priv priv, u32 stringset, u8 data)
173	259	{
174	260	int i;
175	261
176	262	switch (stringset) {
177	263	case ETH_SS_PRIV_FLAGS:
178		- for (i = 0; i < ARRAY_SIZE(mlx5e_priv_flags); i++)
179		- strcpy(data + i * ETH_GSTRING_LEN, mlx5e_priv_flags[i]);
	264	+ for (i = 0; i < MLX5E_NUM_PFLAGS; i++)
	265	+ strcpy(data + i * ETH_GSTRING_LEN,
	266	+ mlx5e_priv_flags[i].name);
180	267	break;
181	268
182	269	case ETH_SS_TEST:
..	..	@@ -186,7 +273,7 @@
186	273	break;
187	274
188	275	case ETH_SS_STATS:
189		- mlx5e_fill_stats_strings(priv, data);
	276	+ mlx5e_stats_fill_strings(priv, data);
190	277	break;
191	278	}
192	279	}
..	..	@@ -201,14 +288,13 @@
201	288	void mlx5e_ethtool_get_ethtool_stats(struct mlx5e_priv *priv,
202	289	struct ethtool_stats stats, u64 data)
203	290	{
204		- int i, idx = 0;
	291	+ int idx = 0;
205	292
206	293	mutex_lock(&priv->state_lock);
207		- mlx5e_update_stats(priv);
	294	+ mlx5e_stats_update(priv);
208	295	mutex_unlock(&priv->state_lock);
209	296
210		- for (i = 0; i < mlx5e_num_stats_grps; i++)
211		- idx = mlx5e_stats_grps[i].fill_stats(priv, data, idx);
	297	+ mlx5e_stats_fill(priv, data, idx);
212	298	}
213	299
214	300	static void mlx5e_get_ethtool_stats(struct net_device *dev,
..	..	@@ -288,11 +374,7 @@
288	374	goto unlock;
289	375	}
290	376
291		- err = mlx5e_open_channels(priv, &new_channels);
292		- if (err)
293		- goto unlock;
294		-
295		- mlx5e_switch_priv_channels(priv, &new_channels, NULL);
	377	+ err = mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL);
296	378
297	379	unlock:
298	380	mutex_unlock(&priv->state_lock);
..	..	@@ -311,8 +393,17 @@
311	393	void mlx5e_ethtool_get_channels(struct mlx5e_priv *priv,
312	394	struct ethtool_channels *ch)
313	395	{
314		- ch->max_combined = priv->profile->max_nch(priv->mdev);
	396	+ mutex_lock(&priv->state_lock);
	397	+
	398	+ ch->max_combined = priv->max_nch;
315	399	ch->combined_count = priv->channels.params.num_channels;
	400	+ if (priv->xsk.refcnt) {
	401	+ /* The upper half are XSK queues. */
	402	+ ch->max_combined *= 2;
	403	+ ch->combined_count *= 2;
	404	+ }
	405	+
	406	+ mutex_unlock(&priv->state_lock);
316	407	}
317	408
318	409	static void mlx5e_get_channels(struct net_device *dev,
..	..	@@ -326,6 +417,7 @@
326	417	int mlx5e_ethtool_set_channels(struct mlx5e_priv *priv,
327	418	struct ethtool_channels *ch)
328	419	{
	420	+ struct mlx5e_params *cur_params = &priv->channels.params;
329	421	unsigned int count = ch->combined_count;
330	422	struct mlx5e_channels new_channels = {};
331	423	bool arfs_enabled;
..	..	@@ -337,39 +429,50 @@
337	429	return -EINVAL;
338	430	}
339	431
340		- if (priv->channels.params.num_channels == count)
	432	+ if (cur_params->num_channels == count)
341	433	return 0;
342	434
343	435	mutex_lock(&priv->state_lock);
344	436
345		- new_channels.params = priv->channels.params;
346		- new_channels.params.num_channels = count;
347		- if (!netif_is_rxfh_configured(priv->netdev))
348		- mlx5e_build_default_indir_rqt(new_channels.params.indirection_rqt,
349		- MLX5E_INDIR_RQT_SIZE, count);
350		-
351		- if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
352		- priv->channels.params = new_channels.params;
	437	+ /* Don't allow changing the number of channels if there is an active
	438	+ * XSK, because the numeration of the XSK and regular RQs will change.
	439	+ */
	440	+ if (priv->xsk.refcnt) {
	441	+ err = -EINVAL;
	442	+ netdev_err(priv->netdev, "%s: AF_XDP is active, cannot change the number of channels\n",
	443	+ __func__);
353	444	goto out;
354	445	}
355	446
356		- /* Create fresh channels with new parameters */
357		- err = mlx5e_open_channels(priv, &new_channels);
358		- if (err)
	447	+ new_channels.params = *cur_params;
	448	+ new_channels.params.num_channels = count;
	449	+
	450	+ if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
	451	+ struct mlx5e_params old_params;
	452	+
	453	+ old_params = *cur_params;
	454	+ *cur_params = new_channels.params;
	455	+ err = mlx5e_num_channels_changed(priv);
	456	+ if (err)
	457	+ *cur_params = old_params;
	458	+
359	459	goto out;
	460	+ }
360	461
361	462	arfs_enabled = priv->netdev->features & NETIF_F_NTUPLE;
362	463	if (arfs_enabled)
363	464	mlx5e_arfs_disable(priv);
364	465
365	466	/* Switch to new channels, set new parameters and close old ones */
366		- mlx5e_switch_priv_channels(priv, &new_channels, NULL);
	467	+ err = mlx5e_safe_switch_channels(priv, &new_channels,
	468	+ mlx5e_num_channels_changed_ctx, NULL);
367	469
368	470	if (arfs_enabled) {
369		- err = mlx5e_arfs_enable(priv);
370		- if (err)
	471	+ int err2 = mlx5e_arfs_enable(priv);
	472	+
	473	+ if (err2)
371	474	netdev_err(priv->netdev, "%s: mlx5e_arfs_enable failed: %d\n",
372		- __func__, err);
	475	+ __func__, err2);
373	476	}
374	477
375	478	out:
..	..	@@ -389,7 +492,7 @@
389	492	int mlx5e_ethtool_get_coalesce(struct mlx5e_priv *priv,
390	493	struct ethtool_coalesce *coal)
391	494	{
392		- struct net_dim_cq_moder rx_moder, tx_moder;
	495	+ struct dim_cq_moder rx_moder, tx_moder;
393	496
394	497	if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
395	498	return -EOPNOTSUPP;
..	..	@@ -419,7 +522,7 @@
419	522	#define MLX5E_MAX_COAL_FRAMES MLX5_MAX_CQ_COUNT
420	523
421	524	static void
422		-mlx5e_set_priv_channels_coalesce(struct mlx5e_priv priv, struct ethtool_coalesce coal)
	525	+mlx5e_set_priv_channels_tx_coalesce(struct mlx5e_priv priv, struct ethtool_coalesce coal)
423	526	{
424	527	struct mlx5_core_dev *mdev = priv->mdev;
425	528	int tc;
..	..	@@ -434,6 +537,17 @@
434	537	coal->tx_coalesce_usecs,
435	538	coal->tx_max_coalesced_frames);
436	539	}
	540	+ }
	541	+}
	542	+
	543	+static void
	544	+mlx5e_set_priv_channels_rx_coalesce(struct mlx5e_priv priv, struct ethtool_coalesce coal)
	545	+{
	546	+ struct mlx5_core_dev *mdev = priv->mdev;
	547	+ int i;
	548	+
	549	+ for (i = 0; i < priv->channels.num; ++i) {
	550	+ struct mlx5e_channel *c = priv->channels.c[i];
437	551
438	552	mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
439	553	coal->rx_coalesce_usecs,
..	..	@@ -444,11 +558,11 @@
444	558	int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv,
445	559	struct ethtool_coalesce *coal)
446	560	{
447		- struct net_dim_cq_moder rx_moder, tx_moder;
	561	+ struct dim_cq_moder rx_moder, tx_moder;
448	562	struct mlx5_core_dev *mdev = priv->mdev;
449	563	struct mlx5e_channels new_channels = {};
	564	+ bool reset_rx, reset_tx;
450	565	int err = 0;
451		- bool reset;
452	566
453	567	if (!MLX5_CAP_GEN(mdev, cq_moderation))
454	568	return -EOPNOTSUPP;
..	..	@@ -480,27 +594,37 @@
480	594	tx_moder->pkts = coal->tx_max_coalesced_frames;
481	595	new_channels.params.tx_dim_enabled = !!coal->use_adaptive_tx_coalesce;
482	596
	597	+ reset_rx = !!coal->use_adaptive_rx_coalesce != priv->channels.params.rx_dim_enabled;
	598	+ reset_tx = !!coal->use_adaptive_tx_coalesce != priv->channels.params.tx_dim_enabled;
	599	+
	600	+ if (reset_rx) {
	601	+ u8 mode = MLX5E_GET_PFLAG(&new_channels.params,
	602	+ MLX5E_PFLAG_RX_CQE_BASED_MODER);
	603	+
	604	+ mlx5e_reset_rx_moderation(&new_channels.params, mode);
	605	+ }
	606	+ if (reset_tx) {
	607	+ u8 mode = MLX5E_GET_PFLAG(&new_channels.params,
	608	+ MLX5E_PFLAG_TX_CQE_BASED_MODER);
	609	+
	610	+ mlx5e_reset_tx_moderation(&new_channels.params, mode);
	611	+ }
	612	+
483	613	if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
484	614	priv->channels.params = new_channels.params;
485	615	goto out;
486	616	}
487		- /* we are opened */
488	617
489		- reset = (!!coal->use_adaptive_rx_coalesce != priv->channels.params.rx_dim_enabled) \|\|
490		- (!!coal->use_adaptive_tx_coalesce != priv->channels.params.tx_dim_enabled);
491		-
492		- if (!reset) {
493		- mlx5e_set_priv_channels_coalesce(priv, coal);
	618	+ if (!reset_rx && !reset_tx) {
	619	+ if (!coal->use_adaptive_rx_coalesce)
	620	+ mlx5e_set_priv_channels_rx_coalesce(priv, coal);
	621	+ if (!coal->use_adaptive_tx_coalesce)
	622	+ mlx5e_set_priv_channels_tx_coalesce(priv, coal);
494	623	priv->channels.params = new_channels.params;
495	624	goto out;
496	625	}
497	626
498		- /* open fresh channels with new coal parameters */
499		- err = mlx5e_open_channels(priv, &new_channels);
500		- if (err)
501		- goto out;
502		-
503		- mlx5e_switch_priv_channels(priv, &new_channels, NULL);
	627	+ err = mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL);
504	628
505	629	out:
506	630	mutex_unlock(&priv->state_lock);
..	..	@@ -515,35 +639,116 @@
515	639	return mlx5e_ethtool_set_coalesce(priv, coal);
516	640	}
517	641
518		-static void ptys2ethtool_supported_link(unsigned long *supported_modes,
	642	+static void ptys2ethtool_supported_link(struct mlx5_core_dev *mdev,
	643	+ unsigned long *supported_modes,
519	644	u32 eth_proto_cap)
520	645	{
521	646	unsigned long proto_cap = eth_proto_cap;
	647	+ struct ptys2ethtool_config *table;
	648	+ u32 max_size;
522	649	int proto;
523	650
524		- for_each_set_bit(proto, &proto_cap, MLX5E_LINK_MODES_NUMBER)
	651	+ mlx5e_ethtool_get_speed_arr(mdev, &table, &max_size);
	652	+ for_each_set_bit(proto, &proto_cap, max_size)
525	653	bitmap_or(supported_modes, supported_modes,
526		- ptys2ethtool_table[proto].supported,
	654	+ table[proto].supported,
527	655	__ETHTOOL_LINK_MODE_MASK_NBITS);
528	656	}
529	657
530	658	static void ptys2ethtool_adver_link(unsigned long *advertising_modes,
531		- u32 eth_proto_cap)
	659	+ u32 eth_proto_cap, bool ext)
532	660	{
533	661	unsigned long proto_cap = eth_proto_cap;
	662	+ struct ptys2ethtool_config *table;
	663	+ u32 max_size;
534	664	int proto;
535	665
536		- for_each_set_bit(proto, &proto_cap, MLX5E_LINK_MODES_NUMBER)
	666	+ table = ext ? ptys2ext_ethtool_table : ptys2legacy_ethtool_table;
	667	+ max_size = ext ? ARRAY_SIZE(ptys2ext_ethtool_table) :
	668	+ ARRAY_SIZE(ptys2legacy_ethtool_table);
	669	+
	670	+ for_each_set_bit(proto, &proto_cap, max_size)
537	671	bitmap_or(advertising_modes, advertising_modes,
538		- ptys2ethtool_table[proto].advertised,
	672	+ table[proto].advertised,
539	673	__ETHTOOL_LINK_MODE_MASK_NBITS);
540	674	}
541	675
542		-static void ptys2ethtool_supported_advertised_port(struct ethtool_link_ksettings *link_ksettings,
543		- u32 eth_proto_cap,
544		- u8 connector_type)
	676	+static const u32 pplm_fec_2_ethtool[] = {
	677	+ [MLX5E_FEC_NOFEC] = ETHTOOL_FEC_OFF,
	678	+ [MLX5E_FEC_FIRECODE] = ETHTOOL_FEC_BASER,
	679	+ [MLX5E_FEC_RS_528_514] = ETHTOOL_FEC_RS,
	680	+ [MLX5E_FEC_RS_544_514] = ETHTOOL_FEC_RS,
	681	+ [MLX5E_FEC_LLRS_272_257_1] = ETHTOOL_FEC_LLRS,
	682	+};
	683	+
	684	+static u32 pplm2ethtool_fec(u_long fec_mode, unsigned long size)
545	685	{
546		- if (!connector_type \|\| connector_type >= MLX5E_CONNECTOR_TYPE_NUMBER) {
	686	+ int mode = 0;
	687	+
	688	+ if (!fec_mode)
	689	+ return ETHTOOL_FEC_AUTO;
	690	+
	691	+ mode = find_first_bit(&fec_mode, size);
	692	+
	693	+ if (mode < ARRAY_SIZE(pplm_fec_2_ethtool))
	694	+ return pplm_fec_2_ethtool[mode];
	695	+
	696	+ return 0;
	697	+}
	698	+
	699	+#define MLX5E_ADVERTISE_SUPPORTED_FEC(mlx5_fec, ethtool_fec) \
	700	+ do { \
	701	+ if (mlx5e_fec_in_caps(dev, 1 << (mlx5_fec))) \
	702	+ __set_bit(ethtool_fec, \
	703	+ link_ksettings->link_modes.supported);\
	704	+ } while (0)
	705	+
	706	+static const u32 pplm_fec_2_ethtool_linkmodes[] = {
	707	+ [MLX5E_FEC_NOFEC] = ETHTOOL_LINK_MODE_FEC_NONE_BIT,
	708	+ [MLX5E_FEC_FIRECODE] = ETHTOOL_LINK_MODE_FEC_BASER_BIT,
	709	+ [MLX5E_FEC_RS_528_514] = ETHTOOL_LINK_MODE_FEC_RS_BIT,
	710	+ [MLX5E_FEC_RS_544_514] = ETHTOOL_LINK_MODE_FEC_RS_BIT,
	711	+ [MLX5E_FEC_LLRS_272_257_1] = ETHTOOL_LINK_MODE_FEC_LLRS_BIT,
	712	+};
	713	+
	714	+static int get_fec_supported_advertised(struct mlx5_core_dev *dev,
	715	+ struct ethtool_link_ksettings *link_ksettings)
	716	+{
	717	+ unsigned long active_fec_long;
	718	+ u32 active_fec;
	719	+ u32 bitn;
	720	+ int err;
	721	+
	722	+ err = mlx5e_get_fec_mode(dev, &active_fec, NULL);
	723	+ if (err)
	724	+ return (err == -EOPNOTSUPP) ? 0 : err;
	725	+
	726	+ MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_NOFEC,
	727	+ ETHTOOL_LINK_MODE_FEC_NONE_BIT);
	728	+ MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_FIRECODE,
	729	+ ETHTOOL_LINK_MODE_FEC_BASER_BIT);
	730	+ MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_RS_528_514,
	731	+ ETHTOOL_LINK_MODE_FEC_RS_BIT);
	732	+ MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_LLRS_272_257_1,
	733	+ ETHTOOL_LINK_MODE_FEC_LLRS_BIT);
	734	+
	735	+ active_fec_long = active_fec;
	736	+ /* active fec is a bit set, find out which bit is set and
	737	+ * advertise the corresponding ethtool bit
	738	+ */
	739	+ bitn = find_first_bit(&active_fec_long, sizeof(active_fec_long) * BITS_PER_BYTE);
	740	+ if (bitn < ARRAY_SIZE(pplm_fec_2_ethtool_linkmodes))
	741	+ __set_bit(pplm_fec_2_ethtool_linkmodes[bitn],
	742	+ link_ksettings->link_modes.advertising);
	743	+
	744	+ return 0;
	745	+}
	746	+
	747	+static void ptys2ethtool_supported_advertised_port(struct mlx5_core_dev *mdev,
	748	+ struct ethtool_link_ksettings *link_ksettings,
	749	+ u32 eth_proto_cap, u8 connector_type)
	750	+{
	751	+ if (!MLX5_CAP_PCAM_FEATURE(mdev, ptys_connector_type)) {
547	752	if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
548	753	\| MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
549	754	\| MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
..	..	@@ -618,18 +823,23 @@
618	823	}
619	824
620	825	static void get_speed_duplex(struct net_device *netdev,
621		- u32 eth_proto_oper,
	826	+ u32 eth_proto_oper, bool force_legacy,
	827	+ u16 data_rate_oper,
622	828	struct ethtool_link_ksettings *link_ksettings)
623	829	{
	830	+ struct mlx5e_priv *priv = netdev_priv(netdev);
624	831	u32 speed = SPEED_UNKNOWN;
625	832	u8 duplex = DUPLEX_UNKNOWN;
626	833
627	834	if (!netif_carrier_ok(netdev))
628	835	goto out;
629	836
630		- speed = mlx5e_port_ptys2speed(eth_proto_oper);
	837	+ speed = mlx5e_port_ptys2speed(priv->mdev, eth_proto_oper, force_legacy);
631	838	if (!speed) {
632		- speed = SPEED_UNKNOWN;
	839	+ if (data_rate_oper)
	840	+ speed = 100 * data_rate_oper;
	841	+ else
	842	+ speed = SPEED_UNKNOWN;
633	843	goto out;
634	844	}
635	845
..	..	@@ -640,22 +850,22 @@
640	850	link_ksettings->base.duplex = duplex;
641	851	}
642	852
643		-static void get_supported(u32 eth_proto_cap,
	853	+static void get_supported(struct mlx5_core_dev *mdev, u32 eth_proto_cap,
644	854	struct ethtool_link_ksettings *link_ksettings)
645	855	{
646	856	unsigned long *supported = link_ksettings->link_modes.supported;
	857	+ ptys2ethtool_supported_link(mdev, supported, eth_proto_cap);
647	858
648		- ptys2ethtool_supported_link(supported, eth_proto_cap);
649	859	ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Pause);
650	860	}
651	861
652		-static void get_advertising(u32 eth_proto_cap, u8 tx_pause,
653		- u8 rx_pause,
654		- struct ethtool_link_ksettings *link_ksettings)
	862	+static void get_advertising(u32 eth_proto_cap, u8 tx_pause, u8 rx_pause,
	863	+ struct ethtool_link_ksettings *link_ksettings,
	864	+ bool ext)
655	865	{
656	866	unsigned long *advertising = link_ksettings->link_modes.advertising;
	867	+ ptys2ethtool_adver_link(advertising, eth_proto_cap, ext);
657	868
658		- ptys2ethtool_adver_link(advertising, eth_proto_cap);
659	869	if (rx_pause)
660	870	ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Pause);
661	871	if (tx_pause ^ rx_pause)
..	..	@@ -674,9 +884,9 @@
674	884	[MLX5E_PORT_OTHER] = PORT_OTHER,
675	885	};
676	886
677		-static u8 get_connector_port(u32 eth_proto, u8 connector_type)
	887	+static u8 get_connector_port(struct mlx5_core_dev *mdev, u32 eth_proto, u8 connector_type)
678	888	{
679		- if (connector_type && connector_type < MLX5E_CONNECTOR_TYPE_NUMBER)
	889	+ if (MLX5_CAP_PCAM_FEATURE(mdev, ptys_connector_type))
680	890	return ptys2connector_type[connector_type];
681	891
682	892	if (eth_proto &
..	..	@@ -705,62 +915,84 @@
705	915	return PORT_OTHER;
706	916	}
707	917
708		-static void get_lp_advertising(u32 eth_proto_lp,
	918	+static void get_lp_advertising(struct mlx5_core_dev *mdev, u32 eth_proto_lp,
709	919	struct ethtool_link_ksettings *link_ksettings)
710	920	{
711	921	unsigned long *lp_advertising = link_ksettings->link_modes.lp_advertising;
	922	+ bool ext = mlx5e_ptys_ext_supported(mdev);
712	923
713		- ptys2ethtool_adver_link(lp_advertising, eth_proto_lp);
	924	+ ptys2ethtool_adver_link(lp_advertising, eth_proto_lp, ext);
714	925	}
715	926
716		-static int mlx5e_get_link_ksettings(struct net_device *netdev,
717		- struct ethtool_link_ksettings *link_ksettings)
	927	+int mlx5e_ethtool_get_link_ksettings(struct mlx5e_priv *priv,
	928	+ struct ethtool_link_ksettings *link_ksettings)
718	929	{
719		- struct mlx5e_priv *priv = netdev_priv(netdev);
720	930	struct mlx5_core_dev *mdev = priv->mdev;
721		- u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {0};
	931	+ u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {};
	932	+ u32 eth_proto_admin;
	933	+ u8 an_disable_admin;
	934	+ u16 data_rate_oper;
	935	+ u32 eth_proto_oper;
	936	+ u32 eth_proto_cap;
	937	+ u8 connector_type;
722	938	u32 rx_pause = 0;
723	939	u32 tx_pause = 0;
724		- u32 eth_proto_cap;
725		- u32 eth_proto_admin;
726	940	u32 eth_proto_lp;
727		- u32 eth_proto_oper;
728		- u8 an_disable_admin;
	941	+ bool admin_ext;
729	942	u8 an_status;
730		- u8 connector_type;
	943	+ bool ext;
731	944	int err;
732	945
733	946	err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
734	947	if (err) {
735		- netdev_err(netdev, "%s: query port ptys failed: %d\n",
	948	+ netdev_err(priv->netdev, "%s: query port ptys failed: %d\n",
736	949	__func__, err);
737		- goto err_query_ptys;
	950	+ goto err_query_regs;
	951	+ }
	952	+ ext = !!MLX5_GET_ETH_PROTO(ptys_reg, out, true, eth_proto_capability);
	953	+ eth_proto_cap = MLX5_GET_ETH_PROTO(ptys_reg, out, ext,
	954	+ eth_proto_capability);
	955	+ eth_proto_admin = MLX5_GET_ETH_PROTO(ptys_reg, out, ext,
	956	+ eth_proto_admin);
	957	+ /* Fields: eth_proto_admin and ext_eth_proto_admin are
	958	+ * mutually exclusive. Hence try reading legacy advertising
	959	+ * when extended advertising is zero.
	960	+ * admin_ext indicates which proto_admin (ext vs. legacy)
	961	+ * should be read and interpreted
	962	+ */
	963	+ admin_ext = ext;
	964	+ if (ext && !eth_proto_admin) {
	965	+ eth_proto_admin = MLX5_GET_ETH_PROTO(ptys_reg, out, false,
	966	+ eth_proto_admin);
	967	+ admin_ext = false;
738	968	}
739	969
740		- eth_proto_cap = MLX5_GET(ptys_reg, out, eth_proto_capability);
741		- eth_proto_admin = MLX5_GET(ptys_reg, out, eth_proto_admin);
742		- eth_proto_oper = MLX5_GET(ptys_reg, out, eth_proto_oper);
743		- eth_proto_lp = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
744		- an_disable_admin = MLX5_GET(ptys_reg, out, an_disable_admin);
745		- an_status = MLX5_GET(ptys_reg, out, an_status);
746		- connector_type = MLX5_GET(ptys_reg, out, connector_type);
	970	+ eth_proto_oper = MLX5_GET_ETH_PROTO(ptys_reg, out, admin_ext,
	971	+ eth_proto_oper);
	972	+ eth_proto_lp = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
	973	+ an_disable_admin = MLX5_GET(ptys_reg, out, an_disable_admin);
	974	+ an_status = MLX5_GET(ptys_reg, out, an_status);
	975	+ connector_type = MLX5_GET(ptys_reg, out, connector_type);
	976	+ data_rate_oper = MLX5_GET(ptys_reg, out, data_rate_oper);
747	977
748	978	mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
749	979
750	980	ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
751	981	ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
752	982
753		- get_supported(eth_proto_cap, link_ksettings);
754		- get_advertising(eth_proto_admin, tx_pause, rx_pause, link_ksettings);
755		- get_speed_duplex(netdev, eth_proto_oper, link_ksettings);
	983	+ get_supported(mdev, eth_proto_cap, link_ksettings);
	984	+ get_advertising(eth_proto_admin, tx_pause, rx_pause, link_ksettings,
	985	+ admin_ext);
	986	+ get_speed_duplex(priv->netdev, eth_proto_oper, !admin_ext,
	987	+ data_rate_oper, link_ksettings);
756	988
757	989	eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
758		-
759		- link_ksettings->base.port = get_connector_port(eth_proto_oper,
760		- connector_type);
761		- ptys2ethtool_supported_advertised_port(link_ksettings, eth_proto_admin,
	990	+ connector_type = connector_type < MLX5E_CONNECTOR_TYPE_NUMBER ?
	991	+ connector_type : MLX5E_PORT_UNKNOWN;
	992	+ link_ksettings->base.port = get_connector_port(mdev, eth_proto_oper, connector_type);
	993	+ ptys2ethtool_supported_advertised_port(mdev, link_ksettings, eth_proto_admin,
762	994	connector_type);
763		- get_lp_advertising(eth_proto_lp, link_ksettings);
	995	+ get_lp_advertising(mdev, eth_proto_lp, link_ksettings);
764	996
765	997	if (an_status == MLX5_AN_COMPLETE)
766	998	ethtool_link_ksettings_add_link_mode(link_ksettings,
..	..	@@ -770,12 +1002,44 @@
770	1002	AUTONEG_ENABLE;
771	1003	ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
772	1004	Autoneg);
	1005	+
	1006	+ err = get_fec_supported_advertised(mdev, link_ksettings);
	1007	+ if (err) {
	1008	+ netdev_dbg(priv->netdev, "%s: FEC caps query failed: %d\n",
	1009	+ __func__, err);
	1010	+ err = 0; /* don't fail caps query because of FEC error */
	1011	+ }
	1012	+
773	1013	if (!an_disable_admin)
774	1014	ethtool_link_ksettings_add_link_mode(link_ksettings,
775	1015	advertising, Autoneg);
776	1016
777		-err_query_ptys:
	1017	+err_query_regs:
778	1018	return err;
	1019	+}
	1020	+
	1021	+static int mlx5e_get_link_ksettings(struct net_device *netdev,
	1022	+ struct ethtool_link_ksettings *link_ksettings)
	1023	+{
	1024	+ struct mlx5e_priv *priv = netdev_priv(netdev);
	1025	+
	1026	+ return mlx5e_ethtool_get_link_ksettings(priv, link_ksettings);
	1027	+}
	1028	+
	1029	+static int mlx5e_speed_validate(struct net_device *netdev, bool ext,
	1030	+ const unsigned long link_modes, u8 autoneg)
	1031	+{
	1032	+ /* Extended link-mode has no speed limitations. */
	1033	+ if (ext)
	1034	+ return 0;
	1035	+
	1036	+ if ((link_modes & MLX5E_PROT_MASK(MLX5E_56GBASE_R4)) &&
	1037	+ autoneg != AUTONEG_ENABLE) {
	1038	+ netdev_err(netdev, "%s: 56G link speed requires autoneg enabled\n",
	1039	+ __func__);
	1040	+ return -EINVAL;
	1041	+ }
	1042	+ return 0;
779	1043	}
780	1044
781	1045	static u32 mlx5e_ethtool2ptys_adver_link(const unsigned long *link_modes)
..	..	@@ -783,7 +1047,9 @@
783	1047	u32 i, ptys_modes = 0;
784	1048
785	1049	for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
786		- if (bitmap_intersects(ptys2ethtool_table[i].advertised,
	1050	+ if (*ptys2legacy_ethtool_table[i].advertised == 0)
	1051	+ continue;
	1052	+ if (bitmap_intersects(ptys2legacy_ethtool_table[i].advertised,
787	1053	link_modes,
788	1054	__ETHTOOL_LINK_MODE_MASK_NBITS))
789	1055	ptys_modes \|= MLX5E_PROT_MASK(i);
..	..	@@ -792,128 +1058,172 @@
792	1058	return ptys_modes;
793	1059	}
794	1060
795		-static int mlx5e_set_link_ksettings(struct net_device *netdev,
796		- const struct ethtool_link_ksettings *link_ksettings)
	1061	+static u32 mlx5e_ethtool2ptys_ext_adver_link(const unsigned long *link_modes)
797	1062	{
798		- struct mlx5e_priv *priv = netdev_priv(netdev);
	1063	+ u32 i, ptys_modes = 0;
	1064	+ unsigned long modes[2];
	1065	+
	1066	+ for (i = 0; i < MLX5E_EXT_LINK_MODES_NUMBER; ++i) {
	1067	+ if (ptys2ext_ethtool_table[i].advertised[0] == 0 &&
	1068	+ ptys2ext_ethtool_table[i].advertised[1] == 0)
	1069	+ continue;
	1070	+ memset(modes, 0, sizeof(modes));
	1071	+ bitmap_and(modes, ptys2ext_ethtool_table[i].advertised,
	1072	+ link_modes, __ETHTOOL_LINK_MODE_MASK_NBITS);
	1073	+
	1074	+ if (modes[0] == ptys2ext_ethtool_table[i].advertised[0] &&
	1075	+ modes[1] == ptys2ext_ethtool_table[i].advertised[1])
	1076	+ ptys_modes \|= MLX5E_PROT_MASK(i);
	1077	+ }
	1078	+ return ptys_modes;
	1079	+}
	1080	+
	1081	+static bool ext_link_mode_requested(const unsigned long *adver)
	1082	+{
	1083	+#define MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT ETHTOOL_LINK_MODE_50000baseKR_Full_BIT
	1084	+ int size = __ETHTOOL_LINK_MODE_MASK_NBITS - MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT;
	1085	+ __ETHTOOL_DECLARE_LINK_MODE_MASK(modes) = {0,};
	1086	+
	1087	+ bitmap_set(modes, MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT, size);
	1088	+ return bitmap_intersects(modes, adver, __ETHTOOL_LINK_MODE_MASK_NBITS);
	1089	+}
	1090	+
	1091	+static bool ext_requested(u8 autoneg, const unsigned long *adver, bool ext_supported)
	1092	+{
	1093	+ bool ext_link_mode = ext_link_mode_requested(adver);
	1094	+
	1095	+ return autoneg == AUTONEG_ENABLE ? ext_link_mode : ext_supported;
	1096	+}
	1097	+
	1098	+int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv *priv,
	1099	+ const struct ethtool_link_ksettings *link_ksettings)
	1100	+{
799	1101	struct mlx5_core_dev *mdev = priv->mdev;
800		- u32 eth_proto_cap, eth_proto_admin;
	1102	+ struct mlx5e_port_eth_proto eproto;
	1103	+ const unsigned long *adver;
801	1104	bool an_changes = false;
802	1105	u8 an_disable_admin;
	1106	+ bool ext_supported;
803	1107	u8 an_disable_cap;
804	1108	bool an_disable;
805	1109	u32 link_modes;
806	1110	u8 an_status;
	1111	+ u8 autoneg;
807	1112	u32 speed;
	1113	+ bool ext;
808	1114	int err;
809	1115
	1116	+ u32 (ethtool2ptys_adver_func)(const unsigned long adver);
	1117	+
	1118	+ adver = link_ksettings->link_modes.advertising;
	1119	+ autoneg = link_ksettings->base.autoneg;
810	1120	speed = link_ksettings->base.speed;
811	1121
812		- link_modes = link_ksettings->base.autoneg == AUTONEG_ENABLE ?
813		- mlx5e_ethtool2ptys_adver_link(link_ksettings->link_modes.advertising) :
814		- mlx5e_port_speed2linkmodes(speed);
	1122	+ ext_supported = mlx5e_ptys_ext_supported(mdev);
	1123	+ ext = ext_requested(autoneg, adver, ext_supported);
	1124	+ if (!ext_supported && ext)
	1125	+ return -EOPNOTSUPP;
815	1126
816		- err = mlx5_query_port_proto_cap(mdev, &eth_proto_cap, MLX5_PTYS_EN);
	1127	+ ethtool2ptys_adver_func = ext ? mlx5e_ethtool2ptys_ext_adver_link :
	1128	+ mlx5e_ethtool2ptys_adver_link;
	1129	+ err = mlx5_port_query_eth_proto(mdev, 1, ext, &eproto);
817	1130	if (err) {
818		- netdev_err(netdev, "%s: query port eth proto cap failed: %d\n",
	1131	+ netdev_err(priv->netdev, "%s: query port eth proto failed: %d\n",
819	1132	__func__, err);
820	1133	goto out;
821	1134	}
	1135	+ link_modes = autoneg == AUTONEG_ENABLE ? ethtool2ptys_adver_func(adver) :
	1136	+ mlx5e_port_speed2linkmodes(mdev, speed, !ext);
822	1137
823		- link_modes = link_modes & eth_proto_cap;
	1138	+ err = mlx5e_speed_validate(priv->netdev, ext, link_modes, autoneg);
	1139	+ if (err)
	1140	+ goto out;
	1141	+
	1142	+ link_modes = link_modes & eproto.cap;
824	1143	if (!link_modes) {
825		- netdev_err(netdev, "%s: Not supported link mode(s) requested",
	1144	+ netdev_err(priv->netdev, "%s: Not supported link mode(s) requested",
826	1145	__func__);
827	1146	err = -EINVAL;
828	1147	goto out;
829	1148	}
830	1149
831		- err = mlx5_query_port_proto_admin(mdev, &eth_proto_admin, MLX5_PTYS_EN);
832		- if (err) {
833		- netdev_err(netdev, "%s: query port eth proto admin failed: %d\n",
834		- __func__, err);
835		- goto out;
836		- }
	1150	+ mlx5_port_query_eth_autoneg(mdev, &an_status, &an_disable_cap,
	1151	+ &an_disable_admin);
837	1152
838		- mlx5_query_port_autoneg(mdev, MLX5_PTYS_EN, &an_status,
839		- &an_disable_cap, &an_disable_admin);
840		-
841		- an_disable = link_ksettings->base.autoneg == AUTONEG_DISABLE;
	1153	+ an_disable = autoneg == AUTONEG_DISABLE;
842	1154	an_changes = ((!an_disable && an_disable_admin) \|\|
843	1155	(an_disable && !an_disable_admin));
844	1156
845		- if (!an_changes && link_modes == eth_proto_admin)
	1157	+ if (!an_changes && link_modes == eproto.admin)
846	1158	goto out;
847	1159
848		- mlx5_set_port_ptys(mdev, an_disable, link_modes, MLX5_PTYS_EN);
	1160	+ mlx5_port_set_eth_ptys(mdev, an_disable, link_modes, ext);
849	1161	mlx5_toggle_port_link(mdev);
850	1162
851	1163	out:
852	1164	return err;
853	1165	}
854	1166
	1167	+static int mlx5e_set_link_ksettings(struct net_device *netdev,
	1168	+ const struct ethtool_link_ksettings *link_ksettings)
	1169	+{
	1170	+ struct mlx5e_priv *priv = netdev_priv(netdev);
	1171	+
	1172	+ return mlx5e_ethtool_set_link_ksettings(priv, link_ksettings);
	1173	+}
	1174	+
	1175	+u32 mlx5e_ethtool_get_rxfh_key_size(struct mlx5e_priv *priv)
	1176	+{
	1177	+ return sizeof(priv->rss_params.toeplitz_hash_key);
	1178	+}
	1179	+
855	1180	static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
856	1181	{
857	1182	struct mlx5e_priv *priv = netdev_priv(netdev);
858	1183
859		- return sizeof(priv->channels.params.toeplitz_hash_key);
	1184	+ return mlx5e_ethtool_get_rxfh_key_size(priv);
860	1185	}
861	1186
862		-static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
	1187	+u32 mlx5e_ethtool_get_rxfh_indir_size(struct mlx5e_priv *priv)
863	1188	{
864	1189	return MLX5E_INDIR_RQT_SIZE;
865	1190	}
866	1191
867		-static int mlx5e_get_rxfh(struct net_device netdev, u32 indir, u8 *key,
868		- u8 *hfunc)
	1192	+static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
869	1193	{
870	1194	struct mlx5e_priv *priv = netdev_priv(netdev);
871	1195
	1196	+ return mlx5e_ethtool_get_rxfh_indir_size(priv);
	1197	+}
	1198	+
	1199	+int mlx5e_get_rxfh(struct net_device netdev, u32 indir, u8 *key,
	1200	+ u8 *hfunc)
	1201	+{
	1202	+ struct mlx5e_priv *priv = netdev_priv(netdev);
	1203	+ struct mlx5e_rss_params *rss = &priv->rss_params;
	1204	+
872	1205	if (indir)
873		- memcpy(indir, priv->channels.params.indirection_rqt,
874		- sizeof(priv->channels.params.indirection_rqt));
	1206	+ memcpy(indir, rss->indirection_rqt,
	1207	+ sizeof(rss->indirection_rqt));
875	1208
876	1209	if (key)
877		- memcpy(key, priv->channels.params.toeplitz_hash_key,
878		- sizeof(priv->channels.params.toeplitz_hash_key));
	1210	+ memcpy(key, rss->toeplitz_hash_key,
	1211	+ sizeof(rss->toeplitz_hash_key));
879	1212
880	1213	if (hfunc)
881		- *hfunc = priv->channels.params.rss_hfunc;
	1214	+ *hfunc = rss->hfunc;
882	1215
883	1216	return 0;
884	1217	}
885	1218
886		-static void mlx5e_modify_tirs_hash(struct mlx5e_priv priv, void in, int inlen)
887		-{
888		- void *tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx);
889		- struct mlx5_core_dev *mdev = priv->mdev;
890		- int ctxlen = MLX5_ST_SZ_BYTES(tirc);
891		- int tt;
892		-
893		- MLX5_SET(modify_tir_in, in, bitmask.hash, 1);
894		-
895		- for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
896		- memset(tirc, 0, ctxlen);
897		- mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, false);
898		- mlx5_core_modify_tir(mdev, priv->indir_tir[tt].tirn, in, inlen);
899		- }
900		-
901		- if (!mlx5e_tunnel_inner_ft_supported(priv->mdev))
902		- return;
903		-
904		- for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
905		- memset(tirc, 0, ctxlen);
906		- mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, true);
907		- mlx5_core_modify_tir(mdev, priv->inner_indir_tir[tt].tirn, in, inlen);
908		- }
909		-}
910		-
911		-static int mlx5e_set_rxfh(struct net_device dev, const u32 indir,
912		- const u8 *key, const u8 hfunc)
	1219	+int mlx5e_set_rxfh(struct net_device dev, const u32 indir,
	1220	+ const u8 *key, const u8 hfunc)
913	1221	{
914	1222	struct mlx5e_priv *priv = netdev_priv(dev);
	1223	+ struct mlx5e_rss_params *rss = &priv->rss_params;
915	1224	int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
916		- bool hash_changed = false;
	1225	+ bool refresh_tirs = false;
	1226	+ bool refresh_rqt = false;
917	1227	void *in;
918	1228
919	1229	if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
..	..	@@ -927,41 +1237,41 @@
927	1237
928	1238	mutex_lock(&priv->state_lock);
929	1239
930		- if (hfunc != ETH_RSS_HASH_NO_CHANGE &&
931		- hfunc != priv->channels.params.rss_hfunc) {
932		- priv->channels.params.rss_hfunc = hfunc;
933		- hash_changed = true;
	1240	+ if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != rss->hfunc) {
	1241	+ rss->hfunc = hfunc;
	1242	+ refresh_rqt = true;
	1243	+ refresh_tirs = true;
934	1244	}
935	1245
936	1246	if (indir) {
937		- memcpy(priv->channels.params.indirection_rqt, indir,
938		- sizeof(priv->channels.params.indirection_rqt));
939		-
940		- if (test_bit(MLX5E_STATE_OPENED, &priv->state)) {
941		- u32 rqtn = priv->indir_rqt.rqtn;
942		- struct mlx5e_redirect_rqt_param rrp = {
943		- .is_rss = true,
944		- {
945		- .rss = {
946		- .hfunc = priv->channels.params.rss_hfunc,
947		- .channels = &priv->channels,
948		- },
949		- },
950		- };
951		-
952		- mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, rrp);
953		- }
	1247	+ memcpy(rss->indirection_rqt, indir,
	1248	+ sizeof(rss->indirection_rqt));
	1249	+ refresh_rqt = true;
954	1250	}
955	1251
956	1252	if (key) {
957		- memcpy(priv->channels.params.toeplitz_hash_key, key,
958		- sizeof(priv->channels.params.toeplitz_hash_key));
959		- hash_changed = hash_changed \|\|
960		- priv->channels.params.rss_hfunc == ETH_RSS_HASH_TOP;
	1253	+ memcpy(rss->toeplitz_hash_key, key,
	1254	+ sizeof(rss->toeplitz_hash_key));
	1255	+ refresh_tirs = refresh_tirs \|\| rss->hfunc == ETH_RSS_HASH_TOP;
961	1256	}
962	1257
963		- if (hash_changed)
964		- mlx5e_modify_tirs_hash(priv, in, inlen);
	1258	+ if (refresh_rqt && test_bit(MLX5E_STATE_OPENED, &priv->state)) {
	1259	+ struct mlx5e_redirect_rqt_param rrp = {
	1260	+ .is_rss = true,
	1261	+ {
	1262	+ .rss = {
	1263	+ .hfunc = rss->hfunc,
	1264	+ .channels = &priv->channels,
	1265	+ },
	1266	+ },
	1267	+ };
	1268	+ u32 rqtn = priv->indir_rqt.rqtn;
	1269	+
	1270	+ mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, rrp);
	1271	+ }
	1272	+
	1273	+ if (refresh_tirs)
	1274	+ mlx5e_modify_tirs_hash(priv, in);
965	1275
966	1276	mutex_unlock(&priv->state_lock);
967	1277
..	..	@@ -1061,25 +1371,39 @@
1061	1371	return err;
1062	1372	}
1063	1373
1064		-static void mlx5e_get_pauseparam(struct net_device *netdev,
1065		- struct ethtool_pauseparam *pauseparam)
	1374	+static void mlx5e_get_pause_stats(struct net_device *netdev,
	1375	+ struct ethtool_pause_stats *pause_stats)
1066	1376	{
1067		- struct mlx5e_priv *priv = netdev_priv(netdev);
	1377	+ struct mlx5e_priv *priv = netdev_priv(netdev);
	1378	+
	1379	+ mlx5e_stats_pause_get(priv, pause_stats);
	1380	+}
	1381	+
	1382	+void mlx5e_ethtool_get_pauseparam(struct mlx5e_priv *priv,
	1383	+ struct ethtool_pauseparam *pauseparam)
	1384	+{
1068	1385	struct mlx5_core_dev *mdev = priv->mdev;
1069	1386	int err;
1070	1387
1071	1388	err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
1072	1389	&pauseparam->tx_pause);
1073	1390	if (err) {
1074		- netdev_err(netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
	1391	+ netdev_err(priv->netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
1075	1392	__func__, err);
1076	1393	}
1077	1394	}
1078	1395
1079		-static int mlx5e_set_pauseparam(struct net_device *netdev,
1080		- struct ethtool_pauseparam *pauseparam)
	1396	+static void mlx5e_get_pauseparam(struct net_device *netdev,
	1397	+ struct ethtool_pauseparam *pauseparam)
1081	1398	{
1082		- struct mlx5e_priv *priv = netdev_priv(netdev);
	1399	+ struct mlx5e_priv *priv = netdev_priv(netdev);
	1400	+
	1401	+ mlx5e_ethtool_get_pauseparam(priv, pauseparam);
	1402	+}
	1403	+
	1404	+int mlx5e_ethtool_set_pauseparam(struct mlx5e_priv *priv,
	1405	+ struct ethtool_pauseparam *pauseparam)
	1406	+{
1083	1407	struct mlx5_core_dev *mdev = priv->mdev;
1084	1408	int err;
1085	1409
..	..	@@ -1093,11 +1417,19 @@
1093	1417	pauseparam->rx_pause ? 1 : 0,
1094	1418	pauseparam->tx_pause ? 1 : 0);
1095	1419	if (err) {
1096		- netdev_err(netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
	1420	+ netdev_err(priv->netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
1097	1421	__func__, err);
1098	1422	}
1099	1423
1100	1424	return err;
	1425	+}
	1426	+
	1427	+static int mlx5e_set_pauseparam(struct net_device *netdev,
	1428	+ struct ethtool_pauseparam *pauseparam)
	1429	+{
	1430	+ struct mlx5e_priv *priv = netdev_priv(netdev);
	1431	+
	1432	+ return mlx5e_ethtool_set_pauseparam(priv, pauseparam);
1101	1433	}
1102	1434
1103	1435	int mlx5e_ethtool_get_ts_info(struct mlx5e_priv *priv,
..	..	@@ -1160,7 +1492,7 @@
1160	1492	return ret;
1161	1493	}
1162	1494
1163		-static __u32 mlx5e_refomrat_wol_mode_mlx5_to_linux(u8 mode)
	1495	+static __u32 mlx5e_reformat_wol_mode_mlx5_to_linux(u8 mode)
1164	1496	{
1165	1497	__u32 ret = 0;
1166	1498
..	..	@@ -1188,7 +1520,7 @@
1188	1520	return ret;
1189	1521	}
1190	1522
1191		-static u8 mlx5e_refomrat_wol_mode_linux_to_mlx5(__u32 mode)
	1523	+static u8 mlx5e_reformat_wol_mode_linux_to_mlx5(__u32 mode)
1192	1524	{
1193	1525	u8 ret = 0;
1194	1526
..	..	@@ -1234,7 +1566,7 @@
1234	1566	if (err)
1235	1567	return;
1236	1568
1237		- wol->wolopts = mlx5e_refomrat_wol_mode_mlx5_to_linux(mlx5_wol_mode);
	1569	+ wol->wolopts = mlx5e_reformat_wol_mode_mlx5_to_linux(mlx5_wol_mode);
1238	1570	}
1239	1571
1240	1572	static int mlx5e_set_wol(struct net_device netdev, struct ethtool_wolinfo wol)
..	..	@@ -1250,9 +1582,66 @@
1250	1582	if (wol->wolopts & ~wol_supported)
1251	1583	return -EINVAL;
1252	1584
1253		- mlx5_wol_mode = mlx5e_refomrat_wol_mode_linux_to_mlx5(wol->wolopts);
	1585	+ mlx5_wol_mode = mlx5e_reformat_wol_mode_linux_to_mlx5(wol->wolopts);
1254	1586
1255	1587	return mlx5_set_port_wol(mdev, mlx5_wol_mode);
	1588	+}
	1589	+
	1590	+static int mlx5e_get_fecparam(struct net_device *netdev,
	1591	+ struct ethtool_fecparam *fecparam)
	1592	+{
	1593	+ struct mlx5e_priv *priv = netdev_priv(netdev);
	1594	+ struct mlx5_core_dev *mdev = priv->mdev;
	1595	+ u16 fec_configured;
	1596	+ u32 fec_active;
	1597	+ int err;
	1598	+
	1599	+ err = mlx5e_get_fec_mode(mdev, &fec_active, &fec_configured);
	1600	+
	1601	+ if (err)
	1602	+ return err;
	1603	+
	1604	+ fecparam->active_fec = pplm2ethtool_fec((unsigned long)fec_active,
	1605	+ sizeof(unsigned long) * BITS_PER_BYTE);
	1606	+
	1607	+ if (!fecparam->active_fec)
	1608	+ return -EOPNOTSUPP;
	1609	+
	1610	+ fecparam->fec = pplm2ethtool_fec((unsigned long)fec_configured,
	1611	+ sizeof(unsigned long) * BITS_PER_BYTE);
	1612	+
	1613	+ return 0;
	1614	+}
	1615	+
	1616	+static int mlx5e_set_fecparam(struct net_device *netdev,
	1617	+ struct ethtool_fecparam *fecparam)
	1618	+{
	1619	+ struct mlx5e_priv *priv = netdev_priv(netdev);
	1620	+ struct mlx5_core_dev *mdev = priv->mdev;
	1621	+ unsigned long fec_bitmap;
	1622	+ u16 fec_policy = 0;
	1623	+ int mode;
	1624	+ int err;
	1625	+
	1626	+ bitmap_from_arr32(&fec_bitmap, &fecparam->fec, sizeof(fecparam->fec) * BITS_PER_BYTE);
	1627	+ if (bitmap_weight(&fec_bitmap, ETHTOOL_FEC_LLRS_BIT + 1) > 1)
	1628	+ return -EOPNOTSUPP;
	1629	+
	1630	+ for (mode = 0; mode < ARRAY_SIZE(pplm_fec_2_ethtool); mode++) {
	1631	+ if (!(pplm_fec_2_ethtool[mode] & fecparam->fec))
	1632	+ continue;
	1633	+ fec_policy \|= (1 << mode);
	1634	+ break;
	1635	+ }
	1636	+
	1637	+ err = mlx5e_set_fec_mode(mdev, fec_policy);
	1638	+
	1639	+ if (err)
	1640	+ return err;
	1641	+
	1642	+ mlx5_toggle_port_link(mdev);
	1643	+
	1644	+ return 0;
1256	1645	}
1257	1646
1258	1647	static u32 mlx5e_get_msglevel(struct net_device *dev)
..	..	@@ -1295,7 +1684,7 @@
1295	1684	struct mlx5e_priv *priv = netdev_priv(netdev);
1296	1685	struct mlx5_core_dev *dev = priv->mdev;
1297	1686	int size_read = 0;
1298		- u8 data[4];
	1687	+ u8 data[4] = {0};
1299	1688
1300	1689	size_read = mlx5_query_module_eeprom(dev, 0, 2, data);
1301	1690	if (size_read < 2)
..	..	@@ -1305,17 +1694,17 @@
1305	1694	switch (data[0]) {
1306	1695	case MLX5_MODULE_ID_QSFP:
1307	1696	modinfo->type = ETH_MODULE_SFF_8436;
1308		- modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
	1697	+ modinfo->eeprom_len = ETH_MODULE_SFF_8436_MAX_LEN;
1309	1698	break;
1310	1699	case MLX5_MODULE_ID_QSFP_PLUS:
1311	1700	case MLX5_MODULE_ID_QSFP28:
1312	1701	/* data[1] = revision id */
1313	1702	if (data[0] == MLX5_MODULE_ID_QSFP28 \|\| data[1] >= 0x3) {
1314	1703	modinfo->type = ETH_MODULE_SFF_8636;
1315		- modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
	1704	+ modinfo->eeprom_len = ETH_MODULE_SFF_8636_MAX_LEN;
1316	1705	} else {
1317	1706	modinfo->type = ETH_MODULE_SFF_8436;
1318		- modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
	1707	+ modinfo->eeprom_len = ETH_MODULE_SFF_8436_MAX_LEN;
1319	1708	}
1320	1709	break;
1321	1710	case MLX5_MODULE_ID_SFP:
..	..	@@ -1367,7 +1756,39 @@
1367	1756	return 0;
1368	1757	}
1369	1758
1370		-typedef int (mlx5e_pflag_handler)(struct net_device netdev, bool enable);
	1759	+int mlx5e_ethtool_flash_device(struct mlx5e_priv *priv,
	1760	+ struct ethtool_flash *flash)
	1761	+{
	1762	+ struct mlx5_core_dev *mdev = priv->mdev;
	1763	+ struct net_device *dev = priv->netdev;
	1764	+ const struct firmware *fw;
	1765	+ int err;
	1766	+
	1767	+ if (flash->region != ETHTOOL_FLASH_ALL_REGIONS)
	1768	+ return -EOPNOTSUPP;
	1769	+
	1770	+ err = request_firmware_direct(&fw, flash->data, &dev->dev);
	1771	+ if (err)
	1772	+ return err;
	1773	+
	1774	+ dev_hold(dev);
	1775	+ rtnl_unlock();
	1776	+
	1777	+ err = mlx5_firmware_flash(mdev, fw, NULL);
	1778	+ release_firmware(fw);
	1779	+
	1780	+ rtnl_lock();
	1781	+ dev_put(dev);
	1782	+ return err;
	1783	+}
	1784	+
	1785	+static int mlx5e_flash_device(struct net_device *dev,
	1786	+ struct ethtool_flash *flash)
	1787	+{
	1788	+ struct mlx5e_priv *priv = netdev_priv(dev);
	1789	+
	1790	+ return mlx5e_ethtool_flash_device(priv, flash);
	1791	+}
1371	1792
1372	1793	static int set_pflag_cqe_based_moder(struct net_device *netdev, bool enable,
1373	1794	bool is_rx_cq)
..	..	@@ -1377,7 +1798,6 @@
1377	1798	struct mlx5e_channels new_channels = {};
1378	1799	bool mode_changed;
1379	1800	u8 cq_period_mode, current_cq_period_mode;
1380		- int err = 0;
1381	1801
1382	1802	cq_period_mode = enable ?
1383	1803	MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
..	..	@@ -1405,12 +1825,7 @@
1405	1825	return 0;
1406	1826	}
1407	1827
1408		- err = mlx5e_open_channels(priv, &new_channels);
1409		- if (err)
1410		- return err;
1411		-
1412		- mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1413		- return 0;
	1828	+ return mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL);
1414	1829	}
1415	1830
1416	1831	static int set_pflag_tx_cqe_based_moder(struct net_device *netdev, bool enable)
..	..	@@ -1443,11 +1858,10 @@
1443	1858	return 0;
1444	1859	}
1445	1860
1446		- err = mlx5e_open_channels(priv, &new_channels);
	1861	+ err = mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL);
1447	1862	if (err)
1448	1863	return err;
1449	1864
1450		- mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1451	1865	mlx5e_dbg(DRV, priv, "MLX5E: RxCqeCmprss was turned %s\n",
1452	1866	MLX5E_GET_PFLAG(&priv->channels.params,
1453	1867	MLX5E_PFLAG_RX_CQE_COMPRESS) ? "ON" : "OFF");
..	..	@@ -1484,7 +1898,6 @@
1484	1898	struct mlx5e_priv *priv = netdev_priv(netdev);
1485	1899	struct mlx5_core_dev *mdev = priv->mdev;
1486	1900	struct mlx5e_channels new_channels = {};
1487		- int err;
1488	1901
1489	1902	if (enable) {
1490	1903	if (!mlx5e_check_fragmented_striding_rq_cap(mdev))
..	..	@@ -1506,12 +1919,7 @@
1506	1919	return 0;
1507	1920	}
1508	1921
1509		- err = mlx5e_open_channels(priv, &new_channels);
1510		- if (err)
1511		- return err;
1512		-
1513		- mlx5e_switch_priv_channels(priv, &new_channels, NULL);
1514		- return 0;
	1922	+ return mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL);
1515	1923	}
1516	1924
1517	1925	static int set_pflag_rx_no_csum_complete(struct net_device *netdev, bool enable)
..	..	@@ -1536,23 +1944,65 @@
1536	1944	return 0;
1537	1945	}
1538	1946
1539		-static int mlx5e_handle_pflag(struct net_device *netdev,
1540		- u32 wanted_flags,
1541		- enum mlx5e_priv_flag flag,
1542		- mlx5e_pflag_handler pflag_handler)
	1947	+static int set_pflag_tx_mpwqe_common(struct net_device *netdev, u32 flag, bool enable)
1543	1948	{
1544	1949	struct mlx5e_priv *priv = netdev_priv(netdev);
1545		- bool enable = !!(wanted_flags & flag);
	1950	+ struct mlx5_core_dev *mdev = priv->mdev;
	1951	+ struct mlx5e_channels new_channels = {};
	1952	+ int err;
	1953	+
	1954	+ if (enable && !MLX5_CAP_ETH(mdev, enhanced_multi_pkt_send_wqe))
	1955	+ return -EOPNOTSUPP;
	1956	+
	1957	+ new_channels.params = priv->channels.params;
	1958	+
	1959	+ MLX5E_SET_PFLAG(&new_channels.params, flag, enable);
	1960	+
	1961	+ if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
	1962	+ priv->channels.params = new_channels.params;
	1963	+ return 0;
	1964	+ }
	1965	+
	1966	+ err = mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL);
	1967	+ return err;
	1968	+}
	1969	+
	1970	+static int set_pflag_xdp_tx_mpwqe(struct net_device *netdev, bool enable)
	1971	+{
	1972	+ return set_pflag_tx_mpwqe_common(netdev, MLX5E_PFLAG_XDP_TX_MPWQE, enable);
	1973	+}
	1974	+
	1975	+static int set_pflag_skb_tx_mpwqe(struct net_device *netdev, bool enable)
	1976	+{
	1977	+ return set_pflag_tx_mpwqe_common(netdev, MLX5E_PFLAG_SKB_TX_MPWQE, enable);
	1978	+}
	1979	+
	1980	+static const struct pflag_desc mlx5e_priv_flags[MLX5E_NUM_PFLAGS] = {
	1981	+ { "rx_cqe_moder", set_pflag_rx_cqe_based_moder },
	1982	+ { "tx_cqe_moder", set_pflag_tx_cqe_based_moder },
	1983	+ { "rx_cqe_compress", set_pflag_rx_cqe_compress },
	1984	+ { "rx_striding_rq", set_pflag_rx_striding_rq },
	1985	+ { "rx_no_csum_complete", set_pflag_rx_no_csum_complete },
	1986	+ { "xdp_tx_mpwqe", set_pflag_xdp_tx_mpwqe },
	1987	+ { "skb_tx_mpwqe", set_pflag_skb_tx_mpwqe },
	1988	+};
	1989	+
	1990	+static int mlx5e_handle_pflag(struct net_device *netdev,
	1991	+ u32 wanted_flags,
	1992	+ enum mlx5e_priv_flag flag)
	1993	+{
	1994	+ struct mlx5e_priv *priv = netdev_priv(netdev);
	1995	+ bool enable = !!(wanted_flags & BIT(flag));
1546	1996	u32 changes = wanted_flags ^ priv->channels.params.pflags;
1547	1997	int err;
1548	1998
1549		- if (!(changes & flag))
	1999	+ if (!(changes & BIT(flag)))
1550	2000	return 0;
1551	2001
1552		- err = pflag_handler(netdev, enable);
	2002	+ err = mlx5e_priv_flags[flag].handler(netdev, enable);
1553	2003	if (err) {
1554		- netdev_err(netdev, "%s private flag 0x%x failed err %d\n",
1555		- enable ? "Enable" : "Disable", flag, err);
	2004	+ netdev_err(netdev, "%s private flag '%s' failed err %d\n",
	2005	+ enable ? "Enable" : "Disable", mlx5e_priv_flags[flag].name, err);
1556	2006	return err;
1557	2007	}
1558	2008
..	..	@@ -1563,38 +2013,17 @@
1563	2013	static int mlx5e_set_priv_flags(struct net_device *netdev, u32 pflags)
1564	2014	{
1565	2015	struct mlx5e_priv *priv = netdev_priv(netdev);
	2016	+ enum mlx5e_priv_flag pflag;
1566	2017	int err;
1567	2018
1568	2019	mutex_lock(&priv->state_lock);
1569		- err = mlx5e_handle_pflag(netdev, pflags,
1570		- MLX5E_PFLAG_RX_CQE_BASED_MODER,
1571		- set_pflag_rx_cqe_based_moder);
1572		- if (err)
1573		- goto out;
1574	2020
1575		- err = mlx5e_handle_pflag(netdev, pflags,
1576		- MLX5E_PFLAG_TX_CQE_BASED_MODER,
1577		- set_pflag_tx_cqe_based_moder);
1578		- if (err)
1579		- goto out;
	2021	+ for (pflag = 0; pflag < MLX5E_NUM_PFLAGS; pflag++) {
	2022	+ err = mlx5e_handle_pflag(netdev, pflags, pflag);
	2023	+ if (err)
	2024	+ break;
	2025	+ }
1580	2026
1581		- err = mlx5e_handle_pflag(netdev, pflags,
1582		- MLX5E_PFLAG_RX_CQE_COMPRESS,
1583		- set_pflag_rx_cqe_compress);
1584		- if (err)
1585		- goto out;
1586		-
1587		- err = mlx5e_handle_pflag(netdev, pflags,
1588		- MLX5E_PFLAG_RX_STRIDING_RQ,
1589		- set_pflag_rx_striding_rq);
1590		- if (err)
1591		- goto out;
1592		-
1593		- err = mlx5e_handle_pflag(netdev, pflags,
1594		- MLX5E_PFLAG_RX_NO_CSUM_COMPLETE,
1595		- set_pflag_rx_no_csum_complete);
1596		-
1597		-out:
1598	2027	mutex_unlock(&priv->state_lock);
1599	2028
1600	2029	/* Need to fix some features.. */
..	..	@@ -1610,57 +2039,33 @@
1610	2039	return priv->channels.params.pflags;
1611	2040	}
1612	2041
1613		-int mlx5e_ethtool_flash_device(struct mlx5e_priv *priv,
1614		- struct ethtool_flash *flash)
1615		-{
1616		- struct mlx5_core_dev *mdev = priv->mdev;
1617		- struct net_device *dev = priv->netdev;
1618		- const struct firmware *fw;
1619		- int err;
1620		-
1621		- if (flash->region != ETHTOOL_FLASH_ALL_REGIONS)
1622		- return -EOPNOTSUPP;
1623		-
1624		- err = request_firmware_direct(&fw, flash->data, &dev->dev);
1625		- if (err)
1626		- return err;
1627		-
1628		- dev_hold(dev);
1629		- rtnl_unlock();
1630		-
1631		- err = mlx5_firmware_flash(mdev, fw);
1632		- release_firmware(fw);
1633		-
1634		- rtnl_lock();
1635		- dev_put(dev);
1636		- return err;
1637		-}
1638		-
1639		-static int mlx5e_flash_device(struct net_device *dev,
1640		- struct ethtool_flash *flash)
	2042	+int mlx5e_get_rxnfc(struct net_device dev, struct ethtool_rxnfc info,
	2043	+ u32 *rule_locs)
1641	2044	{
1642	2045	struct mlx5e_priv *priv = netdev_priv(dev);
1643	2046
1644		- return mlx5e_ethtool_flash_device(priv, flash);
	2047	+ /* ETHTOOL_GRXRINGS is needed by ethtool -x which is not part
	2048	+ * of rxnfc. We keep this logic out of mlx5e_ethtool_get_rxnfc,
	2049	+ * to avoid breaking "ethtool -x" when mlx5e_ethtool_get_rxnfc
	2050	+ * is compiled out via CONFIG_MLX5_EN_RXNFC=n.
	2051	+ */
	2052	+ if (info->cmd == ETHTOOL_GRXRINGS) {
	2053	+ info->data = priv->channels.params.num_channels;
	2054	+ return 0;
	2055	+ }
	2056	+
	2057	+ return mlx5e_ethtool_get_rxnfc(dev, info, rule_locs);
1645	2058	}
1646	2059
1647		-#ifndef CONFIG_MLX5_EN_RXNFC
1648		-/* When CONFIG_MLX5_EN_RXNFC=n we only support ETHTOOL_GRXRINGS
1649		- * otherwise this function will be defined from en_fs_ethtool.c
1650		- */
1651		-static int mlx5e_get_rxnfc(struct net_device dev, struct ethtool_rxnfc info, u32 *rule_locs)
	2060	+int mlx5e_set_rxnfc(struct net_device dev, struct ethtool_rxnfc cmd)
1652	2061	{
1653		- struct mlx5e_priv *priv = netdev_priv(dev);
1654		-
1655		- if (info->cmd != ETHTOOL_GRXRINGS)
1656		- return -EOPNOTSUPP;
1657		- /* ring_count is needed by ethtool -x */
1658		- info->data = priv->channels.params.num_channels;
1659		- return 0;
	2062	+ return mlx5e_ethtool_set_rxnfc(dev, cmd);
1660	2063	}
1661		-#endif
1662	2064
1663	2065	const struct ethtool_ops mlx5e_ethtool_ops = {
	2066	+ .supported_coalesce_params = ETHTOOL_COALESCE_USECS \|
	2067	+ ETHTOOL_COALESCE_MAX_FRAMES \|
	2068	+ ETHTOOL_COALESCE_USE_ADAPTIVE,
1664	2069	.get_drvinfo = mlx5e_get_drvinfo,
1665	2070	.get_link = ethtool_op_get_link,
1666	2071	.get_strings = mlx5e_get_strings,
..	..	@@ -1679,12 +2084,10 @@
1679	2084	.get_rxfh = mlx5e_get_rxfh,
1680	2085	.set_rxfh = mlx5e_set_rxfh,
1681	2086	.get_rxnfc = mlx5e_get_rxnfc,
1682		-#ifdef CONFIG_MLX5_EN_RXNFC
1683	2087	.set_rxnfc = mlx5e_set_rxnfc,
1684		-#endif
1685		- .flash_device = mlx5e_flash_device,
1686	2088	.get_tunable = mlx5e_get_tunable,
1687	2089	.set_tunable = mlx5e_set_tunable,
	2090	+ .get_pause_stats = mlx5e_get_pause_stats,
1688	2091	.get_pauseparam = mlx5e_get_pauseparam,
1689	2092	.set_pauseparam = mlx5e_set_pauseparam,
1690	2093	.get_ts_info = mlx5e_get_ts_info,
..	..	@@ -1693,9 +2096,12 @@
1693	2096	.set_wol = mlx5e_set_wol,
1694	2097	.get_module_info = mlx5e_get_module_info,
1695	2098	.get_module_eeprom = mlx5e_get_module_eeprom,
	2099	+ .flash_device = mlx5e_flash_device,
1696	2100	.get_priv_flags = mlx5e_get_priv_flags,
1697	2101	.set_priv_flags = mlx5e_set_priv_flags,
1698	2102	.self_test = mlx5e_self_test,
1699	2103	.get_msglevel = mlx5e_get_msglevel,
1700	2104	.set_msglevel = mlx5e_set_msglevel,
	2105	+ .get_fecparam = mlx5e_get_fecparam,
	2106	+ .set_fecparam = mlx5e_set_fecparam,
1701	2107	};