disable FB

hc

2024-01-04 1543e317f1da31b75942316931e8f491a8920811

 kernel/drivers/net/ethernet/mellanox/mlx5/core/en/xdp.h
..
..
@@ -32,32 +32,58 @@
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 #ifndef __MLX5_EN_XDP_H__
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 #define __MLX5_EN_XDP_H__
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34
 
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+#include <linux/indirect_call_wrapper.h>
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+
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 #include "en.h"
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+#include "en/txrx.h"
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39
 
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 #define MLX5E_XDP_MIN_INLINE (ETH_HLEN + VLAN_HLEN)
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-#define MLX5E_XDP_TX_DS_COUNT \
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-	((sizeof(struct mlx5e_tx_wqe) / MLX5_SEND_WQE_DS) + 1 /* SG DS */)
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+#define MLX5E_XDP_TX_DS_COUNT (MLX5E_TX_WQE_EMPTY_DS_COUNT + 1 /* SG DS */)
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42
 
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-int mlx5e_xdp_max_mtu(struct mlx5e_params *params);
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+#define MLX5E_XDP_INLINE_WQE_MAX_DS_CNT 16
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+#define MLX5E_XDP_INLINE_WQE_SZ_THRSD \
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+	(MLX5E_XDP_INLINE_WQE_MAX_DS_CNT * MLX5_SEND_WQE_DS - \
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+	 sizeof(struct mlx5_wqe_inline_seg))
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+
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+struct mlx5e_xsk_param;
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+int mlx5e_xdp_max_mtu(struct mlx5e_params *params, struct mlx5e_xsk_param *xsk);
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 bool mlx5e_xdp_handle(struct mlx5e_rq *rq, struct mlx5e_dma_info *di,
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-		      void *va, u16 *rx_headroom, u32 *len);
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+		      u32 *len, struct xdp_buff *xdp);
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+void mlx5e_xdp_mpwqe_complete(struct mlx5e_xdpsq *sq);
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 bool mlx5e_poll_xdpsq_cq(struct mlx5e_cq *cq);
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 void mlx5e_free_xdpsq_descs(struct mlx5e_xdpsq *sq);
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-
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-bool mlx5e_xmit_xdp_frame(struct mlx5e_xdpsq *sq, struct mlx5e_xdp_info *xdpi);
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+void mlx5e_set_xmit_fp(struct mlx5e_xdpsq *sq, bool is_mpw);
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+void mlx5e_xdp_rx_poll_complete(struct mlx5e_rq *rq);
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 int mlx5e_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
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 		   u32 flags);
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+
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+INDIRECT_CALLABLE_DECLARE(bool mlx5e_xmit_xdp_frame_mpwqe(struct mlx5e_xdpsq *sq,
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+							  struct mlx5e_xmit_data *xdptxd,
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+							  struct mlx5e_xdp_info *xdpi,
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+							  int check_result));
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+INDIRECT_CALLABLE_DECLARE(bool mlx5e_xmit_xdp_frame(struct mlx5e_xdpsq *sq,
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+						    struct mlx5e_xmit_data *xdptxd,
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+						    struct mlx5e_xdp_info *xdpi,
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+						    int check_result));
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+INDIRECT_CALLABLE_DECLARE(int mlx5e_xmit_xdp_frame_check_mpwqe(struct mlx5e_xdpsq *sq));
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+INDIRECT_CALLABLE_DECLARE(int mlx5e_xmit_xdp_frame_check(struct mlx5e_xdpsq *sq));
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70
 
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 static inline void mlx5e_xdp_tx_enable(struct mlx5e_priv *priv)
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 {
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 	set_bit(MLX5E_STATE_XDP_TX_ENABLED, &priv->state);
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+
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+	if (priv->channels.params.xdp_prog)
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+		set_bit(MLX5E_STATE_XDP_ACTIVE, &priv->state);
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 }
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78
 
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 static inline void mlx5e_xdp_tx_disable(struct mlx5e_priv *priv)
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 {
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+	if (priv->channels.params.xdp_prog)
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+		clear_bit(MLX5E_STATE_XDP_ACTIVE, &priv->state);
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+
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 	clear_bit(MLX5E_STATE_XDP_TX_ENABLED, &priv->state);
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-	/* let other device's napi(s) see our new state */
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-	synchronize_rcu();
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+	/* Let other device's napi(s) and XSK wakeups see our new state. */
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+	synchronize_net();
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 }
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88
 
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 static inline bool mlx5e_xdp_tx_is_enabled(struct mlx5e_priv *priv)
..
..
@@ -65,15 +91,96 @@
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 	return test_bit(MLX5E_STATE_XDP_TX_ENABLED, &priv->state);
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 }
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93
 
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-static inline void mlx5e_xmit_xdp_doorbell(struct mlx5e_xdpsq *sq)
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+static inline bool mlx5e_xdp_is_active(struct mlx5e_priv *priv)
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 {
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-	struct mlx5_wq_cyc *wq = &sq->wq;
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-	struct mlx5e_tx_wqe *wqe;
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-	u16 pi = mlx5_wq_cyc_ctr2ix(wq, sq->pc - 1); /* last pi */
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-
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-	wqe  = mlx5_wq_cyc_get_wqe(wq, pi);
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-
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-	mlx5e_notify_hw(wq, sq->pc, sq->uar_map, &wqe->ctrl);
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+	return test_bit(MLX5E_STATE_XDP_ACTIVE, &priv->state);
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 }
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98
 
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+static inline void mlx5e_xmit_xdp_doorbell(struct mlx5e_xdpsq *sq)
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+{
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+	if (sq->doorbell_cseg) {
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+		mlx5e_notify_hw(&sq->wq, sq->pc, sq->uar_map, sq->doorbell_cseg);
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+		sq->doorbell_cseg = NULL;
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+	}
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+}
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+
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+/* Enable inline WQEs to shift some load from a congested HCA (HW) to
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+ * a less congested cpu (SW).
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+ */
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+static inline bool mlx5e_xdp_get_inline_state(struct mlx5e_xdpsq *sq, bool cur)
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+{
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+	u16 outstanding = sq->xdpi_fifo_pc - sq->xdpi_fifo_cc;
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+
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+#define MLX5E_XDP_INLINE_WATERMARK_LOW	10
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+#define MLX5E_XDP_INLINE_WATERMARK_HIGH 128
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+
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+	if (cur && outstanding <= MLX5E_XDP_INLINE_WATERMARK_LOW)
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+		return false;
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+
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+	if (!cur && outstanding >= MLX5E_XDP_INLINE_WATERMARK_HIGH)
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+		return true;
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+
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+	return cur;
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+}
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+
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+static inline bool mlx5e_xdp_mpqwe_is_full(struct mlx5e_tx_mpwqe *session)
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+{
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+	if (session->inline_on)
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+		return session->ds_count + MLX5E_XDP_INLINE_WQE_MAX_DS_CNT >
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+		       MLX5E_TX_MPW_MAX_NUM_DS;
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+	return mlx5e_tx_mpwqe_is_full(session);
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+}
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+
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+struct mlx5e_xdp_wqe_info {
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+	u8 num_wqebbs;
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+	u8 num_pkts;
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+};
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+
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+static inline void
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+mlx5e_xdp_mpwqe_add_dseg(struct mlx5e_xdpsq *sq,
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+			 struct mlx5e_xmit_data *xdptxd,
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+			 struct mlx5e_xdpsq_stats *stats)
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+{
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+	struct mlx5e_tx_mpwqe *session = &sq->mpwqe;
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+	struct mlx5_wqe_data_seg *dseg =
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+		(struct mlx5_wqe_data_seg *)session->wqe + session->ds_count;
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+	u32 dma_len = xdptxd->len;
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+
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+	session->pkt_count++;
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+	session->bytes_count += dma_len;
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+
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+	if (session->inline_on && dma_len <= MLX5E_XDP_INLINE_WQE_SZ_THRSD) {
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+		struct mlx5_wqe_inline_seg *inline_dseg =
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+			(struct mlx5_wqe_inline_seg *)dseg;
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+		u16 ds_len = sizeof(*inline_dseg) + dma_len;
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+		u16 ds_cnt = DIV_ROUND_UP(ds_len, MLX5_SEND_WQE_DS);
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+
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+		inline_dseg->byte_count = cpu_to_be32(dma_len | MLX5_INLINE_SEG);
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+		memcpy(inline_dseg->data, xdptxd->data, dma_len);
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+
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+		session->ds_count += ds_cnt;
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+		stats->inlnw++;
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+		return;
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+	}
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+
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+	dseg->addr       = cpu_to_be64(xdptxd->dma_addr);
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+	dseg->byte_count = cpu_to_be32(dma_len);
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+	dseg->lkey       = sq->mkey_be;
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+	session->ds_count++;
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+}
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+
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+static inline void
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+mlx5e_xdpi_fifo_push(struct mlx5e_xdp_info_fifo *fifo,
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+		     struct mlx5e_xdp_info *xi)
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+{
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+	u32 i = (*fifo->pc)++ & fifo->mask;
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+
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+	fifo->xi[i] = *xi;
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+}
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+
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+static inline struct mlx5e_xdp_info
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+mlx5e_xdpi_fifo_pop(struct mlx5e_xdp_info_fifo *fifo)
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+{
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+	return fifo->xi[(*fifo->cc)++ & fifo->mask];
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+}
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 #endif