| .. | .. |
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| 98 | 98 | ixgb_adapter_stop(struct ixgb_hw *hw) |
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| 99 | 99 | { |
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| 100 | 100 | u32 ctrl_reg; |
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| 101 | | - u32 icr_reg; |
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| 102 | 101 | |
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| 103 | 102 | ENTER(); |
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| 104 | 103 | |
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| .. | .. |
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| 142 | 141 | IXGB_WRITE_REG(hw, IMC, 0xffffffff); |
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| 143 | 142 | |
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| 144 | 143 | /* Clear any pending interrupt events. */ |
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| 145 | | - icr_reg = IXGB_READ_REG(hw, ICR); |
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| 144 | + IXGB_READ_REG(hw, ICR); |
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| 146 | 145 | |
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| 147 | 146 | return ctrl_reg & IXGB_CTRL0_RST; |
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| 148 | 147 | } |
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| .. | .. |
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| 274 | 273 | ixgb_init_hw(struct ixgb_hw *hw) |
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| 275 | 274 | { |
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| 276 | 275 | u32 i; |
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| 277 | | - u32 ctrl_reg; |
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| 278 | 276 | bool status; |
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| 279 | 277 | |
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| 280 | 278 | ENTER(); |
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| .. | .. |
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| 286 | 284 | */ |
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| 287 | 285 | pr_debug("Issuing a global reset to MAC\n"); |
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| 288 | 286 | |
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| 289 | | - ctrl_reg = ixgb_mac_reset(hw); |
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| 287 | + ixgb_mac_reset(hw); |
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| 290 | 288 | |
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| 291 | 289 | pr_debug("Issuing an EE reset to MAC\n"); |
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| 292 | 290 | #ifdef HP_ZX1 |
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| .. | .. |
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| 949 | 947 | static void |
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| 950 | 948 | ixgb_clear_hw_cntrs(struct ixgb_hw *hw) |
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| 951 | 949 | { |
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| 952 | | - volatile u32 temp_reg; |
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| 953 | | - |
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| 954 | 950 | ENTER(); |
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| 955 | 951 | |
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| 956 | 952 | /* if we are stopped or resetting exit gracefully */ |
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| .. | .. |
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| 959 | 955 | return; |
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| 960 | 956 | } |
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| 961 | 957 | |
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| 962 | | - temp_reg = IXGB_READ_REG(hw, TPRL); |
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| 963 | | - temp_reg = IXGB_READ_REG(hw, TPRH); |
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| 964 | | - temp_reg = IXGB_READ_REG(hw, GPRCL); |
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| 965 | | - temp_reg = IXGB_READ_REG(hw, GPRCH); |
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| 966 | | - temp_reg = IXGB_READ_REG(hw, BPRCL); |
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| 967 | | - temp_reg = IXGB_READ_REG(hw, BPRCH); |
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| 968 | | - temp_reg = IXGB_READ_REG(hw, MPRCL); |
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| 969 | | - temp_reg = IXGB_READ_REG(hw, MPRCH); |
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| 970 | | - temp_reg = IXGB_READ_REG(hw, UPRCL); |
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| 971 | | - temp_reg = IXGB_READ_REG(hw, UPRCH); |
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| 972 | | - temp_reg = IXGB_READ_REG(hw, VPRCL); |
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| 973 | | - temp_reg = IXGB_READ_REG(hw, VPRCH); |
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| 974 | | - temp_reg = IXGB_READ_REG(hw, JPRCL); |
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| 975 | | - temp_reg = IXGB_READ_REG(hw, JPRCH); |
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| 976 | | - temp_reg = IXGB_READ_REG(hw, GORCL); |
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| 977 | | - temp_reg = IXGB_READ_REG(hw, GORCH); |
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| 978 | | - temp_reg = IXGB_READ_REG(hw, TORL); |
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| 979 | | - temp_reg = IXGB_READ_REG(hw, TORH); |
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| 980 | | - temp_reg = IXGB_READ_REG(hw, RNBC); |
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| 981 | | - temp_reg = IXGB_READ_REG(hw, RUC); |
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| 982 | | - temp_reg = IXGB_READ_REG(hw, ROC); |
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| 983 | | - temp_reg = IXGB_READ_REG(hw, RLEC); |
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| 984 | | - temp_reg = IXGB_READ_REG(hw, CRCERRS); |
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| 985 | | - temp_reg = IXGB_READ_REG(hw, ICBC); |
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| 986 | | - temp_reg = IXGB_READ_REG(hw, ECBC); |
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| 987 | | - temp_reg = IXGB_READ_REG(hw, MPC); |
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| 988 | | - temp_reg = IXGB_READ_REG(hw, TPTL); |
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| 989 | | - temp_reg = IXGB_READ_REG(hw, TPTH); |
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| 990 | | - temp_reg = IXGB_READ_REG(hw, GPTCL); |
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| 991 | | - temp_reg = IXGB_READ_REG(hw, GPTCH); |
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| 992 | | - temp_reg = IXGB_READ_REG(hw, BPTCL); |
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| 993 | | - temp_reg = IXGB_READ_REG(hw, BPTCH); |
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| 994 | | - temp_reg = IXGB_READ_REG(hw, MPTCL); |
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| 995 | | - temp_reg = IXGB_READ_REG(hw, MPTCH); |
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| 996 | | - temp_reg = IXGB_READ_REG(hw, UPTCL); |
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| 997 | | - temp_reg = IXGB_READ_REG(hw, UPTCH); |
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| 998 | | - temp_reg = IXGB_READ_REG(hw, VPTCL); |
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| 999 | | - temp_reg = IXGB_READ_REG(hw, VPTCH); |
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| 1000 | | - temp_reg = IXGB_READ_REG(hw, JPTCL); |
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| 1001 | | - temp_reg = IXGB_READ_REG(hw, JPTCH); |
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| 1002 | | - temp_reg = IXGB_READ_REG(hw, GOTCL); |
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| 1003 | | - temp_reg = IXGB_READ_REG(hw, GOTCH); |
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| 1004 | | - temp_reg = IXGB_READ_REG(hw, TOTL); |
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| 1005 | | - temp_reg = IXGB_READ_REG(hw, TOTH); |
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| 1006 | | - temp_reg = IXGB_READ_REG(hw, DC); |
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| 1007 | | - temp_reg = IXGB_READ_REG(hw, PLT64C); |
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| 1008 | | - temp_reg = IXGB_READ_REG(hw, TSCTC); |
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| 1009 | | - temp_reg = IXGB_READ_REG(hw, TSCTFC); |
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| 1010 | | - temp_reg = IXGB_READ_REG(hw, IBIC); |
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| 1011 | | - temp_reg = IXGB_READ_REG(hw, RFC); |
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| 1012 | | - temp_reg = IXGB_READ_REG(hw, LFC); |
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| 1013 | | - temp_reg = IXGB_READ_REG(hw, PFRC); |
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| 1014 | | - temp_reg = IXGB_READ_REG(hw, PFTC); |
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| 1015 | | - temp_reg = IXGB_READ_REG(hw, MCFRC); |
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| 1016 | | - temp_reg = IXGB_READ_REG(hw, MCFTC); |
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| 1017 | | - temp_reg = IXGB_READ_REG(hw, XONRXC); |
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| 1018 | | - temp_reg = IXGB_READ_REG(hw, XONTXC); |
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| 1019 | | - temp_reg = IXGB_READ_REG(hw, XOFFRXC); |
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| 1020 | | - temp_reg = IXGB_READ_REG(hw, XOFFTXC); |
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| 1021 | | - temp_reg = IXGB_READ_REG(hw, RJC); |
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| 958 | + IXGB_READ_REG(hw, TPRL); |
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| 959 | + IXGB_READ_REG(hw, TPRH); |
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| 960 | + IXGB_READ_REG(hw, GPRCL); |
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| 961 | + IXGB_READ_REG(hw, GPRCH); |
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| 962 | + IXGB_READ_REG(hw, BPRCL); |
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| 963 | + IXGB_READ_REG(hw, BPRCH); |
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| 964 | + IXGB_READ_REG(hw, MPRCL); |
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| 965 | + IXGB_READ_REG(hw, MPRCH); |
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| 966 | + IXGB_READ_REG(hw, UPRCL); |
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| 967 | + IXGB_READ_REG(hw, UPRCH); |
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| 968 | + IXGB_READ_REG(hw, VPRCL); |
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| 969 | + IXGB_READ_REG(hw, VPRCH); |
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| 970 | + IXGB_READ_REG(hw, JPRCL); |
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| 971 | + IXGB_READ_REG(hw, JPRCH); |
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| 972 | + IXGB_READ_REG(hw, GORCL); |
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| 973 | + IXGB_READ_REG(hw, GORCH); |
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| 974 | + IXGB_READ_REG(hw, TORL); |
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| 975 | + IXGB_READ_REG(hw, TORH); |
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| 976 | + IXGB_READ_REG(hw, RNBC); |
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| 977 | + IXGB_READ_REG(hw, RUC); |
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| 978 | + IXGB_READ_REG(hw, ROC); |
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| 979 | + IXGB_READ_REG(hw, RLEC); |
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| 980 | + IXGB_READ_REG(hw, CRCERRS); |
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| 981 | + IXGB_READ_REG(hw, ICBC); |
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| 982 | + IXGB_READ_REG(hw, ECBC); |
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| 983 | + IXGB_READ_REG(hw, MPC); |
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| 984 | + IXGB_READ_REG(hw, TPTL); |
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| 985 | + IXGB_READ_REG(hw, TPTH); |
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| 986 | + IXGB_READ_REG(hw, GPTCL); |
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| 987 | + IXGB_READ_REG(hw, GPTCH); |
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| 988 | + IXGB_READ_REG(hw, BPTCL); |
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| 989 | + IXGB_READ_REG(hw, BPTCH); |
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| 990 | + IXGB_READ_REG(hw, MPTCL); |
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| 991 | + IXGB_READ_REG(hw, MPTCH); |
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| 992 | + IXGB_READ_REG(hw, UPTCL); |
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| 993 | + IXGB_READ_REG(hw, UPTCH); |
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| 994 | + IXGB_READ_REG(hw, VPTCL); |
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| 995 | + IXGB_READ_REG(hw, VPTCH); |
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| 996 | + IXGB_READ_REG(hw, JPTCL); |
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| 997 | + IXGB_READ_REG(hw, JPTCH); |
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| 998 | + IXGB_READ_REG(hw, GOTCL); |
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| 999 | + IXGB_READ_REG(hw, GOTCH); |
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| 1000 | + IXGB_READ_REG(hw, TOTL); |
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| 1001 | + IXGB_READ_REG(hw, TOTH); |
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| 1002 | + IXGB_READ_REG(hw, DC); |
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| 1003 | + IXGB_READ_REG(hw, PLT64C); |
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| 1004 | + IXGB_READ_REG(hw, TSCTC); |
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| 1005 | + IXGB_READ_REG(hw, TSCTFC); |
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| 1006 | + IXGB_READ_REG(hw, IBIC); |
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| 1007 | + IXGB_READ_REG(hw, RFC); |
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| 1008 | + IXGB_READ_REG(hw, LFC); |
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| 1009 | + IXGB_READ_REG(hw, PFRC); |
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| 1010 | + IXGB_READ_REG(hw, PFTC); |
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| 1011 | + IXGB_READ_REG(hw, MCFRC); |
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| 1012 | + IXGB_READ_REG(hw, MCFTC); |
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| 1013 | + IXGB_READ_REG(hw, XONRXC); |
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| 1014 | + IXGB_READ_REG(hw, XONTXC); |
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| 1015 | + IXGB_READ_REG(hw, XOFFRXC); |
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| 1016 | + IXGB_READ_REG(hw, XOFFTXC); |
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| 1017 | + IXGB_READ_REG(hw, RJC); |
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| 1022 | 1018 | } |
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| 1023 | 1019 | |
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| 1024 | 1020 | /****************************************************************************** |
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| .. | .. |
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| 1161 | 1157 | ixgb_optics_reset(struct ixgb_hw *hw) |
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| 1162 | 1158 | { |
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| 1163 | 1159 | if (hw->phy_type == ixgb_phy_type_txn17401) { |
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| 1164 | | - u16 mdio_reg; |
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| 1165 | | - |
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| 1166 | 1160 | ixgb_write_phy_reg(hw, |
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| 1167 | 1161 | MDIO_CTRL1, |
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| 1168 | 1162 | IXGB_PHY_ADDRESS, |
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| 1169 | 1163 | MDIO_MMD_PMAPMD, |
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| 1170 | 1164 | MDIO_CTRL1_RESET); |
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| 1171 | 1165 | |
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| 1172 | | - mdio_reg = ixgb_read_phy_reg(hw, |
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| 1173 | | - MDIO_CTRL1, |
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| 1174 | | - IXGB_PHY_ADDRESS, |
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| 1175 | | - MDIO_MMD_PMAPMD); |
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| 1166 | + ixgb_read_phy_reg(hw, MDIO_CTRL1, IXGB_PHY_ADDRESS, MDIO_MMD_PMAPMD); |
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| 1176 | 1167 | } |
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| 1177 | 1168 | } |
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| 1178 | 1169 | |
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