| .. | .. |
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| 1 | | -/* |
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| 2 | | - * aQuantia Corporation Network Driver |
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| 3 | | - * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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| 2 | +/* Atlantic Network Driver |
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| 4 | 3 | * |
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| 5 | | - * This program is free software; you can redistribute it and/or modify it |
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| 6 | | - * under the terms and conditions of the GNU General Public License, |
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| 7 | | - * version 2, as published by the Free Software Foundation. |
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| 4 | + * Copyright (C) 2014-2019 aQuantia Corporation |
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| 5 | + * Copyright (C) 2019-2020 Marvell International Ltd. |
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| 8 | 6 | */ |
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| 9 | 7 | |
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| 10 | 8 | /* File aq_nic.c: Definition of common code for NIC. */ |
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| .. | .. |
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| 14 | 12 | #include "aq_vec.h" |
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| 15 | 13 | #include "aq_hw.h" |
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| 16 | 14 | #include "aq_pci_func.h" |
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| 15 | +#include "aq_macsec.h" |
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| 16 | +#include "aq_main.h" |
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| 17 | +#include "aq_phy.h" |
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| 18 | +#include "aq_ptp.h" |
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| 19 | +#include "aq_filters.h" |
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| 17 | 20 | |
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| 18 | 21 | #include <linux/moduleparam.h> |
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| 19 | 22 | #include <linux/netdevice.h> |
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| .. | .. |
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| 23 | 26 | #include <linux/ip.h> |
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| 24 | 27 | #include <linux/tcp.h> |
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| 25 | 28 | #include <net/ip.h> |
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| 29 | +#include <net/pkt_cls.h> |
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| 26 | 30 | |
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| 27 | 31 | static unsigned int aq_itr = AQ_CFG_INTERRUPT_MODERATION_AUTO; |
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| 28 | 32 | module_param_named(aq_itr, aq_itr, uint, 0644); |
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| .. | .. |
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| 40 | 44 | |
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| 41 | 45 | static void aq_nic_rss_init(struct aq_nic_s *self, unsigned int num_rss_queues) |
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| 42 | 46 | { |
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| 43 | | - struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; |
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| 44 | | - struct aq_rss_parameters *rss_params = &cfg->aq_rss; |
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| 45 | | - int i = 0; |
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| 46 | | - |
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| 47 | 47 | static u8 rss_key[AQ_CFG_RSS_HASHKEY_SIZE] = { |
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| 48 | 48 | 0x1e, 0xad, 0x71, 0x87, 0x65, 0xfc, 0x26, 0x7d, |
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| 49 | 49 | 0x0d, 0x45, 0x67, 0x74, 0xcd, 0x06, 0x1a, 0x18, |
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| .. | .. |
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| 51 | 51 | 0x19, 0x13, 0x4b, 0xa9, 0xd0, 0x3e, 0xfe, 0x70, |
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| 52 | 52 | 0x25, 0x03, 0xab, 0x50, 0x6a, 0x8b, 0x82, 0x0c |
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| 53 | 53 | }; |
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| 54 | + struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; |
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| 55 | + struct aq_rss_parameters *rss_params; |
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| 56 | + int i = 0; |
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| 57 | + |
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| 58 | + rss_params = &cfg->aq_rss; |
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| 54 | 59 | |
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| 55 | 60 | rss_params->hash_secret_key_size = sizeof(rss_key); |
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| 56 | 61 | memcpy(rss_params->hash_secret_key, rss_key, sizeof(rss_key)); |
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| .. | .. |
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| 60 | 65 | rss_params->indirection_table[i] = i & (num_rss_queues - 1); |
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| 61 | 66 | } |
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| 62 | 67 | |
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| 68 | +/* Recalculate the number of vectors */ |
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| 69 | +static void aq_nic_cfg_update_num_vecs(struct aq_nic_s *self) |
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| 70 | +{ |
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| 71 | + struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; |
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| 72 | + |
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| 73 | + cfg->vecs = min(cfg->aq_hw_caps->vecs, AQ_CFG_VECS_DEF); |
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| 74 | + cfg->vecs = min(cfg->vecs, num_online_cpus()); |
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| 75 | + if (self->irqvecs > AQ_HW_SERVICE_IRQS) |
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| 76 | + cfg->vecs = min(cfg->vecs, self->irqvecs - AQ_HW_SERVICE_IRQS); |
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| 77 | + /* cfg->vecs should be power of 2 for RSS */ |
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| 78 | + cfg->vecs = rounddown_pow_of_two(cfg->vecs); |
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| 79 | + |
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| 80 | + if (ATL_HW_IS_CHIP_FEATURE(self->aq_hw, ANTIGUA)) { |
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| 81 | + if (cfg->tcs > 2) |
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| 82 | + cfg->vecs = min(cfg->vecs, 4U); |
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| 83 | + } |
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| 84 | + |
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| 85 | + if (cfg->vecs <= 4) |
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| 86 | + cfg->tc_mode = AQ_TC_MODE_8TCS; |
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| 87 | + else |
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| 88 | + cfg->tc_mode = AQ_TC_MODE_4TCS; |
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| 89 | + |
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| 90 | + /*rss rings */ |
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| 91 | + cfg->num_rss_queues = min(cfg->vecs, AQ_CFG_NUM_RSS_QUEUES_DEF); |
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| 92 | + aq_nic_rss_init(self, cfg->num_rss_queues); |
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| 93 | +} |
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| 94 | + |
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| 63 | 95 | /* Checks hw_caps and 'corrects' aq_nic_cfg in runtime */ |
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| 64 | 96 | void aq_nic_cfg_start(struct aq_nic_s *self) |
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| 65 | 97 | { |
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| 66 | 98 | struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; |
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| 99 | + int i; |
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| 67 | 100 | |
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| 68 | 101 | cfg->tcs = AQ_CFG_TCS_DEF; |
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| 69 | 102 | |
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| .. | .. |
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| 73 | 106 | cfg->tx_itr = aq_itr_tx; |
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| 74 | 107 | cfg->rx_itr = aq_itr_rx; |
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| 75 | 108 | |
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| 109 | + cfg->rxpageorder = AQ_CFG_RX_PAGEORDER; |
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| 76 | 110 | cfg->is_rss = AQ_CFG_IS_RSS_DEF; |
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| 77 | | - cfg->num_rss_queues = AQ_CFG_NUM_RSS_QUEUES_DEF; |
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| 78 | 111 | cfg->aq_rss.base_cpu_number = AQ_CFG_RSS_BASE_CPU_NUM_DEF; |
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| 79 | | - cfg->flow_control = AQ_CFG_FC_MODE; |
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| 112 | + cfg->fc.req = AQ_CFG_FC_MODE; |
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| 113 | + cfg->wol = AQ_CFG_WOL_MODES; |
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| 80 | 114 | |
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| 81 | 115 | cfg->mtu = AQ_CFG_MTU_DEF; |
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| 82 | 116 | cfg->link_speed_msk = AQ_CFG_SPEED_MSK; |
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| 83 | 117 | cfg->is_autoneg = AQ_CFG_IS_AUTONEG_DEF; |
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| 84 | 118 | |
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| 85 | 119 | cfg->is_lro = AQ_CFG_IS_LRO_DEF; |
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| 86 | | - |
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| 87 | | - cfg->vlan_id = 0U; |
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| 88 | | - |
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| 89 | | - aq_nic_rss_init(self, cfg->num_rss_queues); |
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| 120 | + cfg->is_ptp = true; |
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| 90 | 121 | |
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| 91 | 122 | /*descriptors */ |
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| 92 | 123 | cfg->rxds = min(cfg->aq_hw_caps->rxds_max, AQ_CFG_RXDS_DEF); |
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| 93 | 124 | cfg->txds = min(cfg->aq_hw_caps->txds_max, AQ_CFG_TXDS_DEF); |
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| 94 | 125 | |
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| 95 | | - /*rss rings */ |
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| 96 | | - cfg->vecs = min(cfg->aq_hw_caps->vecs, AQ_CFG_VECS_DEF); |
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| 97 | | - cfg->vecs = min(cfg->vecs, num_online_cpus()); |
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| 98 | | - cfg->vecs = min(cfg->vecs, self->irqvecs); |
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| 99 | | - /* cfg->vecs should be power of 2 for RSS */ |
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| 100 | | - if (cfg->vecs >= 8U) |
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| 101 | | - cfg->vecs = 8U; |
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| 102 | | - else if (cfg->vecs >= 4U) |
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| 103 | | - cfg->vecs = 4U; |
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| 104 | | - else if (cfg->vecs >= 2U) |
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| 105 | | - cfg->vecs = 2U; |
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| 106 | | - else |
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| 107 | | - cfg->vecs = 1U; |
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| 108 | | - |
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| 109 | | - cfg->num_rss_queues = min(cfg->vecs, AQ_CFG_NUM_RSS_QUEUES_DEF); |
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| 126 | + aq_nic_cfg_update_num_vecs(self); |
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| 110 | 127 | |
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| 111 | 128 | cfg->irq_type = aq_pci_func_get_irq_type(self); |
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| 112 | 129 | |
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| .. | .. |
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| 117 | 134 | cfg->vecs = 1U; |
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| 118 | 135 | } |
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| 119 | 136 | |
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| 137 | + /* Check if we have enough vectors allocated for |
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| 138 | + * link status IRQ. If no - we'll know link state from |
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| 139 | + * slower service task. |
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| 140 | + */ |
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| 141 | + if (AQ_HW_SERVICE_IRQS > 0 && cfg->vecs + 1 <= self->irqvecs) |
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| 142 | + cfg->link_irq_vec = cfg->vecs; |
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| 143 | + else |
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| 144 | + cfg->link_irq_vec = 0; |
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| 145 | + |
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| 120 | 146 | cfg->link_speed_msk &= cfg->aq_hw_caps->link_speed_msk; |
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| 121 | | - cfg->hw_features = cfg->aq_hw_caps->hw_features; |
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| 147 | + cfg->features = cfg->aq_hw_caps->hw_features; |
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| 148 | + cfg->is_vlan_rx_strip = !!(cfg->features & NETIF_F_HW_VLAN_CTAG_RX); |
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| 149 | + cfg->is_vlan_tx_insert = !!(cfg->features & NETIF_F_HW_VLAN_CTAG_TX); |
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| 150 | + cfg->is_vlan_force_promisc = true; |
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| 151 | + |
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| 152 | + for (i = 0; i < sizeof(cfg->prio_tc_map); i++) |
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| 153 | + cfg->prio_tc_map[i] = cfg->tcs * i / 8; |
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| 122 | 154 | } |
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| 123 | 155 | |
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| 124 | 156 | static int aq_nic_update_link_status(struct aq_nic_s *self) |
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| 125 | 157 | { |
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| 126 | 158 | int err = self->aq_fw_ops->update_link_status(self->aq_hw); |
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| 159 | + u32 fc = 0; |
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| 127 | 160 | |
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| 128 | 161 | if (err) |
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| 129 | 162 | return err; |
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| 130 | 163 | |
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| 164 | + if (self->aq_fw_ops->get_flow_control) |
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| 165 | + self->aq_fw_ops->get_flow_control(self->aq_hw, &fc); |
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| 166 | + self->aq_nic_cfg.fc.cur = fc; |
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| 167 | + |
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| 131 | 168 | if (self->link_status.mbps != self->aq_hw->aq_link_status.mbps) { |
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| 132 | | - pr_info("%s: link change old %d new %d\n", |
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| 133 | | - AQ_CFG_DRV_NAME, self->link_status.mbps, |
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| 134 | | - self->aq_hw->aq_link_status.mbps); |
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| 169 | + netdev_info(self->ndev, "%s: link change old %d new %d\n", |
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| 170 | + AQ_CFG_DRV_NAME, self->link_status.mbps, |
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| 171 | + self->aq_hw->aq_link_status.mbps); |
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| 135 | 172 | aq_nic_update_interrupt_moderation_settings(self); |
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| 173 | + |
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| 174 | + if (self->aq_ptp) { |
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| 175 | + aq_ptp_clock_init(self); |
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| 176 | + aq_ptp_tm_offset_set(self, |
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| 177 | + self->aq_hw->aq_link_status.mbps); |
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| 178 | + aq_ptp_link_change(self); |
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| 179 | + } |
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| 180 | + |
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| 181 | + /* Driver has to update flow control settings on RX block |
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| 182 | + * on any link event. |
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| 183 | + * We should query FW whether it negotiated FC. |
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| 184 | + */ |
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| 185 | + if (self->aq_hw_ops->hw_set_fc) |
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| 186 | + self->aq_hw_ops->hw_set_fc(self->aq_hw, fc, 0); |
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| 136 | 187 | } |
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| 137 | 188 | |
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| 138 | 189 | self->link_status = self->aq_hw->aq_link_status; |
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| .. | .. |
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| 142 | 193 | aq_utils_obj_clear(&self->flags, |
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| 143 | 194 | AQ_NIC_LINK_DOWN); |
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| 144 | 195 | netif_carrier_on(self->ndev); |
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| 196 | +#if IS_ENABLED(CONFIG_MACSEC) |
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| 197 | + aq_macsec_enable(self); |
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| 198 | +#endif |
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| 199 | + if (self->aq_hw_ops->hw_tc_rate_limit_set) |
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| 200 | + self->aq_hw_ops->hw_tc_rate_limit_set(self->aq_hw); |
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| 201 | + |
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| 145 | 202 | netif_tx_wake_all_queues(self->ndev); |
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| 146 | 203 | } |
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| 147 | 204 | if (netif_carrier_ok(self->ndev) && !self->link_status.mbps) { |
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| .. | .. |
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| 149 | 206 | netif_tx_disable(self->ndev); |
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| 150 | 207 | aq_utils_obj_set(&self->flags, AQ_NIC_LINK_DOWN); |
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| 151 | 208 | } |
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| 209 | + |
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| 152 | 210 | return 0; |
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| 211 | +} |
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| 212 | + |
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| 213 | +static irqreturn_t aq_linkstate_threaded_isr(int irq, void *private) |
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| 214 | +{ |
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| 215 | + struct aq_nic_s *self = private; |
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| 216 | + |
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| 217 | + if (!self) |
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| 218 | + return IRQ_NONE; |
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| 219 | + |
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| 220 | + aq_nic_update_link_status(self); |
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| 221 | + |
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| 222 | + self->aq_hw_ops->hw_irq_enable(self->aq_hw, |
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| 223 | + BIT(self->aq_nic_cfg.link_irq_vec)); |
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| 224 | + |
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| 225 | + return IRQ_HANDLED; |
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| 226 | +} |
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| 227 | + |
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| 228 | +static void aq_nic_service_task(struct work_struct *work) |
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| 229 | +{ |
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| 230 | + struct aq_nic_s *self = container_of(work, struct aq_nic_s, |
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| 231 | + service_task); |
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| 232 | + int err; |
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| 233 | + |
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| 234 | + aq_ptp_service_task(self); |
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| 235 | + |
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| 236 | + if (aq_utils_obj_test(&self->flags, AQ_NIC_FLAGS_IS_NOT_READY)) |
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| 237 | + return; |
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| 238 | + |
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| 239 | + err = aq_nic_update_link_status(self); |
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| 240 | + if (err) |
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| 241 | + return; |
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| 242 | + |
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| 243 | +#if IS_ENABLED(CONFIG_MACSEC) |
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| 244 | + aq_macsec_work(self); |
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| 245 | +#endif |
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| 246 | + |
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| 247 | + mutex_lock(&self->fwreq_mutex); |
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| 248 | + if (self->aq_fw_ops->update_stats) |
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| 249 | + self->aq_fw_ops->update_stats(self->aq_hw); |
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| 250 | + mutex_unlock(&self->fwreq_mutex); |
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| 251 | + |
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| 252 | + aq_nic_update_ndev_stats(self); |
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| 153 | 253 | } |
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| 154 | 254 | |
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| 155 | 255 | static void aq_nic_service_timer_cb(struct timer_list *t) |
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| 156 | 256 | { |
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| 157 | 257 | struct aq_nic_s *self = from_timer(self, t, service_timer); |
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| 158 | | - int ctimer = AQ_CFG_SERVICE_TIMER_INTERVAL; |
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| 159 | | - int err = 0; |
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| 160 | 258 | |
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| 161 | | - if (aq_utils_obj_test(&self->flags, AQ_NIC_FLAGS_IS_NOT_READY)) |
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| 162 | | - goto err_exit; |
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| 259 | + mod_timer(&self->service_timer, |
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| 260 | + jiffies + AQ_CFG_SERVICE_TIMER_INTERVAL); |
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| 163 | 261 | |
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| 164 | | - err = aq_nic_update_link_status(self); |
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| 165 | | - if (err) |
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| 166 | | - goto err_exit; |
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| 167 | | - |
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| 168 | | - if (self->aq_fw_ops->update_stats) |
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| 169 | | - self->aq_fw_ops->update_stats(self->aq_hw); |
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| 170 | | - |
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| 171 | | - aq_nic_update_ndev_stats(self); |
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| 172 | | - |
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| 173 | | - /* If no link - use faster timer rate to detect link up asap */ |
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| 174 | | - if (!netif_carrier_ok(self->ndev)) |
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| 175 | | - ctimer = max(ctimer / 2, 1); |
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| 176 | | - |
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| 177 | | -err_exit: |
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| 178 | | - mod_timer(&self->service_timer, jiffies + ctimer); |
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| 262 | + aq_ndev_schedule_work(&self->service_task); |
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| 179 | 263 | } |
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| 180 | 264 | |
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| 181 | 265 | static void aq_nic_polling_timer_cb(struct timer_list *t) |
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| 182 | 266 | { |
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| 183 | 267 | struct aq_nic_s *self = from_timer(self, t, polling_timer); |
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| 184 | | - struct aq_vec_s *aq_vec = NULL; |
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| 185 | 268 | unsigned int i = 0U; |
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| 186 | 269 | |
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| 187 | | - for (i = 0U, aq_vec = self->aq_vec[0]; |
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| 188 | | - self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) |
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| 189 | | - aq_vec_isr(i, (void *)aq_vec); |
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| 270 | + for (i = 0U; self->aq_vecs > i; ++i) |
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| 271 | + aq_vec_isr(i, (void *)self->aq_vec[i]); |
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| 190 | 272 | |
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| 191 | 273 | mod_timer(&self->polling_timer, jiffies + |
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| 192 | | - AQ_CFG_POLLING_TIMER_INTERVAL); |
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| 274 | + AQ_CFG_POLLING_TIMER_INTERVAL); |
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| 275 | +} |
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| 276 | + |
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| 277 | +static int aq_nic_hw_prepare(struct aq_nic_s *self) |
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| 278 | +{ |
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| 279 | + int err = 0; |
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| 280 | + |
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| 281 | + err = self->aq_hw_ops->hw_soft_reset(self->aq_hw); |
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| 282 | + if (err) |
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| 283 | + goto exit; |
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| 284 | + |
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| 285 | + err = self->aq_hw_ops->hw_prepare(self->aq_hw, &self->aq_fw_ops); |
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| 286 | + |
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| 287 | +exit: |
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| 288 | + return err; |
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| 289 | +} |
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| 290 | + |
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| 291 | +static bool aq_nic_is_valid_ether_addr(const u8 *addr) |
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| 292 | +{ |
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| 293 | + /* Some engineering samples of Aquantia NICs are provisioned with a |
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| 294 | + * partially populated MAC, which is still invalid. |
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| 295 | + */ |
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| 296 | + return !(addr[0] == 0 && addr[1] == 0 && addr[2] == 0); |
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| 193 | 297 | } |
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| 194 | 298 | |
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| 195 | 299 | int aq_nic_ndev_register(struct aq_nic_s *self) |
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| .. | .. |
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| 201 | 305 | goto err_exit; |
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| 202 | 306 | } |
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| 203 | 307 | |
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| 204 | | - err = hw_atl_utils_initfw(self->aq_hw, &self->aq_fw_ops); |
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| 308 | + err = aq_nic_hw_prepare(self); |
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| 205 | 309 | if (err) |
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| 206 | 310 | goto err_exit; |
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| 207 | 311 | |
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| 312 | +#if IS_ENABLED(CONFIG_MACSEC) |
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| 313 | + aq_macsec_init(self); |
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| 314 | +#endif |
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| 315 | + |
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| 316 | + mutex_lock(&self->fwreq_mutex); |
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| 208 | 317 | err = self->aq_fw_ops->get_mac_permanent(self->aq_hw, |
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| 209 | 318 | self->ndev->dev_addr); |
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| 319 | + mutex_unlock(&self->fwreq_mutex); |
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| 210 | 320 | if (err) |
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| 211 | 321 | goto err_exit; |
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| 322 | + |
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| 323 | + if (!is_valid_ether_addr(self->ndev->dev_addr) || |
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| 324 | + !aq_nic_is_valid_ether_addr(self->ndev->dev_addr)) { |
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| 325 | + netdev_warn(self->ndev, "MAC is invalid, will use random."); |
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| 326 | + eth_hw_addr_random(self->ndev); |
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| 327 | + } |
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| 212 | 328 | |
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| 213 | 329 | #if defined(AQ_CFG_MAC_ADDR_PERMANENT) |
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| 214 | 330 | { |
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| .. | .. |
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| 237 | 353 | goto err_exit; |
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| 238 | 354 | |
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| 239 | 355 | err_exit: |
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| 356 | +#if IS_ENABLED(CONFIG_MACSEC) |
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| 357 | + if (err) |
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| 358 | + aq_macsec_free(self); |
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| 359 | +#endif |
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| 240 | 360 | return err; |
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| 241 | 361 | } |
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| 242 | 362 | |
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| .. | .. |
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| 248 | 368 | self->ndev->hw_features |= aq_hw_caps->hw_features; |
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| 249 | 369 | self->ndev->features = aq_hw_caps->hw_features; |
|---|
| 250 | 370 | self->ndev->vlan_features |= NETIF_F_HW_CSUM | NETIF_F_RXCSUM | |
|---|
| 251 | | - NETIF_F_RXHASH | NETIF_F_SG | NETIF_F_LRO; |
|---|
| 371 | + NETIF_F_RXHASH | NETIF_F_SG | |
|---|
| 372 | + NETIF_F_LRO | NETIF_F_TSO | NETIF_F_TSO6; |
|---|
| 373 | + self->ndev->gso_partial_features = NETIF_F_GSO_UDP_L4; |
|---|
| 252 | 374 | self->ndev->priv_flags = aq_hw_caps->hw_priv_flags; |
|---|
| 253 | 375 | self->ndev->priv_flags |= IFF_LIVE_ADDR_CHANGE; |
|---|
| 254 | 376 | |
|---|
| 377 | + self->msg_enable = NETIF_MSG_DRV | NETIF_MSG_LINK; |
|---|
| 255 | 378 | self->ndev->mtu = aq_nic_cfg->mtu - ETH_HLEN; |
|---|
| 256 | 379 | self->ndev->max_mtu = aq_hw_caps->mtu - ETH_FCS_LEN - ETH_HLEN; |
|---|
| 257 | 380 | |
|---|
| .. | .. |
|---|
| 271 | 394 | int aq_nic_init(struct aq_nic_s *self) |
|---|
| 272 | 395 | { |
|---|
| 273 | 396 | struct aq_vec_s *aq_vec = NULL; |
|---|
| 274 | | - int err = 0; |
|---|
| 275 | 397 | unsigned int i = 0U; |
|---|
| 398 | + int err = 0; |
|---|
| 276 | 399 | |
|---|
| 277 | 400 | self->power_state = AQ_HW_POWER_STATE_D0; |
|---|
| 401 | + mutex_lock(&self->fwreq_mutex); |
|---|
| 278 | 402 | err = self->aq_hw_ops->hw_reset(self->aq_hw); |
|---|
| 403 | + mutex_unlock(&self->fwreq_mutex); |
|---|
| 279 | 404 | if (err < 0) |
|---|
| 280 | 405 | goto err_exit; |
|---|
| 406 | + /* Restore default settings */ |
|---|
| 407 | + aq_nic_set_downshift(self, self->aq_nic_cfg.downshift_counter); |
|---|
| 408 | + aq_nic_set_media_detect(self, self->aq_nic_cfg.is_media_detect ? |
|---|
| 409 | + AQ_HW_MEDIA_DETECT_CNT : 0); |
|---|
| 281 | 410 | |
|---|
| 282 | 411 | err = self->aq_hw_ops->hw_init(self->aq_hw, |
|---|
| 283 | 412 | aq_nic_get_ndev(self)->dev_addr); |
|---|
| 284 | 413 | if (err < 0) |
|---|
| 285 | 414 | goto err_exit; |
|---|
| 286 | 415 | |
|---|
| 287 | | - for (i = 0U, aq_vec = self->aq_vec[0]; |
|---|
| 288 | | - self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) |
|---|
| 416 | + if (ATL_HW_IS_CHIP_FEATURE(self->aq_hw, ATLANTIC) && |
|---|
| 417 | + self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_TP) { |
|---|
| 418 | + self->aq_hw->phy_id = HW_ATL_PHY_ID_MAX; |
|---|
| 419 | + err = aq_phy_init(self->aq_hw); |
|---|
| 420 | + |
|---|
| 421 | + /* Disable the PTP on NICs where it's known to cause datapath |
|---|
| 422 | + * problems. |
|---|
| 423 | + * Ideally this should have been done by PHY provisioning, but |
|---|
| 424 | + * many units have been shipped with enabled PTP block already. |
|---|
| 425 | + */ |
|---|
| 426 | + if (self->aq_nic_cfg.aq_hw_caps->quirks & AQ_NIC_QUIRK_BAD_PTP) |
|---|
| 427 | + if (self->aq_hw->phy_id != HW_ATL_PHY_ID_MAX) |
|---|
| 428 | + aq_phy_disable_ptp(self->aq_hw); |
|---|
| 429 | + } |
|---|
| 430 | + |
|---|
| 431 | + for (i = 0U; i < self->aq_vecs; i++) { |
|---|
| 432 | + aq_vec = self->aq_vec[i]; |
|---|
| 433 | + err = aq_vec_ring_alloc(aq_vec, self, i, |
|---|
| 434 | + aq_nic_get_cfg(self)); |
|---|
| 435 | + if (err) |
|---|
| 436 | + goto err_exit; |
|---|
| 437 | + |
|---|
| 289 | 438 | aq_vec_init(aq_vec, self->aq_hw_ops, self->aq_hw); |
|---|
| 439 | + } |
|---|
| 440 | + |
|---|
| 441 | + if (aq_nic_get_cfg(self)->is_ptp) { |
|---|
| 442 | + err = aq_ptp_init(self, self->irqvecs - 1); |
|---|
| 443 | + if (err < 0) |
|---|
| 444 | + goto err_exit; |
|---|
| 445 | + |
|---|
| 446 | + err = aq_ptp_ring_alloc(self); |
|---|
| 447 | + if (err < 0) |
|---|
| 448 | + goto err_exit; |
|---|
| 449 | + |
|---|
| 450 | + err = aq_ptp_ring_init(self); |
|---|
| 451 | + if (err < 0) |
|---|
| 452 | + goto err_exit; |
|---|
| 453 | + } |
|---|
| 290 | 454 | |
|---|
| 291 | 455 | netif_carrier_off(self->ndev); |
|---|
| 292 | 456 | |
|---|
| .. | .. |
|---|
| 297 | 461 | int aq_nic_start(struct aq_nic_s *self) |
|---|
| 298 | 462 | { |
|---|
| 299 | 463 | struct aq_vec_s *aq_vec = NULL; |
|---|
| 300 | | - int err = 0; |
|---|
| 464 | + struct aq_nic_cfg_s *cfg; |
|---|
| 301 | 465 | unsigned int i = 0U; |
|---|
| 466 | + int err = 0; |
|---|
| 467 | + |
|---|
| 468 | + cfg = aq_nic_get_cfg(self); |
|---|
| 302 | 469 | |
|---|
| 303 | 470 | err = self->aq_hw_ops->hw_multicast_list_set(self->aq_hw, |
|---|
| 304 | | - self->mc_list.ar, |
|---|
| 305 | | - self->mc_list.count); |
|---|
| 471 | + self->mc_list.ar, |
|---|
| 472 | + self->mc_list.count); |
|---|
| 306 | 473 | if (err < 0) |
|---|
| 307 | 474 | goto err_exit; |
|---|
| 308 | 475 | |
|---|
| 309 | 476 | err = self->aq_hw_ops->hw_packet_filter_set(self->aq_hw, |
|---|
| 310 | | - self->packet_filter); |
|---|
| 477 | + self->packet_filter); |
|---|
| 311 | 478 | if (err < 0) |
|---|
| 312 | 479 | goto err_exit; |
|---|
| 313 | 480 | |
|---|
| 314 | | - for (i = 0U, aq_vec = self->aq_vec[0]; |
|---|
| 315 | | - self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) { |
|---|
| 481 | + for (i = 0U; self->aq_vecs > i; ++i) { |
|---|
| 482 | + aq_vec = self->aq_vec[i]; |
|---|
| 316 | 483 | err = aq_vec_start(aq_vec); |
|---|
| 317 | 484 | if (err < 0) |
|---|
| 318 | 485 | goto err_exit; |
|---|
| 319 | 486 | } |
|---|
| 487 | + |
|---|
| 488 | + err = aq_ptp_ring_start(self); |
|---|
| 489 | + if (err < 0) |
|---|
| 490 | + goto err_exit; |
|---|
| 491 | + |
|---|
| 492 | + aq_nic_set_loopback(self); |
|---|
| 320 | 493 | |
|---|
| 321 | 494 | err = self->aq_hw_ops->hw_start(self->aq_hw); |
|---|
| 322 | 495 | if (err < 0) |
|---|
| .. | .. |
|---|
| 325 | 498 | err = aq_nic_update_interrupt_moderation_settings(self); |
|---|
| 326 | 499 | if (err) |
|---|
| 327 | 500 | goto err_exit; |
|---|
| 328 | | - timer_setup(&self->service_timer, aq_nic_service_timer_cb, 0); |
|---|
| 329 | | - mod_timer(&self->service_timer, jiffies + |
|---|
| 330 | | - AQ_CFG_SERVICE_TIMER_INTERVAL); |
|---|
| 331 | 501 | |
|---|
| 332 | | - if (self->aq_nic_cfg.is_polling) { |
|---|
| 502 | + INIT_WORK(&self->service_task, aq_nic_service_task); |
|---|
| 503 | + |
|---|
| 504 | + timer_setup(&self->service_timer, aq_nic_service_timer_cb, 0); |
|---|
| 505 | + aq_nic_service_timer_cb(&self->service_timer); |
|---|
| 506 | + |
|---|
| 507 | + if (cfg->is_polling) { |
|---|
| 333 | 508 | timer_setup(&self->polling_timer, aq_nic_polling_timer_cb, 0); |
|---|
| 334 | 509 | mod_timer(&self->polling_timer, jiffies + |
|---|
| 335 | 510 | AQ_CFG_POLLING_TIMER_INTERVAL); |
|---|
| 336 | 511 | } else { |
|---|
| 337 | | - for (i = 0U, aq_vec = self->aq_vec[0]; |
|---|
| 338 | | - self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) { |
|---|
| 339 | | - err = aq_pci_func_alloc_irq(self, i, |
|---|
| 340 | | - self->ndev->name, aq_vec, |
|---|
| 512 | + for (i = 0U; self->aq_vecs > i; ++i) { |
|---|
| 513 | + aq_vec = self->aq_vec[i]; |
|---|
| 514 | + err = aq_pci_func_alloc_irq(self, i, self->ndev->name, |
|---|
| 515 | + aq_vec_isr, aq_vec, |
|---|
| 341 | 516 | aq_vec_get_affinity_mask(aq_vec)); |
|---|
| 342 | 517 | if (err < 0) |
|---|
| 343 | 518 | goto err_exit; |
|---|
| 344 | 519 | } |
|---|
| 345 | 520 | |
|---|
| 521 | + err = aq_ptp_irq_alloc(self); |
|---|
| 522 | + if (err < 0) |
|---|
| 523 | + goto err_exit; |
|---|
| 524 | + |
|---|
| 525 | + if (cfg->link_irq_vec) { |
|---|
| 526 | + int irqvec = pci_irq_vector(self->pdev, |
|---|
| 527 | + cfg->link_irq_vec); |
|---|
| 528 | + err = request_threaded_irq(irqvec, NULL, |
|---|
| 529 | + aq_linkstate_threaded_isr, |
|---|
| 530 | + IRQF_SHARED | IRQF_ONESHOT, |
|---|
| 531 | + self->ndev->name, self); |
|---|
| 532 | + if (err < 0) |
|---|
| 533 | + goto err_exit; |
|---|
| 534 | + self->msix_entry_mask |= (1 << cfg->link_irq_vec); |
|---|
| 535 | + } |
|---|
| 536 | + |
|---|
| 346 | 537 | err = self->aq_hw_ops->hw_irq_enable(self->aq_hw, |
|---|
| 347 | | - AQ_CFG_IRQ_MASK); |
|---|
| 538 | + AQ_CFG_IRQ_MASK); |
|---|
| 348 | 539 | if (err < 0) |
|---|
| 349 | 540 | goto err_exit; |
|---|
| 350 | 541 | } |
|---|
| 351 | 542 | |
|---|
| 352 | | - err = netif_set_real_num_tx_queues(self->ndev, self->aq_vecs); |
|---|
| 543 | + err = netif_set_real_num_tx_queues(self->ndev, |
|---|
| 544 | + self->aq_vecs * cfg->tcs); |
|---|
| 353 | 545 | if (err < 0) |
|---|
| 354 | 546 | goto err_exit; |
|---|
| 355 | 547 | |
|---|
| 356 | | - err = netif_set_real_num_rx_queues(self->ndev, self->aq_vecs); |
|---|
| 548 | + err = netif_set_real_num_rx_queues(self->ndev, |
|---|
| 549 | + self->aq_vecs * cfg->tcs); |
|---|
| 357 | 550 | if (err < 0) |
|---|
| 358 | 551 | goto err_exit; |
|---|
| 359 | 552 | |
|---|
| 553 | + for (i = 0; i < cfg->tcs; i++) { |
|---|
| 554 | + u16 offset = self->aq_vecs * i; |
|---|
| 555 | + |
|---|
| 556 | + netdev_set_tc_queue(self->ndev, i, self->aq_vecs, offset); |
|---|
| 557 | + } |
|---|
| 360 | 558 | netif_tx_start_all_queues(self->ndev); |
|---|
| 361 | 559 | |
|---|
| 362 | 560 | err_exit: |
|---|
| 363 | 561 | return err; |
|---|
| 364 | 562 | } |
|---|
| 365 | 563 | |
|---|
| 366 | | -static unsigned int aq_nic_map_skb(struct aq_nic_s *self, |
|---|
| 367 | | - struct sk_buff *skb, |
|---|
| 368 | | - struct aq_ring_s *ring) |
|---|
| 564 | +unsigned int aq_nic_map_skb(struct aq_nic_s *self, struct sk_buff *skb, |
|---|
| 565 | + struct aq_ring_s *ring) |
|---|
| 369 | 566 | { |
|---|
| 370 | | - unsigned int ret = 0U; |
|---|
| 371 | 567 | unsigned int nr_frags = skb_shinfo(skb)->nr_frags; |
|---|
| 372 | | - unsigned int frag_count = 0U; |
|---|
| 373 | | - unsigned int dx = ring->sw_tail; |
|---|
| 568 | + struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self); |
|---|
| 569 | + struct device *dev = aq_nic_get_dev(self); |
|---|
| 374 | 570 | struct aq_ring_buff_s *first = NULL; |
|---|
| 375 | | - struct aq_ring_buff_s *dx_buff = &ring->buff_ring[dx]; |
|---|
| 571 | + u8 ipver = ip_hdr(skb)->version; |
|---|
| 572 | + struct aq_ring_buff_s *dx_buff; |
|---|
| 573 | + bool need_context_tag = false; |
|---|
| 574 | + unsigned int frag_count = 0U; |
|---|
| 575 | + unsigned int ret = 0U; |
|---|
| 576 | + unsigned int dx; |
|---|
| 577 | + u8 l4proto = 0; |
|---|
| 578 | + |
|---|
| 579 | + if (ipver == 4) |
|---|
| 580 | + l4proto = ip_hdr(skb)->protocol; |
|---|
| 581 | + else if (ipver == 6) |
|---|
| 582 | + l4proto = ipv6_hdr(skb)->nexthdr; |
|---|
| 583 | + |
|---|
| 584 | + dx = ring->sw_tail; |
|---|
| 585 | + dx_buff = &ring->buff_ring[dx]; |
|---|
| 586 | + dx_buff->flags = 0U; |
|---|
| 376 | 587 | |
|---|
| 377 | 588 | if (unlikely(skb_is_gso(skb))) { |
|---|
| 378 | | - dx_buff->flags = 0U; |
|---|
| 589 | + dx_buff->mss = skb_shinfo(skb)->gso_size; |
|---|
| 590 | + if (l4proto == IPPROTO_TCP) { |
|---|
| 591 | + dx_buff->is_gso_tcp = 1U; |
|---|
| 592 | + dx_buff->len_l4 = tcp_hdrlen(skb); |
|---|
| 593 | + } else if (l4proto == IPPROTO_UDP) { |
|---|
| 594 | + dx_buff->is_gso_udp = 1U; |
|---|
| 595 | + dx_buff->len_l4 = sizeof(struct udphdr); |
|---|
| 596 | + /* UDP GSO Hardware does not replace packet length. */ |
|---|
| 597 | + udp_hdr(skb)->len = htons(dx_buff->mss + |
|---|
| 598 | + dx_buff->len_l4); |
|---|
| 599 | + } else { |
|---|
| 600 | + WARN_ONCE(true, "Bad GSO mode"); |
|---|
| 601 | + goto exit; |
|---|
| 602 | + } |
|---|
| 379 | 603 | dx_buff->len_pkt = skb->len; |
|---|
| 380 | 604 | dx_buff->len_l2 = ETH_HLEN; |
|---|
| 381 | | - dx_buff->len_l3 = ip_hdrlen(skb); |
|---|
| 382 | | - dx_buff->len_l4 = tcp_hdrlen(skb); |
|---|
| 383 | | - dx_buff->mss = skb_shinfo(skb)->gso_size; |
|---|
| 384 | | - dx_buff->is_txc = 1U; |
|---|
| 605 | + dx_buff->len_l3 = skb_network_header_len(skb); |
|---|
| 385 | 606 | dx_buff->eop_index = 0xffffU; |
|---|
| 607 | + dx_buff->is_ipv6 = (ipver == 6); |
|---|
| 608 | + need_context_tag = true; |
|---|
| 609 | + } |
|---|
| 386 | 610 | |
|---|
| 387 | | - dx_buff->is_ipv6 = |
|---|
| 388 | | - (ip_hdr(skb)->version == 6) ? 1U : 0U; |
|---|
| 611 | + if (cfg->is_vlan_tx_insert && skb_vlan_tag_present(skb)) { |
|---|
| 612 | + dx_buff->vlan_tx_tag = skb_vlan_tag_get(skb); |
|---|
| 613 | + dx_buff->len_pkt = skb->len; |
|---|
| 614 | + dx_buff->is_vlan = 1U; |
|---|
| 615 | + need_context_tag = true; |
|---|
| 616 | + } |
|---|
| 389 | 617 | |
|---|
| 618 | + if (need_context_tag) { |
|---|
| 390 | 619 | dx = aq_ring_next_dx(ring, dx); |
|---|
| 391 | 620 | dx_buff = &ring->buff_ring[dx]; |
|---|
| 621 | + dx_buff->flags = 0U; |
|---|
| 392 | 622 | ++ret; |
|---|
| 393 | 623 | } |
|---|
| 394 | 624 | |
|---|
| 395 | | - dx_buff->flags = 0U; |
|---|
| 396 | 625 | dx_buff->len = skb_headlen(skb); |
|---|
| 397 | | - dx_buff->pa = dma_map_single(aq_nic_get_dev(self), |
|---|
| 626 | + dx_buff->pa = dma_map_single(dev, |
|---|
| 398 | 627 | skb->data, |
|---|
| 399 | 628 | dx_buff->len, |
|---|
| 400 | 629 | DMA_TO_DEVICE); |
|---|
| 401 | 630 | |
|---|
| 402 | | - if (unlikely(dma_mapping_error(aq_nic_get_dev(self), dx_buff->pa))) { |
|---|
| 631 | + if (unlikely(dma_mapping_error(dev, dx_buff->pa))) { |
|---|
| 403 | 632 | ret = 0; |
|---|
| 404 | 633 | goto exit; |
|---|
| 405 | 634 | } |
|---|
| .. | .. |
|---|
| 411 | 640 | ++ret; |
|---|
| 412 | 641 | |
|---|
| 413 | 642 | if (skb->ip_summed == CHECKSUM_PARTIAL) { |
|---|
| 414 | | - dx_buff->is_ip_cso = (htons(ETH_P_IP) == skb->protocol) ? |
|---|
| 415 | | - 1U : 0U; |
|---|
| 416 | | - |
|---|
| 417 | | - if (ip_hdr(skb)->version == 4) { |
|---|
| 418 | | - dx_buff->is_tcp_cso = |
|---|
| 419 | | - (ip_hdr(skb)->protocol == IPPROTO_TCP) ? |
|---|
| 420 | | - 1U : 0U; |
|---|
| 421 | | - dx_buff->is_udp_cso = |
|---|
| 422 | | - (ip_hdr(skb)->protocol == IPPROTO_UDP) ? |
|---|
| 423 | | - 1U : 0U; |
|---|
| 424 | | - } else if (ip_hdr(skb)->version == 6) { |
|---|
| 425 | | - dx_buff->is_tcp_cso = |
|---|
| 426 | | - (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP) ? |
|---|
| 427 | | - 1U : 0U; |
|---|
| 428 | | - dx_buff->is_udp_cso = |
|---|
| 429 | | - (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP) ? |
|---|
| 430 | | - 1U : 0U; |
|---|
| 431 | | - } |
|---|
| 643 | + dx_buff->is_ip_cso = (htons(ETH_P_IP) == skb->protocol); |
|---|
| 644 | + dx_buff->is_tcp_cso = (l4proto == IPPROTO_TCP); |
|---|
| 645 | + dx_buff->is_udp_cso = (l4proto == IPPROTO_UDP); |
|---|
| 432 | 646 | } |
|---|
| 433 | 647 | |
|---|
| 434 | 648 | for (; nr_frags--; ++frag_count) { |
|---|
| .. | .. |
|---|
| 446 | 660 | else |
|---|
| 447 | 661 | buff_size = frag_len; |
|---|
| 448 | 662 | |
|---|
| 449 | | - frag_pa = skb_frag_dma_map(aq_nic_get_dev(self), |
|---|
| 663 | + frag_pa = skb_frag_dma_map(dev, |
|---|
| 450 | 664 | frag, |
|---|
| 451 | 665 | buff_offset, |
|---|
| 452 | 666 | buff_size, |
|---|
| 453 | 667 | DMA_TO_DEVICE); |
|---|
| 454 | 668 | |
|---|
| 455 | | - if (unlikely(dma_mapping_error(aq_nic_get_dev(self), |
|---|
| 669 | + if (unlikely(dma_mapping_error(dev, |
|---|
| 456 | 670 | frag_pa))) |
|---|
| 457 | 671 | goto mapping_error; |
|---|
| 458 | 672 | |
|---|
| .. | .. |
|---|
| 483 | 697 | --ret, dx = aq_ring_next_dx(ring, dx)) { |
|---|
| 484 | 698 | dx_buff = &ring->buff_ring[dx]; |
|---|
| 485 | 699 | |
|---|
| 486 | | - if (!dx_buff->is_txc && dx_buff->pa) { |
|---|
| 700 | + if (!(dx_buff->is_gso_tcp || dx_buff->is_gso_udp) && |
|---|
| 701 | + !dx_buff->is_vlan && dx_buff->pa) { |
|---|
| 487 | 702 | if (unlikely(dx_buff->is_sop)) { |
|---|
| 488 | | - dma_unmap_single(aq_nic_get_dev(self), |
|---|
| 703 | + dma_unmap_single(dev, |
|---|
| 489 | 704 | dx_buff->pa, |
|---|
| 490 | 705 | dx_buff->len, |
|---|
| 491 | 706 | DMA_TO_DEVICE); |
|---|
| 492 | 707 | } else { |
|---|
| 493 | | - dma_unmap_page(aq_nic_get_dev(self), |
|---|
| 708 | + dma_unmap_page(dev, |
|---|
| 494 | 709 | dx_buff->pa, |
|---|
| 495 | 710 | dx_buff->len, |
|---|
| 496 | 711 | DMA_TO_DEVICE); |
|---|
| .. | .. |
|---|
| 504 | 719 | |
|---|
| 505 | 720 | int aq_nic_xmit(struct aq_nic_s *self, struct sk_buff *skb) |
|---|
| 506 | 721 | { |
|---|
| 722 | + struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self); |
|---|
| 723 | + unsigned int vec = skb->queue_mapping % cfg->vecs; |
|---|
| 724 | + unsigned int tc = skb->queue_mapping / cfg->vecs; |
|---|
| 507 | 725 | struct aq_ring_s *ring = NULL; |
|---|
| 508 | 726 | unsigned int frags = 0U; |
|---|
| 509 | | - unsigned int vec = skb->queue_mapping % self->aq_nic_cfg.vecs; |
|---|
| 510 | | - unsigned int tc = 0U; |
|---|
| 511 | 727 | int err = NETDEV_TX_OK; |
|---|
| 512 | 728 | |
|---|
| 513 | 729 | frags = skb_shinfo(skb)->nr_frags + 1; |
|---|
| 514 | 730 | |
|---|
| 515 | | - ring = self->aq_ring_tx[AQ_NIC_TCVEC2RING(self, tc, vec)]; |
|---|
| 731 | + ring = self->aq_ring_tx[AQ_NIC_CFG_TCVEC2RING(cfg, tc, vec)]; |
|---|
| 516 | 732 | |
|---|
| 517 | 733 | if (frags > AQ_CFG_SKB_FRAGS_MAX) { |
|---|
| 518 | 734 | dev_kfree_skb_any(skb); |
|---|
| .. | .. |
|---|
| 521 | 737 | |
|---|
| 522 | 738 | aq_ring_update_queue_state(ring); |
|---|
| 523 | 739 | |
|---|
| 740 | + if (cfg->priv_flags & BIT(AQ_HW_LOOPBACK_DMA_NET)) { |
|---|
| 741 | + err = NETDEV_TX_BUSY; |
|---|
| 742 | + goto err_exit; |
|---|
| 743 | + } |
|---|
| 744 | + |
|---|
| 524 | 745 | /* Above status update may stop the queue. Check this. */ |
|---|
| 525 | | - if (__netif_subqueue_stopped(self->ndev, ring->idx)) { |
|---|
| 746 | + if (__netif_subqueue_stopped(self->ndev, |
|---|
| 747 | + AQ_NIC_RING2QMAP(self, ring->idx))) { |
|---|
| 526 | 748 | err = NETDEV_TX_BUSY; |
|---|
| 527 | 749 | goto err_exit; |
|---|
| 528 | 750 | } |
|---|
| .. | .. |
|---|
| 561 | 783 | |
|---|
| 562 | 784 | int aq_nic_set_multicast_list(struct aq_nic_s *self, struct net_device *ndev) |
|---|
| 563 | 785 | { |
|---|
| 564 | | - unsigned int packet_filter = self->packet_filter; |
|---|
| 786 | + const struct aq_hw_ops *hw_ops = self->aq_hw_ops; |
|---|
| 787 | + struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; |
|---|
| 788 | + unsigned int packet_filter = ndev->flags; |
|---|
| 565 | 789 | struct netdev_hw_addr *ha = NULL; |
|---|
| 566 | 790 | unsigned int i = 0U; |
|---|
| 791 | + int err = 0; |
|---|
| 567 | 792 | |
|---|
| 568 | 793 | self->mc_list.count = 0; |
|---|
| 569 | 794 | if (netdev_uc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) { |
|---|
| .. | .. |
|---|
| 571 | 796 | } else { |
|---|
| 572 | 797 | netdev_for_each_uc_addr(ha, ndev) { |
|---|
| 573 | 798 | ether_addr_copy(self->mc_list.ar[i++], ha->addr); |
|---|
| 574 | | - |
|---|
| 575 | | - if (i >= AQ_HW_MULTICAST_ADDRESS_MAX) |
|---|
| 576 | | - break; |
|---|
| 577 | 799 | } |
|---|
| 578 | 800 | } |
|---|
| 579 | 801 | |
|---|
| 580 | | - if (i + netdev_mc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) { |
|---|
| 581 | | - packet_filter |= IFF_ALLMULTI; |
|---|
| 582 | | - } else { |
|---|
| 583 | | - netdev_for_each_mc_addr(ha, ndev) { |
|---|
| 584 | | - ether_addr_copy(self->mc_list.ar[i++], ha->addr); |
|---|
| 585 | | - |
|---|
| 586 | | - if (i >= AQ_HW_MULTICAST_ADDRESS_MAX) |
|---|
| 587 | | - break; |
|---|
| 802 | + cfg->is_mc_list_enabled = !!(packet_filter & IFF_MULTICAST); |
|---|
| 803 | + if (cfg->is_mc_list_enabled) { |
|---|
| 804 | + if (i + netdev_mc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) { |
|---|
| 805 | + packet_filter |= IFF_ALLMULTI; |
|---|
| 806 | + } else { |
|---|
| 807 | + netdev_for_each_mc_addr(ha, ndev) { |
|---|
| 808 | + ether_addr_copy(self->mc_list.ar[i++], |
|---|
| 809 | + ha->addr); |
|---|
| 810 | + } |
|---|
| 588 | 811 | } |
|---|
| 589 | 812 | } |
|---|
| 590 | 813 | |
|---|
| 591 | 814 | if (i > 0 && i <= AQ_HW_MULTICAST_ADDRESS_MAX) { |
|---|
| 592 | | - packet_filter |= IFF_MULTICAST; |
|---|
| 593 | 815 | self->mc_list.count = i; |
|---|
| 594 | | - self->aq_hw_ops->hw_multicast_list_set(self->aq_hw, |
|---|
| 595 | | - self->mc_list.ar, |
|---|
| 596 | | - self->mc_list.count); |
|---|
| 816 | + err = hw_ops->hw_multicast_list_set(self->aq_hw, |
|---|
| 817 | + self->mc_list.ar, |
|---|
| 818 | + self->mc_list.count); |
|---|
| 819 | + if (err < 0) |
|---|
| 820 | + return err; |
|---|
| 597 | 821 | } |
|---|
| 822 | + |
|---|
| 598 | 823 | return aq_nic_set_packet_filter(self, packet_filter); |
|---|
| 599 | 824 | } |
|---|
| 600 | 825 | |
|---|
| .. | .. |
|---|
| 643 | 868 | return self->aq_nic_cfg.aq_hw_caps->mac_regs_count; |
|---|
| 644 | 869 | } |
|---|
| 645 | 870 | |
|---|
| 646 | | -void aq_nic_get_stats(struct aq_nic_s *self, u64 *data) |
|---|
| 871 | +u64 *aq_nic_get_stats(struct aq_nic_s *self, u64 *data) |
|---|
| 647 | 872 | { |
|---|
| 648 | | - unsigned int i = 0U; |
|---|
| 873 | + struct aq_stats_s *stats; |
|---|
| 649 | 874 | unsigned int count = 0U; |
|---|
| 650 | | - struct aq_vec_s *aq_vec = NULL; |
|---|
| 651 | | - struct aq_stats_s *stats = self->aq_hw_ops->hw_get_hw_stats(self->aq_hw); |
|---|
| 875 | + unsigned int i = 0U; |
|---|
| 876 | + unsigned int tc; |
|---|
| 877 | + |
|---|
| 878 | + if (self->aq_fw_ops->update_stats) { |
|---|
| 879 | + mutex_lock(&self->fwreq_mutex); |
|---|
| 880 | + self->aq_fw_ops->update_stats(self->aq_hw); |
|---|
| 881 | + mutex_unlock(&self->fwreq_mutex); |
|---|
| 882 | + } |
|---|
| 883 | + stats = self->aq_hw_ops->hw_get_hw_stats(self->aq_hw); |
|---|
| 652 | 884 | |
|---|
| 653 | 885 | if (!stats) |
|---|
| 654 | 886 | goto err_exit; |
|---|
| .. | .. |
|---|
| 668 | 900 | data[++i] = stats->mbtc; |
|---|
| 669 | 901 | data[++i] = stats->bbrc; |
|---|
| 670 | 902 | data[++i] = stats->bbtc; |
|---|
| 671 | | - data[++i] = stats->ubrc + stats->mbrc + stats->bbrc; |
|---|
| 672 | | - data[++i] = stats->ubtc + stats->mbtc + stats->bbtc; |
|---|
| 903 | + if (stats->brc) |
|---|
| 904 | + data[++i] = stats->brc; |
|---|
| 905 | + else |
|---|
| 906 | + data[++i] = stats->ubrc + stats->mbrc + stats->bbrc; |
|---|
| 907 | + if (stats->btc) |
|---|
| 908 | + data[++i] = stats->btc; |
|---|
| 909 | + else |
|---|
| 910 | + data[++i] = stats->ubtc + stats->mbtc + stats->bbtc; |
|---|
| 673 | 911 | data[++i] = stats->dma_pkt_rc; |
|---|
| 674 | 912 | data[++i] = stats->dma_pkt_tc; |
|---|
| 675 | 913 | data[++i] = stats->dma_oct_rc; |
|---|
| .. | .. |
|---|
| 680 | 918 | |
|---|
| 681 | 919 | data += i; |
|---|
| 682 | 920 | |
|---|
| 683 | | - for (i = 0U, aq_vec = self->aq_vec[0]; |
|---|
| 684 | | - aq_vec && self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) { |
|---|
| 685 | | - data += count; |
|---|
| 686 | | - aq_vec_get_sw_stats(aq_vec, data, &count); |
|---|
| 921 | + for (tc = 0U; tc < self->aq_nic_cfg.tcs; tc++) { |
|---|
| 922 | + for (i = 0U; self->aq_vecs > i; ++i) { |
|---|
| 923 | + if (!self->aq_vec[i]) |
|---|
| 924 | + break; |
|---|
| 925 | + data += count; |
|---|
| 926 | + count = aq_vec_get_sw_stats(self->aq_vec[i], tc, data); |
|---|
| 927 | + } |
|---|
| 687 | 928 | } |
|---|
| 688 | 929 | |
|---|
| 689 | | -err_exit:; |
|---|
| 930 | + data += count; |
|---|
| 931 | + |
|---|
| 932 | +err_exit: |
|---|
| 933 | + return data; |
|---|
| 690 | 934 | } |
|---|
| 691 | 935 | |
|---|
| 692 | 936 | static void aq_nic_update_ndev_stats(struct aq_nic_s *self) |
|---|
| 693 | 937 | { |
|---|
| 694 | | - struct net_device *ndev = self->ndev; |
|---|
| 695 | 938 | struct aq_stats_s *stats = self->aq_hw_ops->hw_get_hw_stats(self->aq_hw); |
|---|
| 939 | + struct net_device *ndev = self->ndev; |
|---|
| 696 | 940 | |
|---|
| 697 | | - ndev->stats.rx_packets = stats->uprc + stats->mprc + stats->bprc; |
|---|
| 698 | | - ndev->stats.rx_bytes = stats->ubrc + stats->mbrc + stats->bbrc; |
|---|
| 941 | + ndev->stats.rx_packets = stats->dma_pkt_rc; |
|---|
| 942 | + ndev->stats.rx_bytes = stats->dma_oct_rc; |
|---|
| 699 | 943 | ndev->stats.rx_errors = stats->erpr; |
|---|
| 700 | | - ndev->stats.tx_packets = stats->uptc + stats->mptc + stats->bptc; |
|---|
| 701 | | - ndev->stats.tx_bytes = stats->ubtc + stats->mbtc + stats->bbtc; |
|---|
| 944 | + ndev->stats.rx_dropped = stats->dpc; |
|---|
| 945 | + ndev->stats.tx_packets = stats->dma_pkt_tc; |
|---|
| 946 | + ndev->stats.tx_bytes = stats->dma_oct_tc; |
|---|
| 702 | 947 | ndev->stats.tx_errors = stats->erpt; |
|---|
| 703 | 948 | ndev->stats.multicast = stats->mprc; |
|---|
| 704 | 949 | } |
|---|
| .. | .. |
|---|
| 706 | 951 | void aq_nic_get_link_ksettings(struct aq_nic_s *self, |
|---|
| 707 | 952 | struct ethtool_link_ksettings *cmd) |
|---|
| 708 | 953 | { |
|---|
| 954 | + u32 lp_link_speed_msk; |
|---|
| 955 | + |
|---|
| 709 | 956 | if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE) |
|---|
| 710 | 957 | cmd->base.port = PORT_FIBRE; |
|---|
| 711 | 958 | else |
|---|
| 712 | 959 | cmd->base.port = PORT_TP; |
|---|
| 713 | | - /* This driver supports only 10G capable adapters, so DUPLEX_FULL */ |
|---|
| 714 | | - cmd->base.duplex = DUPLEX_FULL; |
|---|
| 960 | + |
|---|
| 961 | + cmd->base.duplex = DUPLEX_UNKNOWN; |
|---|
| 962 | + if (self->link_status.mbps) |
|---|
| 963 | + cmd->base.duplex = self->link_status.full_duplex ? |
|---|
| 964 | + DUPLEX_FULL : DUPLEX_HALF; |
|---|
| 715 | 965 | cmd->base.autoneg = self->aq_nic_cfg.is_autoneg; |
|---|
| 716 | 966 | |
|---|
| 717 | 967 | ethtool_link_ksettings_zero_link_mode(cmd, supported); |
|---|
| .. | .. |
|---|
| 724 | 974 | ethtool_link_ksettings_add_link_mode(cmd, supported, |
|---|
| 725 | 975 | 5000baseT_Full); |
|---|
| 726 | 976 | |
|---|
| 727 | | - if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_2GS) |
|---|
| 977 | + if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_2G5) |
|---|
| 728 | 978 | ethtool_link_ksettings_add_link_mode(cmd, supported, |
|---|
| 729 | 979 | 2500baseT_Full); |
|---|
| 730 | 980 | |
|---|
| .. | .. |
|---|
| 732 | 982 | ethtool_link_ksettings_add_link_mode(cmd, supported, |
|---|
| 733 | 983 | 1000baseT_Full); |
|---|
| 734 | 984 | |
|---|
| 985 | + if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_1G_HALF) |
|---|
| 986 | + ethtool_link_ksettings_add_link_mode(cmd, supported, |
|---|
| 987 | + 1000baseT_Half); |
|---|
| 988 | + |
|---|
| 735 | 989 | if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_100M) |
|---|
| 736 | 990 | ethtool_link_ksettings_add_link_mode(cmd, supported, |
|---|
| 737 | 991 | 100baseT_Full); |
|---|
| 738 | 992 | |
|---|
| 739 | | - if (self->aq_nic_cfg.aq_hw_caps->flow_control) |
|---|
| 993 | + if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_100M_HALF) |
|---|
| 994 | + ethtool_link_ksettings_add_link_mode(cmd, supported, |
|---|
| 995 | + 100baseT_Half); |
|---|
| 996 | + |
|---|
| 997 | + if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10M) |
|---|
| 998 | + ethtool_link_ksettings_add_link_mode(cmd, supported, |
|---|
| 999 | + 10baseT_Full); |
|---|
| 1000 | + |
|---|
| 1001 | + if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10M_HALF) |
|---|
| 1002 | + ethtool_link_ksettings_add_link_mode(cmd, supported, |
|---|
| 1003 | + 10baseT_Half); |
|---|
| 1004 | + |
|---|
| 1005 | + if (self->aq_nic_cfg.aq_hw_caps->flow_control) { |
|---|
| 740 | 1006 | ethtool_link_ksettings_add_link_mode(cmd, supported, |
|---|
| 741 | 1007 | Pause); |
|---|
| 1008 | + ethtool_link_ksettings_add_link_mode(cmd, supported, |
|---|
| 1009 | + Asym_Pause); |
|---|
| 1010 | + } |
|---|
| 742 | 1011 | |
|---|
| 743 | 1012 | ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg); |
|---|
| 744 | 1013 | |
|---|
| .. | .. |
|---|
| 752 | 1021 | if (self->aq_nic_cfg.is_autoneg) |
|---|
| 753 | 1022 | ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg); |
|---|
| 754 | 1023 | |
|---|
| 755 | | - if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10G) |
|---|
| 1024 | + if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10G) |
|---|
| 756 | 1025 | ethtool_link_ksettings_add_link_mode(cmd, advertising, |
|---|
| 757 | 1026 | 10000baseT_Full); |
|---|
| 758 | 1027 | |
|---|
| 759 | | - if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_5G) |
|---|
| 1028 | + if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_5G) |
|---|
| 760 | 1029 | ethtool_link_ksettings_add_link_mode(cmd, advertising, |
|---|
| 761 | 1030 | 5000baseT_Full); |
|---|
| 762 | 1031 | |
|---|
| 763 | | - if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_2GS) |
|---|
| 1032 | + if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_2G5) |
|---|
| 764 | 1033 | ethtool_link_ksettings_add_link_mode(cmd, advertising, |
|---|
| 765 | 1034 | 2500baseT_Full); |
|---|
| 766 | 1035 | |
|---|
| 767 | | - if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_1G) |
|---|
| 1036 | + if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_1G) |
|---|
| 768 | 1037 | ethtool_link_ksettings_add_link_mode(cmd, advertising, |
|---|
| 769 | 1038 | 1000baseT_Full); |
|---|
| 770 | 1039 | |
|---|
| 771 | | - if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_100M) |
|---|
| 1040 | + if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_1G_HALF) |
|---|
| 1041 | + ethtool_link_ksettings_add_link_mode(cmd, advertising, |
|---|
| 1042 | + 1000baseT_Half); |
|---|
| 1043 | + |
|---|
| 1044 | + if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_100M) |
|---|
| 772 | 1045 | ethtool_link_ksettings_add_link_mode(cmd, advertising, |
|---|
| 773 | 1046 | 100baseT_Full); |
|---|
| 774 | 1047 | |
|---|
| 775 | | - if (self->aq_nic_cfg.flow_control & AQ_NIC_FC_RX) |
|---|
| 1048 | + if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_100M_HALF) |
|---|
| 1049 | + ethtool_link_ksettings_add_link_mode(cmd, advertising, |
|---|
| 1050 | + 100baseT_Half); |
|---|
| 1051 | + |
|---|
| 1052 | + if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10M) |
|---|
| 1053 | + ethtool_link_ksettings_add_link_mode(cmd, advertising, |
|---|
| 1054 | + 10baseT_Full); |
|---|
| 1055 | + |
|---|
| 1056 | + if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10M_HALF) |
|---|
| 1057 | + ethtool_link_ksettings_add_link_mode(cmd, advertising, |
|---|
| 1058 | + 10baseT_Half); |
|---|
| 1059 | + |
|---|
| 1060 | + if (self->aq_nic_cfg.fc.cur & AQ_NIC_FC_RX) |
|---|
| 776 | 1061 | ethtool_link_ksettings_add_link_mode(cmd, advertising, |
|---|
| 777 | 1062 | Pause); |
|---|
| 778 | 1063 | |
|---|
| 779 | | - if (self->aq_nic_cfg.flow_control & AQ_NIC_FC_TX) |
|---|
| 1064 | + /* Asym is when either RX or TX, but not both */ |
|---|
| 1065 | + if (!!(self->aq_nic_cfg.fc.cur & AQ_NIC_FC_TX) ^ |
|---|
| 1066 | + !!(self->aq_nic_cfg.fc.cur & AQ_NIC_FC_RX)) |
|---|
| 780 | 1067 | ethtool_link_ksettings_add_link_mode(cmd, advertising, |
|---|
| 781 | 1068 | Asym_Pause); |
|---|
| 782 | 1069 | |
|---|
| .. | .. |
|---|
| 784 | 1071 | ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE); |
|---|
| 785 | 1072 | else |
|---|
| 786 | 1073 | ethtool_link_ksettings_add_link_mode(cmd, advertising, TP); |
|---|
| 1074 | + |
|---|
| 1075 | + ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising); |
|---|
| 1076 | + lp_link_speed_msk = self->aq_hw->aq_link_status.lp_link_speed_msk; |
|---|
| 1077 | + |
|---|
| 1078 | + if (lp_link_speed_msk & AQ_NIC_RATE_10G) |
|---|
| 1079 | + ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, |
|---|
| 1080 | + 10000baseT_Full); |
|---|
| 1081 | + |
|---|
| 1082 | + if (lp_link_speed_msk & AQ_NIC_RATE_5G) |
|---|
| 1083 | + ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, |
|---|
| 1084 | + 5000baseT_Full); |
|---|
| 1085 | + |
|---|
| 1086 | + if (lp_link_speed_msk & AQ_NIC_RATE_2G5) |
|---|
| 1087 | + ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, |
|---|
| 1088 | + 2500baseT_Full); |
|---|
| 1089 | + |
|---|
| 1090 | + if (lp_link_speed_msk & AQ_NIC_RATE_1G) |
|---|
| 1091 | + ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, |
|---|
| 1092 | + 1000baseT_Full); |
|---|
| 1093 | + |
|---|
| 1094 | + if (lp_link_speed_msk & AQ_NIC_RATE_1G_HALF) |
|---|
| 1095 | + ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, |
|---|
| 1096 | + 1000baseT_Half); |
|---|
| 1097 | + |
|---|
| 1098 | + if (lp_link_speed_msk & AQ_NIC_RATE_100M) |
|---|
| 1099 | + ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, |
|---|
| 1100 | + 100baseT_Full); |
|---|
| 1101 | + |
|---|
| 1102 | + if (lp_link_speed_msk & AQ_NIC_RATE_100M_HALF) |
|---|
| 1103 | + ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, |
|---|
| 1104 | + 100baseT_Half); |
|---|
| 1105 | + |
|---|
| 1106 | + if (lp_link_speed_msk & AQ_NIC_RATE_10M) |
|---|
| 1107 | + ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, |
|---|
| 1108 | + 10baseT_Full); |
|---|
| 1109 | + |
|---|
| 1110 | + if (lp_link_speed_msk & AQ_NIC_RATE_10M_HALF) |
|---|
| 1111 | + ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, |
|---|
| 1112 | + 10baseT_Half); |
|---|
| 1113 | + |
|---|
| 1114 | + if (self->aq_hw->aq_link_status.lp_flow_control & AQ_NIC_FC_RX) |
|---|
| 1115 | + ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, |
|---|
| 1116 | + Pause); |
|---|
| 1117 | + if (!!(self->aq_hw->aq_link_status.lp_flow_control & AQ_NIC_FC_TX) ^ |
|---|
| 1118 | + !!(self->aq_hw->aq_link_status.lp_flow_control & AQ_NIC_FC_RX)) |
|---|
| 1119 | + ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, |
|---|
| 1120 | + Asym_Pause); |
|---|
| 787 | 1121 | } |
|---|
| 788 | 1122 | |
|---|
| 789 | 1123 | int aq_nic_set_link_ksettings(struct aq_nic_s *self, |
|---|
| 790 | 1124 | const struct ethtool_link_ksettings *cmd) |
|---|
| 791 | 1125 | { |
|---|
| 792 | | - u32 speed = 0U; |
|---|
| 1126 | + int fduplex = (cmd->base.duplex == DUPLEX_FULL); |
|---|
| 1127 | + u32 speed = cmd->base.speed; |
|---|
| 793 | 1128 | u32 rate = 0U; |
|---|
| 794 | 1129 | int err = 0; |
|---|
| 1130 | + |
|---|
| 1131 | + if (!fduplex && speed > SPEED_1000) { |
|---|
| 1132 | + err = -EINVAL; |
|---|
| 1133 | + goto err_exit; |
|---|
| 1134 | + } |
|---|
| 795 | 1135 | |
|---|
| 796 | 1136 | if (cmd->base.autoneg == AUTONEG_ENABLE) { |
|---|
| 797 | 1137 | rate = self->aq_nic_cfg.aq_hw_caps->link_speed_msk; |
|---|
| 798 | 1138 | self->aq_nic_cfg.is_autoneg = true; |
|---|
| 799 | 1139 | } else { |
|---|
| 800 | | - speed = cmd->base.speed; |
|---|
| 801 | | - |
|---|
| 802 | 1140 | switch (speed) { |
|---|
| 1141 | + case SPEED_10: |
|---|
| 1142 | + rate = fduplex ? AQ_NIC_RATE_10M : AQ_NIC_RATE_10M_HALF; |
|---|
| 1143 | + break; |
|---|
| 1144 | + |
|---|
| 803 | 1145 | case SPEED_100: |
|---|
| 804 | | - rate = AQ_NIC_RATE_100M; |
|---|
| 1146 | + rate = fduplex ? AQ_NIC_RATE_100M |
|---|
| 1147 | + : AQ_NIC_RATE_100M_HALF; |
|---|
| 805 | 1148 | break; |
|---|
| 806 | 1149 | |
|---|
| 807 | 1150 | case SPEED_1000: |
|---|
| 808 | | - rate = AQ_NIC_RATE_1G; |
|---|
| 1151 | + rate = fduplex ? AQ_NIC_RATE_1G : AQ_NIC_RATE_1G_HALF; |
|---|
| 809 | 1152 | break; |
|---|
| 810 | 1153 | |
|---|
| 811 | 1154 | case SPEED_2500: |
|---|
| 812 | | - rate = AQ_NIC_RATE_2GS; |
|---|
| 1155 | + rate = AQ_NIC_RATE_2G5; |
|---|
| 813 | 1156 | break; |
|---|
| 814 | 1157 | |
|---|
| 815 | 1158 | case SPEED_5000: |
|---|
| .. | .. |
|---|
| 823 | 1166 | default: |
|---|
| 824 | 1167 | err = -1; |
|---|
| 825 | 1168 | goto err_exit; |
|---|
| 826 | | - break; |
|---|
| 827 | 1169 | } |
|---|
| 828 | 1170 | if (!(self->aq_nic_cfg.aq_hw_caps->link_speed_msk & rate)) { |
|---|
| 829 | 1171 | err = -1; |
|---|
| .. | .. |
|---|
| 833 | 1175 | self->aq_nic_cfg.is_autoneg = false; |
|---|
| 834 | 1176 | } |
|---|
| 835 | 1177 | |
|---|
| 1178 | + mutex_lock(&self->fwreq_mutex); |
|---|
| 836 | 1179 | err = self->aq_fw_ops->set_link_speed(self->aq_hw, rate); |
|---|
| 1180 | + mutex_unlock(&self->fwreq_mutex); |
|---|
| 837 | 1181 | if (err < 0) |
|---|
| 838 | 1182 | goto err_exit; |
|---|
| 839 | 1183 | |
|---|
| .. | .. |
|---|
| 850 | 1194 | |
|---|
| 851 | 1195 | u32 aq_nic_get_fw_version(struct aq_nic_s *self) |
|---|
| 852 | 1196 | { |
|---|
| 853 | | - u32 fw_version = 0U; |
|---|
| 1197 | + return self->aq_hw_ops->hw_get_fw_version(self->aq_hw); |
|---|
| 1198 | +} |
|---|
| 854 | 1199 | |
|---|
| 855 | | - self->aq_hw_ops->hw_get_fw_version(self->aq_hw, &fw_version); |
|---|
| 1200 | +int aq_nic_set_loopback(struct aq_nic_s *self) |
|---|
| 1201 | +{ |
|---|
| 1202 | + struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; |
|---|
| 856 | 1203 | |
|---|
| 857 | | - return fw_version; |
|---|
| 1204 | + if (!self->aq_hw_ops->hw_set_loopback || |
|---|
| 1205 | + !self->aq_fw_ops->set_phyloopback) |
|---|
| 1206 | + return -EOPNOTSUPP; |
|---|
| 1207 | + |
|---|
| 1208 | + mutex_lock(&self->fwreq_mutex); |
|---|
| 1209 | + self->aq_hw_ops->hw_set_loopback(self->aq_hw, |
|---|
| 1210 | + AQ_HW_LOOPBACK_DMA_SYS, |
|---|
| 1211 | + !!(cfg->priv_flags & |
|---|
| 1212 | + BIT(AQ_HW_LOOPBACK_DMA_SYS))); |
|---|
| 1213 | + |
|---|
| 1214 | + self->aq_hw_ops->hw_set_loopback(self->aq_hw, |
|---|
| 1215 | + AQ_HW_LOOPBACK_PKT_SYS, |
|---|
| 1216 | + !!(cfg->priv_flags & |
|---|
| 1217 | + BIT(AQ_HW_LOOPBACK_PKT_SYS))); |
|---|
| 1218 | + |
|---|
| 1219 | + self->aq_hw_ops->hw_set_loopback(self->aq_hw, |
|---|
| 1220 | + AQ_HW_LOOPBACK_DMA_NET, |
|---|
| 1221 | + !!(cfg->priv_flags & |
|---|
| 1222 | + BIT(AQ_HW_LOOPBACK_DMA_NET))); |
|---|
| 1223 | + |
|---|
| 1224 | + self->aq_fw_ops->set_phyloopback(self->aq_hw, |
|---|
| 1225 | + AQ_HW_LOOPBACK_PHYINT_SYS, |
|---|
| 1226 | + !!(cfg->priv_flags & |
|---|
| 1227 | + BIT(AQ_HW_LOOPBACK_PHYINT_SYS))); |
|---|
| 1228 | + |
|---|
| 1229 | + self->aq_fw_ops->set_phyloopback(self->aq_hw, |
|---|
| 1230 | + AQ_HW_LOOPBACK_PHYEXT_SYS, |
|---|
| 1231 | + !!(cfg->priv_flags & |
|---|
| 1232 | + BIT(AQ_HW_LOOPBACK_PHYEXT_SYS))); |
|---|
| 1233 | + mutex_unlock(&self->fwreq_mutex); |
|---|
| 1234 | + |
|---|
| 1235 | + return 0; |
|---|
| 858 | 1236 | } |
|---|
| 859 | 1237 | |
|---|
| 860 | 1238 | int aq_nic_stop(struct aq_nic_s *self) |
|---|
| 861 | 1239 | { |
|---|
| 862 | | - struct aq_vec_s *aq_vec = NULL; |
|---|
| 863 | 1240 | unsigned int i = 0U; |
|---|
| 864 | 1241 | |
|---|
| 865 | 1242 | netif_tx_disable(self->ndev); |
|---|
| 866 | 1243 | netif_carrier_off(self->ndev); |
|---|
| 867 | 1244 | |
|---|
| 868 | 1245 | del_timer_sync(&self->service_timer); |
|---|
| 1246 | + cancel_work_sync(&self->service_task); |
|---|
| 869 | 1247 | |
|---|
| 870 | 1248 | self->aq_hw_ops->hw_irq_disable(self->aq_hw, AQ_CFG_IRQ_MASK); |
|---|
| 871 | 1249 | |
|---|
| .. | .. |
|---|
| 874 | 1252 | else |
|---|
| 875 | 1253 | aq_pci_func_free_irqs(self); |
|---|
| 876 | 1254 | |
|---|
| 877 | | - for (i = 0U, aq_vec = self->aq_vec[0]; |
|---|
| 878 | | - self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) |
|---|
| 879 | | - aq_vec_stop(aq_vec); |
|---|
| 1255 | + aq_ptp_irq_free(self); |
|---|
| 1256 | + |
|---|
| 1257 | + for (i = 0U; self->aq_vecs > i; ++i) |
|---|
| 1258 | + aq_vec_stop(self->aq_vec[i]); |
|---|
| 1259 | + |
|---|
| 1260 | + aq_ptp_ring_stop(self); |
|---|
| 880 | 1261 | |
|---|
| 881 | 1262 | return self->aq_hw_ops->hw_stop(self->aq_hw); |
|---|
| 882 | 1263 | } |
|---|
| 883 | 1264 | |
|---|
| 884 | | -void aq_nic_deinit(struct aq_nic_s *self) |
|---|
| 1265 | +void aq_nic_set_power(struct aq_nic_s *self) |
|---|
| 1266 | +{ |
|---|
| 1267 | + if (self->power_state != AQ_HW_POWER_STATE_D0 || |
|---|
| 1268 | + self->aq_hw->aq_nic_cfg->wol) |
|---|
| 1269 | + if (likely(self->aq_fw_ops->set_power)) { |
|---|
| 1270 | + mutex_lock(&self->fwreq_mutex); |
|---|
| 1271 | + self->aq_fw_ops->set_power(self->aq_hw, |
|---|
| 1272 | + self->power_state, |
|---|
| 1273 | + self->ndev->dev_addr); |
|---|
| 1274 | + mutex_unlock(&self->fwreq_mutex); |
|---|
| 1275 | + } |
|---|
| 1276 | +} |
|---|
| 1277 | + |
|---|
| 1278 | +void aq_nic_deinit(struct aq_nic_s *self, bool link_down) |
|---|
| 885 | 1279 | { |
|---|
| 886 | 1280 | struct aq_vec_s *aq_vec = NULL; |
|---|
| 887 | 1281 | unsigned int i = 0U; |
|---|
| .. | .. |
|---|
| 889 | 1283 | if (!self) |
|---|
| 890 | 1284 | goto err_exit; |
|---|
| 891 | 1285 | |
|---|
| 892 | | - for (i = 0U, aq_vec = self->aq_vec[0]; |
|---|
| 893 | | - self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) |
|---|
| 1286 | + for (i = 0U; i < self->aq_vecs; i++) { |
|---|
| 1287 | + aq_vec = self->aq_vec[i]; |
|---|
| 894 | 1288 | aq_vec_deinit(aq_vec); |
|---|
| 1289 | + aq_vec_ring_free(aq_vec); |
|---|
| 1290 | + } |
|---|
| 895 | 1291 | |
|---|
| 896 | | - if (self->power_state == AQ_HW_POWER_STATE_D0) { |
|---|
| 897 | | - (void)self->aq_fw_ops->deinit(self->aq_hw); |
|---|
| 898 | | - } else { |
|---|
| 899 | | - (void)self->aq_hw_ops->hw_set_power(self->aq_hw, |
|---|
| 900 | | - self->power_state); |
|---|
| 1292 | + aq_ptp_unregister(self); |
|---|
| 1293 | + aq_ptp_ring_deinit(self); |
|---|
| 1294 | + aq_ptp_ring_free(self); |
|---|
| 1295 | + aq_ptp_free(self); |
|---|
| 1296 | + |
|---|
| 1297 | + if (likely(self->aq_fw_ops->deinit) && link_down) { |
|---|
| 1298 | + mutex_lock(&self->fwreq_mutex); |
|---|
| 1299 | + self->aq_fw_ops->deinit(self->aq_hw); |
|---|
| 1300 | + mutex_unlock(&self->fwreq_mutex); |
|---|
| 901 | 1301 | } |
|---|
| 902 | 1302 | |
|---|
| 903 | 1303 | err_exit:; |
|---|
| .. | .. |
|---|
| 920 | 1320 | err_exit:; |
|---|
| 921 | 1321 | } |
|---|
| 922 | 1322 | |
|---|
| 923 | | -int aq_nic_change_pm_state(struct aq_nic_s *self, pm_message_t *pm_msg) |
|---|
| 1323 | +int aq_nic_realloc_vectors(struct aq_nic_s *self) |
|---|
| 924 | 1324 | { |
|---|
| 925 | | - int err = 0; |
|---|
| 1325 | + struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self); |
|---|
| 926 | 1326 | |
|---|
| 927 | | - if (!netif_running(self->ndev)) { |
|---|
| 928 | | - err = 0; |
|---|
| 929 | | - goto out; |
|---|
| 930 | | - } |
|---|
| 931 | | - rtnl_lock(); |
|---|
| 932 | | - if (pm_msg->event & PM_EVENT_SLEEP || pm_msg->event & PM_EVENT_FREEZE) { |
|---|
| 933 | | - self->power_state = AQ_HW_POWER_STATE_D3; |
|---|
| 934 | | - netif_device_detach(self->ndev); |
|---|
| 935 | | - netif_tx_stop_all_queues(self->ndev); |
|---|
| 1327 | + aq_nic_free_vectors(self); |
|---|
| 936 | 1328 | |
|---|
| 937 | | - err = aq_nic_stop(self); |
|---|
| 938 | | - if (err < 0) |
|---|
| 939 | | - goto err_exit; |
|---|
| 940 | | - |
|---|
| 941 | | - aq_nic_deinit(self); |
|---|
| 942 | | - } else { |
|---|
| 943 | | - err = aq_nic_init(self); |
|---|
| 944 | | - if (err < 0) |
|---|
| 945 | | - goto err_exit; |
|---|
| 946 | | - |
|---|
| 947 | | - err = aq_nic_start(self); |
|---|
| 948 | | - if (err < 0) |
|---|
| 949 | | - goto err_exit; |
|---|
| 950 | | - |
|---|
| 951 | | - netif_device_attach(self->ndev); |
|---|
| 952 | | - netif_tx_start_all_queues(self->ndev); |
|---|
| 1329 | + for (self->aq_vecs = 0; self->aq_vecs < cfg->vecs; self->aq_vecs++) { |
|---|
| 1330 | + self->aq_vec[self->aq_vecs] = aq_vec_alloc(self, self->aq_vecs, |
|---|
| 1331 | + cfg); |
|---|
| 1332 | + if (unlikely(!self->aq_vec[self->aq_vecs])) |
|---|
| 1333 | + return -ENOMEM; |
|---|
| 953 | 1334 | } |
|---|
| 954 | 1335 | |
|---|
| 955 | | -err_exit: |
|---|
| 956 | | - rtnl_unlock(); |
|---|
| 957 | | -out: |
|---|
| 958 | | - return err; |
|---|
| 1336 | + return 0; |
|---|
| 959 | 1337 | } |
|---|
| 960 | 1338 | |
|---|
| 961 | 1339 | void aq_nic_shutdown(struct aq_nic_s *self) |
|---|
| .. | .. |
|---|
| 974 | 1352 | if (err < 0) |
|---|
| 975 | 1353 | goto err_exit; |
|---|
| 976 | 1354 | } |
|---|
| 977 | | - aq_nic_deinit(self); |
|---|
| 1355 | + aq_nic_deinit(self, !self->aq_hw->aq_nic_cfg->wol); |
|---|
| 1356 | + aq_nic_set_power(self); |
|---|
| 978 | 1357 | |
|---|
| 979 | 1358 | err_exit: |
|---|
| 980 | 1359 | rtnl_unlock(); |
|---|
| 981 | | -} |
|---|
| 1360 | +} |
|---|
| 1361 | + |
|---|
| 1362 | +u8 aq_nic_reserve_filter(struct aq_nic_s *self, enum aq_rx_filter_type type) |
|---|
| 1363 | +{ |
|---|
| 1364 | + u8 location = 0xFF; |
|---|
| 1365 | + u32 fltr_cnt; |
|---|
| 1366 | + u32 n_bit; |
|---|
| 1367 | + |
|---|
| 1368 | + switch (type) { |
|---|
| 1369 | + case aq_rx_filter_ethertype: |
|---|
| 1370 | + location = AQ_RX_LAST_LOC_FETHERT - AQ_RX_FIRST_LOC_FETHERT - |
|---|
| 1371 | + self->aq_hw_rx_fltrs.fet_reserved_count; |
|---|
| 1372 | + self->aq_hw_rx_fltrs.fet_reserved_count++; |
|---|
| 1373 | + break; |
|---|
| 1374 | + case aq_rx_filter_l3l4: |
|---|
| 1375 | + fltr_cnt = AQ_RX_LAST_LOC_FL3L4 - AQ_RX_FIRST_LOC_FL3L4; |
|---|
| 1376 | + n_bit = fltr_cnt - self->aq_hw_rx_fltrs.fl3l4.reserved_count; |
|---|
| 1377 | + |
|---|
| 1378 | + self->aq_hw_rx_fltrs.fl3l4.active_ipv4 |= BIT(n_bit); |
|---|
| 1379 | + self->aq_hw_rx_fltrs.fl3l4.reserved_count++; |
|---|
| 1380 | + location = n_bit; |
|---|
| 1381 | + break; |
|---|
| 1382 | + default: |
|---|
| 1383 | + break; |
|---|
| 1384 | + } |
|---|
| 1385 | + |
|---|
| 1386 | + return location; |
|---|
| 1387 | +} |
|---|
| 1388 | + |
|---|
| 1389 | +void aq_nic_release_filter(struct aq_nic_s *self, enum aq_rx_filter_type type, |
|---|
| 1390 | + u32 location) |
|---|
| 1391 | +{ |
|---|
| 1392 | + switch (type) { |
|---|
| 1393 | + case aq_rx_filter_ethertype: |
|---|
| 1394 | + self->aq_hw_rx_fltrs.fet_reserved_count--; |
|---|
| 1395 | + break; |
|---|
| 1396 | + case aq_rx_filter_l3l4: |
|---|
| 1397 | + self->aq_hw_rx_fltrs.fl3l4.reserved_count--; |
|---|
| 1398 | + self->aq_hw_rx_fltrs.fl3l4.active_ipv4 &= ~BIT(location); |
|---|
| 1399 | + break; |
|---|
| 1400 | + default: |
|---|
| 1401 | + break; |
|---|
| 1402 | + } |
|---|
| 1403 | +} |
|---|
| 1404 | + |
|---|
| 1405 | +int aq_nic_set_downshift(struct aq_nic_s *self, int val) |
|---|
| 1406 | +{ |
|---|
| 1407 | + int err = 0; |
|---|
| 1408 | + struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; |
|---|
| 1409 | + |
|---|
| 1410 | + if (!self->aq_fw_ops->set_downshift) |
|---|
| 1411 | + return -EOPNOTSUPP; |
|---|
| 1412 | + |
|---|
| 1413 | + if (val > 15) { |
|---|
| 1414 | + netdev_err(self->ndev, "downshift counter should be <= 15\n"); |
|---|
| 1415 | + return -EINVAL; |
|---|
| 1416 | + } |
|---|
| 1417 | + cfg->downshift_counter = val; |
|---|
| 1418 | + |
|---|
| 1419 | + mutex_lock(&self->fwreq_mutex); |
|---|
| 1420 | + err = self->aq_fw_ops->set_downshift(self->aq_hw, cfg->downshift_counter); |
|---|
| 1421 | + mutex_unlock(&self->fwreq_mutex); |
|---|
| 1422 | + |
|---|
| 1423 | + return err; |
|---|
| 1424 | +} |
|---|
| 1425 | + |
|---|
| 1426 | +int aq_nic_set_media_detect(struct aq_nic_s *self, int val) |
|---|
| 1427 | +{ |
|---|
| 1428 | + struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; |
|---|
| 1429 | + int err = 0; |
|---|
| 1430 | + |
|---|
| 1431 | + if (!self->aq_fw_ops->set_media_detect) |
|---|
| 1432 | + return -EOPNOTSUPP; |
|---|
| 1433 | + |
|---|
| 1434 | + if (val > 0 && val != AQ_HW_MEDIA_DETECT_CNT) { |
|---|
| 1435 | + netdev_err(self->ndev, "EDPD on this device could have only fixed value of %d\n", |
|---|
| 1436 | + AQ_HW_MEDIA_DETECT_CNT); |
|---|
| 1437 | + return -EINVAL; |
|---|
| 1438 | + } |
|---|
| 1439 | + |
|---|
| 1440 | + mutex_lock(&self->fwreq_mutex); |
|---|
| 1441 | + err = self->aq_fw_ops->set_media_detect(self->aq_hw, !!val); |
|---|
| 1442 | + mutex_unlock(&self->fwreq_mutex); |
|---|
| 1443 | + |
|---|
| 1444 | + /* msecs plays no role - configuration is always fixed in PHY */ |
|---|
| 1445 | + if (!err) |
|---|
| 1446 | + cfg->is_media_detect = !!val; |
|---|
| 1447 | + |
|---|
| 1448 | + return err; |
|---|
| 1449 | +} |
|---|
| 1450 | + |
|---|
| 1451 | +int aq_nic_setup_tc_mqprio(struct aq_nic_s *self, u32 tcs, u8 *prio_tc_map) |
|---|
| 1452 | +{ |
|---|
| 1453 | + struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; |
|---|
| 1454 | + const unsigned int prev_vecs = cfg->vecs; |
|---|
| 1455 | + bool ndev_running; |
|---|
| 1456 | + int err = 0; |
|---|
| 1457 | + int i; |
|---|
| 1458 | + |
|---|
| 1459 | + /* if already the same configuration or |
|---|
| 1460 | + * disable request (tcs is 0) and we already is disabled |
|---|
| 1461 | + */ |
|---|
| 1462 | + if (tcs == cfg->tcs || (tcs == 0 && !cfg->is_qos)) |
|---|
| 1463 | + return 0; |
|---|
| 1464 | + |
|---|
| 1465 | + ndev_running = netif_running(self->ndev); |
|---|
| 1466 | + if (ndev_running) |
|---|
| 1467 | + dev_close(self->ndev); |
|---|
| 1468 | + |
|---|
| 1469 | + cfg->tcs = tcs; |
|---|
| 1470 | + if (cfg->tcs == 0) |
|---|
| 1471 | + cfg->tcs = 1; |
|---|
| 1472 | + if (prio_tc_map) |
|---|
| 1473 | + memcpy(cfg->prio_tc_map, prio_tc_map, sizeof(cfg->prio_tc_map)); |
|---|
| 1474 | + else |
|---|
| 1475 | + for (i = 0; i < sizeof(cfg->prio_tc_map); i++) |
|---|
| 1476 | + cfg->prio_tc_map[i] = cfg->tcs * i / 8; |
|---|
| 1477 | + |
|---|
| 1478 | + cfg->is_qos = (tcs != 0 ? true : false); |
|---|
| 1479 | + cfg->is_ptp = (cfg->tcs <= AQ_HW_PTP_TC); |
|---|
| 1480 | + if (!cfg->is_ptp) |
|---|
| 1481 | + netdev_warn(self->ndev, "%s\n", |
|---|
| 1482 | + "PTP is auto disabled due to requested TC count."); |
|---|
| 1483 | + |
|---|
| 1484 | + netdev_set_num_tc(self->ndev, cfg->tcs); |
|---|
| 1485 | + |
|---|
| 1486 | + /* Changing the number of TCs might change the number of vectors */ |
|---|
| 1487 | + aq_nic_cfg_update_num_vecs(self); |
|---|
| 1488 | + if (prev_vecs != cfg->vecs) { |
|---|
| 1489 | + err = aq_nic_realloc_vectors(self); |
|---|
| 1490 | + if (err) |
|---|
| 1491 | + goto err_exit; |
|---|
| 1492 | + } |
|---|
| 1493 | + |
|---|
| 1494 | + if (ndev_running) |
|---|
| 1495 | + err = dev_open(self->ndev, NULL); |
|---|
| 1496 | + |
|---|
| 1497 | +err_exit: |
|---|
| 1498 | + return err; |
|---|
| 1499 | +} |
|---|
| 1500 | + |
|---|
| 1501 | +int aq_nic_setup_tc_max_rate(struct aq_nic_s *self, const unsigned int tc, |
|---|
| 1502 | + const u32 max_rate) |
|---|
| 1503 | +{ |
|---|
| 1504 | + struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; |
|---|
| 1505 | + |
|---|
| 1506 | + if (tc >= AQ_CFG_TCS_MAX) |
|---|
| 1507 | + return -EINVAL; |
|---|
| 1508 | + |
|---|
| 1509 | + if (max_rate && max_rate < 10) { |
|---|
| 1510 | + netdev_warn(self->ndev, |
|---|
| 1511 | + "Setting %s to the minimum usable value of %dMbps.\n", |
|---|
| 1512 | + "max rate", 10); |
|---|
| 1513 | + cfg->tc_max_rate[tc] = 10; |
|---|
| 1514 | + } else { |
|---|
| 1515 | + cfg->tc_max_rate[tc] = max_rate; |
|---|
| 1516 | + } |
|---|
| 1517 | + |
|---|
| 1518 | + return 0; |
|---|
| 1519 | +} |
|---|
| 1520 | + |
|---|
| 1521 | +int aq_nic_setup_tc_min_rate(struct aq_nic_s *self, const unsigned int tc, |
|---|
| 1522 | + const u32 min_rate) |
|---|
| 1523 | +{ |
|---|
| 1524 | + struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; |
|---|
| 1525 | + |
|---|
| 1526 | + if (tc >= AQ_CFG_TCS_MAX) |
|---|
| 1527 | + return -EINVAL; |
|---|
| 1528 | + |
|---|
| 1529 | + if (min_rate) |
|---|
| 1530 | + set_bit(tc, &cfg->tc_min_rate_msk); |
|---|
| 1531 | + else |
|---|
| 1532 | + clear_bit(tc, &cfg->tc_min_rate_msk); |
|---|
| 1533 | + |
|---|
| 1534 | + if (min_rate && min_rate < 20) { |
|---|
| 1535 | + netdev_warn(self->ndev, |
|---|
| 1536 | + "Setting %s to the minimum usable value of %dMbps.\n", |
|---|
| 1537 | + "min rate", 20); |
|---|
| 1538 | + cfg->tc_min_rate[tc] = 20; |
|---|
| 1539 | + } else { |
|---|
| 1540 | + cfg->tc_min_rate[tc] = min_rate; |
|---|
| 1541 | + } |
|---|
| 1542 | + |
|---|
| 1543 | + return 0; |
|---|
| 1544 | +} |
|---|