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| 1 | +/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ |
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| 1 | 2 | /* |
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| 2 | | - * Copyright 2015 Amazon.com, Inc. or its affiliates. |
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| 3 | | - * |
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| 4 | | - * This software is available to you under a choice of one of two |
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| 5 | | - * licenses. You may choose to be licensed under the terms of the GNU |
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| 6 | | - * General Public License (GPL) Version 2, available from the file |
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| 7 | | - * COPYING in the main directory of this source tree, or the |
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| 8 | | - * BSD license below: |
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| 9 | | - * |
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| 10 | | - * Redistribution and use in source and binary forms, with or |
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| 11 | | - * without modification, are permitted provided that the following |
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| 12 | | - * conditions are met: |
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| 13 | | - * |
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| 14 | | - * - Redistributions of source code must retain the above |
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| 15 | | - * copyright notice, this list of conditions and the following |
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| 16 | | - * disclaimer. |
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| 17 | | - * |
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| 18 | | - * - Redistributions in binary form must reproduce the above |
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| 19 | | - * copyright notice, this list of conditions and the following |
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| 20 | | - * disclaimer in the documentation and/or other materials |
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| 21 | | - * provided with the distribution. |
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| 22 | | - * |
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| 23 | | - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
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| 24 | | - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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| 25 | | - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
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| 26 | | - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
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| 27 | | - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
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| 28 | | - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
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| 29 | | - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
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| 30 | | - * SOFTWARE. |
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| 3 | + * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved. |
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| 31 | 4 | */ |
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| 32 | 5 | |
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| 33 | 6 | #ifndef ENA_COM |
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| .. | .. |
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| 37 | 10 | #include <linux/delay.h> |
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| 38 | 11 | #include <linux/dma-mapping.h> |
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| 39 | 12 | #include <linux/gfp.h> |
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| 13 | +#include <linux/io.h> |
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| 14 | +#include <linux/prefetch.h> |
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| 40 | 15 | #include <linux/sched.h> |
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| 41 | 16 | #include <linux/sizes.h> |
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| 42 | 17 | #include <linux/spinlock.h> |
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| .. | .. |
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| 52 | 27 | #undef pr_fmt |
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| 53 | 28 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
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| 54 | 29 | |
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| 55 | | -#define ENA_MAX_NUM_IO_QUEUES 128U |
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| 30 | +#define ENA_MAX_NUM_IO_QUEUES 128U |
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| 56 | 31 | /* We need to queues for each IO (on for Tx and one for Rx) */ |
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| 57 | | -#define ENA_TOTAL_NUM_QUEUES (2 * (ENA_MAX_NUM_IO_QUEUES)) |
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| 32 | +#define ENA_TOTAL_NUM_QUEUES (2 * (ENA_MAX_NUM_IO_QUEUES)) |
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| 58 | 33 | |
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| 59 | 34 | #define ENA_MAX_HANDLERS 256 |
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| 60 | 35 | |
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| .. | .. |
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| 71 | 46 | /*****************************************************************************/ |
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| 72 | 47 | /* ENA adaptive interrupt moderation settings */ |
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| 73 | 48 | |
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| 74 | | -#define ENA_INTR_LOWEST_USECS (0) |
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| 75 | | -#define ENA_INTR_LOWEST_PKTS (3) |
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| 76 | | -#define ENA_INTR_LOWEST_BYTES (2 * 1524) |
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| 49 | +#define ENA_INTR_INITIAL_TX_INTERVAL_USECS 64 |
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| 50 | +#define ENA_INTR_INITIAL_RX_INTERVAL_USECS 0 |
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| 51 | +#define ENA_DEFAULT_INTR_DELAY_RESOLUTION 1 |
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| 77 | 52 | |
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| 78 | | -#define ENA_INTR_LOW_USECS (32) |
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| 79 | | -#define ENA_INTR_LOW_PKTS (12) |
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| 80 | | -#define ENA_INTR_LOW_BYTES (16 * 1024) |
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| 53 | +#define ENA_HASH_KEY_SIZE 40 |
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| 81 | 54 | |
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| 82 | | -#define ENA_INTR_MID_USECS (80) |
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| 83 | | -#define ENA_INTR_MID_PKTS (48) |
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| 84 | | -#define ENA_INTR_MID_BYTES (64 * 1024) |
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| 55 | +#define ENA_HW_HINTS_NO_TIMEOUT 0xFFFF |
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| 85 | 56 | |
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| 86 | | -#define ENA_INTR_HIGH_USECS (128) |
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| 87 | | -#define ENA_INTR_HIGH_PKTS (96) |
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| 88 | | -#define ENA_INTR_HIGH_BYTES (128 * 1024) |
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| 57 | +#define ENA_FEATURE_MAX_QUEUE_EXT_VER 1 |
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| 89 | 58 | |
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| 90 | | -#define ENA_INTR_HIGHEST_USECS (192) |
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| 91 | | -#define ENA_INTR_HIGHEST_PKTS (128) |
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| 92 | | -#define ENA_INTR_HIGHEST_BYTES (192 * 1024) |
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| 93 | | - |
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| 94 | | -#define ENA_INTR_INITIAL_TX_INTERVAL_USECS 196 |
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| 95 | | -#define ENA_INTR_INITIAL_RX_INTERVAL_USECS 4 |
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| 96 | | -#define ENA_INTR_DELAY_OLD_VALUE_WEIGHT 6 |
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| 97 | | -#define ENA_INTR_DELAY_NEW_VALUE_WEIGHT 4 |
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| 98 | | -#define ENA_INTR_MODER_LEVEL_STRIDE 2 |
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| 99 | | -#define ENA_INTR_BYTE_COUNT_NOT_SUPPORTED 0xFFFFFF |
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| 100 | | - |
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| 101 | | -#define ENA_HW_HINTS_NO_TIMEOUT 0xFFFF |
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| 102 | | - |
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| 103 | | -enum ena_intr_moder_level { |
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| 104 | | - ENA_INTR_MODER_LOWEST = 0, |
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| 105 | | - ENA_INTR_MODER_LOW, |
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| 106 | | - ENA_INTR_MODER_MID, |
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| 107 | | - ENA_INTR_MODER_HIGH, |
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| 108 | | - ENA_INTR_MODER_HIGHEST, |
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| 109 | | - ENA_INTR_MAX_NUM_OF_LEVELS, |
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| 110 | | -}; |
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| 111 | | - |
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| 112 | | -struct ena_intr_moder_entry { |
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| 113 | | - unsigned int intr_moder_interval; |
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| 114 | | - unsigned int pkts_per_interval; |
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| 115 | | - unsigned int bytes_per_interval; |
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| 59 | +struct ena_llq_configurations { |
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| 60 | + enum ena_admin_llq_header_location llq_header_location; |
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| 61 | + enum ena_admin_llq_ring_entry_size llq_ring_entry_size; |
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| 62 | + enum ena_admin_llq_stride_ctrl llq_stride_ctrl; |
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| 63 | + enum ena_admin_llq_num_descs_before_header llq_num_decs_before_header; |
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| 64 | + u16 llq_ring_entry_size_value; |
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| 116 | 65 | }; |
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| 117 | 66 | |
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| 118 | 67 | enum queue_direction { |
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| .. | .. |
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| 141 | 90 | u16 l3_hdr_len; |
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| 142 | 91 | u16 l3_hdr_offset; |
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| 143 | 92 | u16 l4_hdr_len; /* In words */ |
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| 93 | +}; |
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| 94 | + |
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| 95 | +struct ena_com_llq_info { |
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| 96 | + u16 header_location_ctrl; |
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| 97 | + u16 desc_stride_ctrl; |
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| 98 | + u16 desc_list_entry_size_ctrl; |
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| 99 | + u16 desc_list_entry_size; |
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| 100 | + u16 descs_num_before_header; |
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| 101 | + u16 descs_per_entry; |
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| 102 | + u16 max_entries_in_tx_burst; |
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| 103 | + bool disable_meta_caching; |
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| 144 | 104 | }; |
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| 145 | 105 | |
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| 146 | 106 | struct ena_com_io_cq { |
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| .. | .. |
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| 180 | 140 | |
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| 181 | 141 | } ____cacheline_aligned; |
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| 182 | 142 | |
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| 143 | +struct ena_com_io_bounce_buffer_control { |
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| 144 | + u8 *base_buffer; |
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| 145 | + u16 next_to_use; |
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| 146 | + u16 buffer_size; |
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| 147 | + u16 buffers_num; /* Must be a power of 2 */ |
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| 148 | +}; |
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| 149 | + |
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| 150 | +/* This struct is to keep tracking the current location of the next llq entry */ |
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| 151 | +struct ena_com_llq_pkt_ctrl { |
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| 152 | + u8 *curr_bounce_buf; |
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| 153 | + u16 idx; |
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| 154 | + u16 descs_left_in_line; |
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| 155 | +}; |
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| 156 | + |
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| 183 | 157 | struct ena_com_io_sq { |
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| 184 | 158 | struct ena_com_io_desc_addr desc_addr; |
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| 185 | 159 | |
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| .. | .. |
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| 189 | 163 | enum queue_direction direction; |
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| 190 | 164 | enum ena_admin_placement_policy_type mem_queue_type; |
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| 191 | 165 | |
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| 166 | + bool disable_meta_caching; |
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| 167 | + |
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| 192 | 168 | u32 msix_vector; |
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| 193 | 169 | struct ena_com_tx_meta cached_tx_meta; |
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| 170 | + struct ena_com_llq_info llq_info; |
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| 171 | + struct ena_com_llq_pkt_ctrl llq_buf_ctrl; |
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| 172 | + struct ena_com_io_bounce_buffer_control bounce_buf_ctrl; |
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| 194 | 173 | |
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| 195 | 174 | u16 q_depth; |
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| 196 | 175 | u16 qid; |
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| .. | .. |
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| 198 | 177 | u16 idx; |
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| 199 | 178 | u16 tail; |
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| 200 | 179 | u16 next_to_comp; |
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| 180 | + u16 llq_last_copy_tail; |
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| 201 | 181 | u32 tx_max_header_size; |
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| 202 | 182 | u8 phase; |
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| 203 | 183 | u8 desc_entry_size; |
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| 204 | 184 | u8 dma_addr_bits; |
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| 185 | + u16 entries_in_tx_burst_left; |
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| 205 | 186 | } ____cacheline_aligned; |
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| 206 | 187 | |
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| 207 | 188 | struct ena_com_admin_cq { |
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| .. | .. |
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| 225 | 206 | }; |
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| 226 | 207 | |
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| 227 | 208 | struct ena_com_stats_admin { |
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| 228 | | - u32 aborted_cmd; |
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| 229 | | - u32 submitted_cmd; |
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| 230 | | - u32 completed_cmd; |
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| 231 | | - u32 out_of_space; |
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| 232 | | - u32 no_completion; |
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| 209 | + u64 aborted_cmd; |
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| 210 | + u64 submitted_cmd; |
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| 211 | + u64 completed_cmd; |
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| 212 | + u64 out_of_space; |
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| 213 | + u64 no_completion; |
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| 233 | 214 | }; |
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| 234 | 215 | |
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| 235 | 216 | struct ena_com_admin_queue { |
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| 236 | 217 | void *q_dmadev; |
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| 218 | + struct ena_com_dev *ena_dev; |
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| 237 | 219 | spinlock_t q_lock; /* spinlock for the admin queue */ |
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| 238 | 220 | |
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| 239 | 221 | struct ena_comp_ctx *comp_ctx; |
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| .. | .. |
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| 244 | 226 | |
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| 245 | 227 | /* Indicate if the admin queue should poll for completion */ |
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| 246 | 228 | bool polling; |
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| 229 | + |
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| 230 | + /* Define if fallback to polling mode should occur */ |
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| 231 | + bool auto_polling; |
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| 247 | 232 | |
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| 248 | 233 | u16 curr_cmd_id; |
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| 249 | 234 | |
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| .. | .. |
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| 333 | 318 | struct ena_host_attribute host_attr; |
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| 334 | 319 | bool adaptive_coalescing; |
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| 335 | 320 | u16 intr_delay_resolution; |
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| 321 | + |
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| 322 | + /* interrupt moderation intervals are in usec divided by |
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| 323 | + * intr_delay_resolution, which is supplied by the device. |
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| 324 | + */ |
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| 336 | 325 | u32 intr_moder_tx_interval; |
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| 326 | + u32 intr_moder_rx_interval; |
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| 327 | + |
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| 337 | 328 | struct ena_intr_moder_entry *intr_moder_tbl; |
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| 329 | + |
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| 330 | + struct ena_com_llq_info llq_info; |
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| 331 | + |
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| 332 | + u32 ena_min_poll_delay_us; |
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| 338 | 333 | }; |
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| 339 | 334 | |
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| 340 | 335 | struct ena_com_dev_get_features_ctx { |
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| 341 | 336 | struct ena_admin_queue_feature_desc max_queues; |
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| 337 | + struct ena_admin_queue_ext_feature_desc max_queue_ext; |
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| 342 | 338 | struct ena_admin_device_attr_feature_desc dev_attr; |
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| 343 | 339 | struct ena_admin_feature_aenq_desc aenq; |
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| 344 | 340 | struct ena_admin_feature_offload_desc offload; |
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| 345 | 341 | struct ena_admin_ena_hw_hints hw_hints; |
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| 342 | + struct ena_admin_feature_llq_desc llq; |
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| 346 | 343 | }; |
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| 347 | 344 | |
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| 348 | 345 | struct ena_com_create_io_ctx { |
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| .. | .. |
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| 377 | 374 | */ |
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| 378 | 375 | int ena_com_mmio_reg_read_request_init(struct ena_com_dev *ena_dev); |
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| 379 | 376 | |
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| 380 | | -/* ena_com_set_mmio_read_mode - Enable/disable the mmio reg read mechanism |
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| 377 | +/* ena_com_set_mmio_read_mode - Enable/disable the indirect mmio reg read mechanism |
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| 381 | 378 | * @ena_dev: ENA communication layer struct |
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| 382 | 379 | * @readless_supported: readless mode (enable/disable) |
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| 383 | 380 | */ |
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| .. | .. |
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| 398 | 395 | /* ena_com_admin_init - Init the admin and the async queues |
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| 399 | 396 | * @ena_dev: ENA communication layer struct |
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| 400 | 397 | * @aenq_handlers: Those handlers to be called upon event. |
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| 401 | | - * @init_spinlock: Indicate if this method should init the admin spinlock or |
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| 402 | | - * the spinlock was init before (for example, in a case of FLR). |
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| 403 | 398 | * |
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| 404 | 399 | * Initialize the admin submission and completion queues. |
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| 405 | 400 | * Initialize the asynchronous events notification queues. |
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| .. | .. |
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| 407 | 402 | * @return - 0 on success, negative value on failure. |
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| 408 | 403 | */ |
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| 409 | 404 | int ena_com_admin_init(struct ena_com_dev *ena_dev, |
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| 410 | | - struct ena_aenq_handlers *aenq_handlers, |
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| 411 | | - bool init_spinlock); |
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| 405 | + struct ena_aenq_handlers *aenq_handlers); |
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| 412 | 406 | |
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| 413 | 407 | /* ena_com_admin_destroy - Destroy the admin and the async events queues. |
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| 414 | 408 | * @ena_dev: ENA communication layer struct |
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| .. | .. |
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| 488 | 482 | */ |
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| 489 | 483 | void ena_com_set_admin_polling_mode(struct ena_com_dev *ena_dev, bool polling); |
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| 490 | 484 | |
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| 491 | | -/* ena_com_set_admin_polling_mode - Get the admin completion queue polling mode |
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| 485 | +/* ena_com_set_admin_auto_polling_mode - Enable autoswitch to polling mode |
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| 492 | 486 | * @ena_dev: ENA communication layer struct |
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| 487 | + * @polling: Enable/Disable polling mode |
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| 493 | 488 | * |
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| 494 | | - * Get the admin completion mode. |
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| 495 | | - * If polling mode is on, ena_com_execute_admin_command will perform a |
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| 496 | | - * polling on the admin completion queue for the commands completion, |
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| 497 | | - * otherwise it will wait on wait event. |
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| 498 | | - * |
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| 499 | | - * @return state |
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| 489 | + * Set the autopolling mode. |
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| 490 | + * If autopolling is on: |
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| 491 | + * In case of missing interrupt when data is available switch to polling. |
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| 500 | 492 | */ |
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| 501 | | -bool ena_com_get_ena_admin_polling_mode(struct ena_com_dev *ena_dev); |
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| 493 | +void ena_com_set_admin_auto_polling_mode(struct ena_com_dev *ena_dev, |
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| 494 | + bool polling); |
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| 502 | 495 | |
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| 503 | 496 | /* ena_com_admin_q_comp_intr_handler - admin queue interrupt handler |
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| 504 | 497 | * @ena_dev: ENA communication layer struct |
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| 505 | 498 | * |
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| 506 | | - * This method go over the admin completion queue and wake up all the pending |
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| 499 | + * This method goes over the admin completion queue and wakes up all the pending |
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| 507 | 500 | * threads that wait on the commands wait event. |
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| 508 | 501 | * |
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| 509 | 502 | * @note: Should be called after MSI-X interrupt. |
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| .. | .. |
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| 513 | 506 | /* ena_com_aenq_intr_handler - AENQ interrupt handler |
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| 514 | 507 | * @ena_dev: ENA communication layer struct |
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| 515 | 508 | * |
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| 516 | | - * This method go over the async event notification queue and call the proper |
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| 509 | + * This method goes over the async event notification queue and calls the proper |
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| 517 | 510 | * aenq handler. |
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| 518 | 511 | */ |
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| 519 | | -void ena_com_aenq_intr_handler(struct ena_com_dev *dev, void *data); |
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| 512 | +void ena_com_aenq_intr_handler(struct ena_com_dev *ena_dev, void *data); |
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| 520 | 513 | |
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| 521 | 514 | /* ena_com_abort_admin_commands - Abort all the outstanding admin commands. |
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| 522 | 515 | * @ena_dev: ENA communication layer struct |
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| .. | .. |
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| 530 | 523 | /* ena_com_wait_for_abort_completion - Wait for admin commands abort. |
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| 531 | 524 | * @ena_dev: ENA communication layer struct |
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| 532 | 525 | * |
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| 533 | | - * This method wait until all the outstanding admin commands will be completed. |
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| 526 | + * This method waits until all the outstanding admin commands are completed. |
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| 534 | 527 | */ |
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| 535 | 528 | void ena_com_wait_for_abort_completion(struct ena_com_dev *ena_dev); |
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| 536 | 529 | |
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| 537 | 530 | /* ena_com_validate_version - Validate the device parameters |
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| 538 | 531 | * @ena_dev: ENA communication layer struct |
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| 539 | 532 | * |
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| 540 | | - * This method validate the device parameters are the same as the saved |
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| 533 | + * This method verifies the device parameters are the same as the saved |
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| 541 | 534 | * parameters in ena_dev. |
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| 542 | 535 | * This method is useful after device reset, to validate the device mac address |
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| 543 | 536 | * and the device offloads are the same as before the reset. |
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| .. | .. |
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| 595 | 588 | */ |
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| 596 | 589 | int ena_com_get_dev_basic_stats(struct ena_com_dev *ena_dev, |
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| 597 | 590 | struct ena_admin_basic_stats *stats); |
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| 591 | + |
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| 592 | +/* ena_com_get_eni_stats - Get extended network interface statistics |
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| 593 | + * @ena_dev: ENA communication layer struct |
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| 594 | + * @stats: stats return value |
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| 595 | + * |
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| 596 | + * @return: 0 on Success and negative value otherwise. |
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| 597 | + */ |
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| 598 | +int ena_com_get_eni_stats(struct ena_com_dev *ena_dev, |
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| 599 | + struct ena_admin_eni_stats *stats); |
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| 598 | 600 | |
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| 599 | 601 | /* ena_com_set_dev_mtu - Configure the device mtu. |
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| 600 | 602 | * @ena_dev: ENA communication layer struct |
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| .. | .. |
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| 671 | 673 | */ |
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| 672 | 674 | int ena_com_set_hash_function(struct ena_com_dev *ena_dev); |
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| 673 | 675 | |
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| 674 | | -/* ena_com_get_hash_function - Retrieve the hash function and the hash key |
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| 675 | | - * from the device. |
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| 676 | +/* ena_com_get_hash_function - Retrieve the hash function from the device. |
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| 676 | 677 | * @ena_dev: ENA communication layer struct |
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| 677 | 678 | * @func: hash function |
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| 678 | | - * @key: hash key |
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| 679 | 679 | * |
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| 680 | | - * Retrieve the hash function and the hash key from the device. |
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| 680 | + * Retrieve the hash function from the device. |
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| 681 | 681 | * |
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| 682 | | - * @note: If the caller called ena_com_fill_hash_function but didn't flash |
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| 682 | + * @note: If the caller called ena_com_fill_hash_function but didn't flush |
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| 683 | 683 | * it to the device, the new configuration will be lost. |
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| 684 | 684 | * |
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| 685 | 685 | * @return: 0 on Success and negative value otherwise. |
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| 686 | 686 | */ |
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| 687 | 687 | int ena_com_get_hash_function(struct ena_com_dev *ena_dev, |
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| 688 | | - enum ena_admin_hash_functions *func, |
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| 689 | | - u8 *key); |
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| 688 | + enum ena_admin_hash_functions *func); |
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| 690 | 689 | |
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| 690 | +/* ena_com_get_hash_key - Retrieve the hash key |
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| 691 | + * @ena_dev: ENA communication layer struct |
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| 692 | + * @key: hash key |
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| 693 | + * |
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| 694 | + * Retrieve the hash key. |
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| 695 | + * |
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| 696 | + * @note: If the caller called ena_com_fill_hash_key but didn't flush |
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| 697 | + * it to the device, the new configuration will be lost. |
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| 698 | + * |
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| 699 | + * @return: 0 on Success and negative value otherwise. |
|---|
| 700 | + */ |
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| 701 | +int ena_com_get_hash_key(struct ena_com_dev *ena_dev, u8 *key); |
|---|
| 691 | 702 | /* ena_com_fill_hash_ctrl - Fill RSS hash control |
|---|
| 692 | 703 | * @ena_dev: ENA communication layer struct. |
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| 693 | 704 | * @proto: The protocol to configure. |
|---|
| .. | .. |
|---|
| 722 | 733 | * |
|---|
| 723 | 734 | * Retrieve the hash control from the device. |
|---|
| 724 | 735 | * |
|---|
| 725 | | - * @note, If the caller called ena_com_fill_hash_ctrl but didn't flash |
|---|
| 736 | + * @note: If the caller called ena_com_fill_hash_ctrl but didn't flush |
|---|
| 726 | 737 | * it to the device, the new configuration will be lost. |
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| 727 | 738 | * |
|---|
| 728 | 739 | * @return: 0 on Success and negative value otherwise. |
|---|
| .. | .. |
|---|
| 774 | 785 | * |
|---|
| 775 | 786 | * Retrieve the RSS indirection table from the device. |
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| 776 | 787 | * |
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| 777 | | - * @note: If the caller called ena_com_indirect_table_fill_entry but didn't flash |
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| 788 | + * @note: If the caller called ena_com_indirect_table_fill_entry but didn't flush |
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| 778 | 789 | * it to the device, the new configuration will be lost. |
|---|
| 779 | 790 | * |
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| 780 | 791 | * @return: 0 on Success and negative value otherwise. |
|---|
| .. | .. |
|---|
| 800 | 811 | /* ena_com_delete_debug_area - Free the debug area resources. |
|---|
| 801 | 812 | * @ena_dev: ENA communication layer struct |
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| 802 | 813 | * |
|---|
| 803 | | - * Free the allocate debug area. |
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| 814 | + * Free the allocated debug area. |
|---|
| 804 | 815 | */ |
|---|
| 805 | 816 | void ena_com_delete_debug_area(struct ena_com_dev *ena_dev); |
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| 806 | 817 | |
|---|
| 807 | 818 | /* ena_com_delete_host_info - Free the host info resources. |
|---|
| 808 | 819 | * @ena_dev: ENA communication layer struct |
|---|
| 809 | 820 | * |
|---|
| 810 | | - * Free the allocate host info. |
|---|
| 821 | + * Free the allocated host info. |
|---|
| 811 | 822 | */ |
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| 812 | 823 | void ena_com_delete_host_info(struct ena_com_dev *ena_dev); |
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| 813 | 824 | |
|---|
| .. | .. |
|---|
| 848 | 859 | * @cmd_completion: command completion return value. |
|---|
| 849 | 860 | * @cmd_comp_size: command completion size. |
|---|
| 850 | 861 | |
|---|
| 851 | | - * Submit an admin command and then wait until the device will return a |
|---|
| 862 | + * Submit an admin command and then wait until the device returns a |
|---|
| 852 | 863 | * completion. |
|---|
| 853 | | - * The completion will be copyed into cmd_comp. |
|---|
| 864 | + * The completion will be copied into cmd_comp. |
|---|
| 854 | 865 | * |
|---|
| 855 | 866 | * @return - 0 on success, negative value on failure. |
|---|
| 856 | 867 | */ |
|---|
| .. | .. |
|---|
| 867 | 878 | */ |
|---|
| 868 | 879 | int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev); |
|---|
| 869 | 880 | |
|---|
| 870 | | -/* ena_com_destroy_interrupt_moderation - Destroy interrupt moderation resources |
|---|
| 871 | | - * @ena_dev: ENA communication layer struct |
|---|
| 872 | | - */ |
|---|
| 873 | | -void ena_com_destroy_interrupt_moderation(struct ena_com_dev *ena_dev); |
|---|
| 874 | | - |
|---|
| 875 | 881 | /* ena_com_interrupt_moderation_supported - Return if interrupt moderation |
|---|
| 876 | 882 | * capability is supported by the device. |
|---|
| 877 | 883 | * |
|---|
| 878 | 884 | * @return - supported or not. |
|---|
| 879 | 885 | */ |
|---|
| 880 | 886 | bool ena_com_interrupt_moderation_supported(struct ena_com_dev *ena_dev); |
|---|
| 881 | | - |
|---|
| 882 | | -/* ena_com_config_default_interrupt_moderation_table - Restore the interrupt |
|---|
| 883 | | - * moderation table back to the default parameters. |
|---|
| 884 | | - * @ena_dev: ENA communication layer struct |
|---|
| 885 | | - */ |
|---|
| 886 | | -void ena_com_config_default_interrupt_moderation_table(struct ena_com_dev *ena_dev); |
|---|
| 887 | 887 | |
|---|
| 888 | 888 | /* ena_com_update_nonadaptive_moderation_interval_tx - Update the |
|---|
| 889 | 889 | * non-adaptive interval in Tx direction. |
|---|
| .. | .. |
|---|
| 921 | 921 | */ |
|---|
| 922 | 922 | unsigned int ena_com_get_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev); |
|---|
| 923 | 923 | |
|---|
| 924 | | -/* ena_com_init_intr_moderation_entry - Update a single entry in the interrupt |
|---|
| 925 | | - * moderation table. |
|---|
| 924 | +/* ena_com_config_dev_mode - Configure the placement policy of the device. |
|---|
| 926 | 925 | * @ena_dev: ENA communication layer struct |
|---|
| 927 | | - * @level: Interrupt moderation table level |
|---|
| 928 | | - * @entry: Entry value |
|---|
| 929 | | - * |
|---|
| 930 | | - * Update a single entry in the interrupt moderation table. |
|---|
| 926 | + * @llq_features: LLQ feature descriptor, retrieve via |
|---|
| 927 | + * ena_com_get_dev_attr_feat. |
|---|
| 928 | + * @ena_llq_config: The default driver LLQ parameters configurations |
|---|
| 931 | 929 | */ |
|---|
| 932 | | -void ena_com_init_intr_moderation_entry(struct ena_com_dev *ena_dev, |
|---|
| 933 | | - enum ena_intr_moder_level level, |
|---|
| 934 | | - struct ena_intr_moder_entry *entry); |
|---|
| 935 | | - |
|---|
| 936 | | -/* ena_com_get_intr_moderation_entry - Init ena_intr_moder_entry. |
|---|
| 937 | | - * @ena_dev: ENA communication layer struct |
|---|
| 938 | | - * @level: Interrupt moderation table level |
|---|
| 939 | | - * @entry: Entry to fill. |
|---|
| 940 | | - * |
|---|
| 941 | | - * Initialize the entry according to the adaptive interrupt moderation table. |
|---|
| 942 | | - */ |
|---|
| 943 | | -void ena_com_get_intr_moderation_entry(struct ena_com_dev *ena_dev, |
|---|
| 944 | | - enum ena_intr_moder_level level, |
|---|
| 945 | | - struct ena_intr_moder_entry *entry); |
|---|
| 930 | +int ena_com_config_dev_mode(struct ena_com_dev *ena_dev, |
|---|
| 931 | + struct ena_admin_feature_llq_desc *llq_features, |
|---|
| 932 | + struct ena_llq_configurations *llq_default_config); |
|---|
| 946 | 933 | |
|---|
| 947 | 934 | static inline bool ena_com_get_adaptive_moderation_enabled(struct ena_com_dev *ena_dev) |
|---|
| 948 | 935 | { |
|---|
| .. | .. |
|---|
| 959 | 946 | ena_dev->adaptive_coalescing = false; |
|---|
| 960 | 947 | } |
|---|
| 961 | 948 | |
|---|
| 962 | | -/* ena_com_calculate_interrupt_delay - Calculate new interrupt delay |
|---|
| 963 | | - * @ena_dev: ENA communication layer struct |
|---|
| 964 | | - * @pkts: Number of packets since the last update |
|---|
| 965 | | - * @bytes: Number of bytes received since the last update. |
|---|
| 966 | | - * @smoothed_interval: Returned interval |
|---|
| 967 | | - * @moder_tbl_idx: Current table level as input update new level as return |
|---|
| 968 | | - * value. |
|---|
| 969 | | - */ |
|---|
| 970 | | -static inline void ena_com_calculate_interrupt_delay(struct ena_com_dev *ena_dev, |
|---|
| 971 | | - unsigned int pkts, |
|---|
| 972 | | - unsigned int bytes, |
|---|
| 973 | | - unsigned int *smoothed_interval, |
|---|
| 974 | | - unsigned int *moder_tbl_idx) |
|---|
| 975 | | -{ |
|---|
| 976 | | - enum ena_intr_moder_level curr_moder_idx, new_moder_idx; |
|---|
| 977 | | - struct ena_intr_moder_entry *curr_moder_entry; |
|---|
| 978 | | - struct ena_intr_moder_entry *pred_moder_entry; |
|---|
| 979 | | - struct ena_intr_moder_entry *new_moder_entry; |
|---|
| 980 | | - struct ena_intr_moder_entry *intr_moder_tbl = ena_dev->intr_moder_tbl; |
|---|
| 981 | | - unsigned int interval; |
|---|
| 982 | | - |
|---|
| 983 | | - /* We apply adaptive moderation on Rx path only. |
|---|
| 984 | | - * Tx uses static interrupt moderation. |
|---|
| 985 | | - */ |
|---|
| 986 | | - if (!pkts || !bytes) |
|---|
| 987 | | - /* Tx interrupt, or spurious interrupt, |
|---|
| 988 | | - * in both cases we just use same delay values |
|---|
| 989 | | - */ |
|---|
| 990 | | - return; |
|---|
| 991 | | - |
|---|
| 992 | | - curr_moder_idx = (enum ena_intr_moder_level)(*moder_tbl_idx); |
|---|
| 993 | | - if (unlikely(curr_moder_idx >= ENA_INTR_MAX_NUM_OF_LEVELS)) { |
|---|
| 994 | | - pr_err("Wrong moderation index %u\n", curr_moder_idx); |
|---|
| 995 | | - return; |
|---|
| 996 | | - } |
|---|
| 997 | | - |
|---|
| 998 | | - curr_moder_entry = &intr_moder_tbl[curr_moder_idx]; |
|---|
| 999 | | - new_moder_idx = curr_moder_idx; |
|---|
| 1000 | | - |
|---|
| 1001 | | - if (curr_moder_idx == ENA_INTR_MODER_LOWEST) { |
|---|
| 1002 | | - if ((pkts > curr_moder_entry->pkts_per_interval) || |
|---|
| 1003 | | - (bytes > curr_moder_entry->bytes_per_interval)) |
|---|
| 1004 | | - new_moder_idx = |
|---|
| 1005 | | - (enum ena_intr_moder_level)(curr_moder_idx + ENA_INTR_MODER_LEVEL_STRIDE); |
|---|
| 1006 | | - } else { |
|---|
| 1007 | | - pred_moder_entry = &intr_moder_tbl[curr_moder_idx - ENA_INTR_MODER_LEVEL_STRIDE]; |
|---|
| 1008 | | - |
|---|
| 1009 | | - if ((pkts <= pred_moder_entry->pkts_per_interval) || |
|---|
| 1010 | | - (bytes <= pred_moder_entry->bytes_per_interval)) |
|---|
| 1011 | | - new_moder_idx = |
|---|
| 1012 | | - (enum ena_intr_moder_level)(curr_moder_idx - ENA_INTR_MODER_LEVEL_STRIDE); |
|---|
| 1013 | | - else if ((pkts > curr_moder_entry->pkts_per_interval) || |
|---|
| 1014 | | - (bytes > curr_moder_entry->bytes_per_interval)) { |
|---|
| 1015 | | - if (curr_moder_idx != ENA_INTR_MODER_HIGHEST) |
|---|
| 1016 | | - new_moder_idx = |
|---|
| 1017 | | - (enum ena_intr_moder_level)(curr_moder_idx + ENA_INTR_MODER_LEVEL_STRIDE); |
|---|
| 1018 | | - } |
|---|
| 1019 | | - } |
|---|
| 1020 | | - new_moder_entry = &intr_moder_tbl[new_moder_idx]; |
|---|
| 1021 | | - |
|---|
| 1022 | | - interval = new_moder_entry->intr_moder_interval; |
|---|
| 1023 | | - *smoothed_interval = ( |
|---|
| 1024 | | - (interval * ENA_INTR_DELAY_NEW_VALUE_WEIGHT + |
|---|
| 1025 | | - ENA_INTR_DELAY_OLD_VALUE_WEIGHT * (*smoothed_interval)) + 5) / |
|---|
| 1026 | | - 10; |
|---|
| 1027 | | - |
|---|
| 1028 | | - *moder_tbl_idx = new_moder_idx; |
|---|
| 1029 | | -} |
|---|
| 1030 | | - |
|---|
| 1031 | 949 | /* ena_com_update_intr_reg - Prepare interrupt register |
|---|
| 1032 | 950 | * @intr_reg: interrupt register to update. |
|---|
| 1033 | 951 | * @rx_delay_interval: Rx interval in usecs |
|---|
| 1034 | 952 | * @tx_delay_interval: Tx interval in usecs |
|---|
| 1035 | | - * @unmask: unask enable/disable |
|---|
| 953 | + * @unmask: unmask enable/disable |
|---|
| 1036 | 954 | * |
|---|
| 1037 | 955 | * Prepare interrupt update register with the supplied parameters. |
|---|
| 1038 | 956 | */ |
|---|
| .. | .. |
|---|
| 1053 | 971 | intr_reg->intr_control |= ENA_ETH_IO_INTR_REG_INTR_UNMASK_MASK; |
|---|
| 1054 | 972 | } |
|---|
| 1055 | 973 | |
|---|
| 974 | +static inline u8 *ena_com_get_next_bounce_buffer(struct ena_com_io_bounce_buffer_control *bounce_buf_ctrl) |
|---|
| 975 | +{ |
|---|
| 976 | + u16 size, buffers_num; |
|---|
| 977 | + u8 *buf; |
|---|
| 978 | + |
|---|
| 979 | + size = bounce_buf_ctrl->buffer_size; |
|---|
| 980 | + buffers_num = bounce_buf_ctrl->buffers_num; |
|---|
| 981 | + |
|---|
| 982 | + buf = bounce_buf_ctrl->base_buffer + |
|---|
| 983 | + (bounce_buf_ctrl->next_to_use++ & (buffers_num - 1)) * size; |
|---|
| 984 | + |
|---|
| 985 | + prefetchw(bounce_buf_ctrl->base_buffer + |
|---|
| 986 | + (bounce_buf_ctrl->next_to_use & (buffers_num - 1)) * size); |
|---|
| 987 | + |
|---|
| 988 | + return buf; |
|---|
| 989 | +} |
|---|
| 990 | + |
|---|
| 1056 | 991 | #endif /* !(ENA_COM) */ |
|---|