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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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| 1 | 2 | /* CAN bus driver for Holt HI3110 CAN Controller with SPI Interface |
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| 2 | 3 | * |
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| 3 | 4 | * Copyright(C) Timesys Corporation 2016 |
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| .. | .. |
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| 11 | 12 | * - Sascha Hauer, Marc Kleine-Budde, Pengutronix |
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| 12 | 13 | * - Simon Kallweit, intefo AG |
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| 13 | 14 | * Copyright 2007 |
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| 14 | | - * |
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| 15 | | - * This program is free software; you can redistribute it and/or modify |
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| 16 | | - * it under the terms of the GNU General Public License version 2 as |
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| 17 | | - * published by the Free Software Foundation. |
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| 18 | 15 | */ |
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| 19 | 16 | |
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| 20 | 17 | #include <linux/can/core.h> |
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| .. | .. |
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| 24 | 21 | #include <linux/completion.h> |
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| 25 | 22 | #include <linux/delay.h> |
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| 26 | 23 | #include <linux/device.h> |
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| 27 | | -#include <linux/dma-mapping.h> |
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| 28 | 24 | #include <linux/freezer.h> |
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| 29 | 25 | #include <linux/interrupt.h> |
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| 30 | 26 | #include <linux/io.h> |
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| .. | .. |
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| 129 | 125 | |
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| 130 | 126 | #define DEVICE_NAME "hi3110" |
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| 131 | 127 | |
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| 132 | | -static int hi3110_enable_dma = 1; /* Enable SPI DMA. Default: 1 (On) */ |
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| 133 | | -module_param(hi3110_enable_dma, int, 0444); |
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| 134 | | -MODULE_PARM_DESC(hi3110_enable_dma, "Enable SPI DMA. Default: 1 (On)"); |
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| 135 | | - |
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| 136 | 128 | static const struct can_bittiming_const hi3110_bittiming_const = { |
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| 137 | 129 | .name = DEVICE_NAME, |
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| 138 | 130 | .tseg1_min = 2, |
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| .. | .. |
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| 159 | 151 | |
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| 160 | 152 | u8 *spi_tx_buf; |
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| 161 | 153 | u8 *spi_rx_buf; |
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| 162 | | - dma_addr_t spi_tx_dma; |
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| 163 | | - dma_addr_t spi_rx_dma; |
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| 164 | 154 | |
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| 165 | 155 | struct sk_buff *tx_skb; |
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| 166 | 156 | int tx_len; |
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| .. | .. |
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| 187 | 177 | |
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| 188 | 178 | if (priv->tx_skb || priv->tx_len) |
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| 189 | 179 | net->stats.tx_errors++; |
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| 190 | | - if (priv->tx_skb) |
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| 191 | | - dev_kfree_skb(priv->tx_skb); |
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| 180 | + dev_kfree_skb(priv->tx_skb); |
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| 192 | 181 | if (priv->tx_len) |
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| 193 | 182 | can_free_echo_skb(priv->net, 0); |
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| 194 | 183 | priv->tx_skb = NULL; |
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| .. | .. |
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| 220 | 209 | int ret; |
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| 221 | 210 | |
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| 222 | 211 | spi_message_init(&m); |
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| 223 | | - |
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| 224 | | - if (hi3110_enable_dma) { |
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| 225 | | - t.tx_dma = priv->spi_tx_dma; |
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| 226 | | - t.rx_dma = priv->spi_rx_dma; |
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| 227 | | - m.is_dma_mapped = 1; |
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| 228 | | - } |
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| 229 | | - |
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| 230 | 212 | spi_message_add_tail(&t, &m); |
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| 231 | 213 | |
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| 232 | 214 | ret = spi_sync(spi, &m); |
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| .. | .. |
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| 688 | 670 | |
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| 689 | 671 | txerr = hi3110_read(spi, HI3110_READ_TEC); |
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| 690 | 672 | rxerr = hi3110_read(spi, HI3110_READ_REC); |
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| 691 | | - cf->data[6] = txerr; |
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| 692 | | - cf->data[7] = rxerr; |
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| 693 | 673 | tx_state = txerr >= rxerr ? new_state : 0; |
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| 694 | 674 | rx_state = txerr <= rxerr ? new_state : 0; |
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| 695 | 675 | can_change_state(net, cf, tx_state, rx_state); |
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| .. | .. |
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| 702 | 682 | hi3110_hw_sleep(spi); |
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| 703 | 683 | break; |
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| 704 | 684 | } |
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| 685 | + } else { |
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| 686 | + cf->data[6] = txerr; |
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| 687 | + cf->data[7] = rxerr; |
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| 705 | 688 | } |
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| 706 | 689 | } |
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| 707 | 690 | |
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| .. | .. |
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| 918 | 901 | priv->spi = spi; |
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| 919 | 902 | mutex_init(&priv->hi3110_lock); |
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| 920 | 903 | |
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| 921 | | - /* If requested, allocate DMA buffers */ |
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| 922 | | - if (hi3110_enable_dma) { |
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| 923 | | - spi->dev.coherent_dma_mask = ~0; |
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| 924 | | - |
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| 925 | | - /* Minimum coherent DMA allocation is PAGE_SIZE, so allocate |
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| 926 | | - * that much and share it between Tx and Rx DMA buffers. |
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| 927 | | - */ |
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| 928 | | - priv->spi_tx_buf = dmam_alloc_coherent(&spi->dev, |
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| 929 | | - PAGE_SIZE, |
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| 930 | | - &priv->spi_tx_dma, |
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| 931 | | - GFP_DMA); |
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| 932 | | - |
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| 933 | | - if (priv->spi_tx_buf) { |
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| 934 | | - priv->spi_rx_buf = (priv->spi_tx_buf + (PAGE_SIZE / 2)); |
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| 935 | | - priv->spi_rx_dma = (dma_addr_t)(priv->spi_tx_dma + |
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| 936 | | - (PAGE_SIZE / 2)); |
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| 937 | | - } else { |
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| 938 | | - /* Fall back to non-DMA */ |
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| 939 | | - hi3110_enable_dma = 0; |
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| 940 | | - } |
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| 904 | + priv->spi_tx_buf = devm_kzalloc(&spi->dev, HI3110_RX_BUF_LEN, |
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| 905 | + GFP_KERNEL); |
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| 906 | + if (!priv->spi_tx_buf) { |
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| 907 | + ret = -ENOMEM; |
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| 908 | + goto error_probe; |
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| 941 | 909 | } |
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| 910 | + priv->spi_rx_buf = devm_kzalloc(&spi->dev, HI3110_RX_BUF_LEN, |
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| 911 | + GFP_KERNEL); |
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| 942 | 912 | |
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| 943 | | - /* Allocate non-DMA buffers */ |
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| 944 | | - if (!hi3110_enable_dma) { |
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| 945 | | - priv->spi_tx_buf = devm_kzalloc(&spi->dev, HI3110_RX_BUF_LEN, |
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| 946 | | - GFP_KERNEL); |
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| 947 | | - if (!priv->spi_tx_buf) { |
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| 948 | | - ret = -ENOMEM; |
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| 949 | | - goto error_probe; |
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| 950 | | - } |
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| 951 | | - priv->spi_rx_buf = devm_kzalloc(&spi->dev, HI3110_RX_BUF_LEN, |
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| 952 | | - GFP_KERNEL); |
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| 953 | | - |
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| 954 | | - if (!priv->spi_rx_buf) { |
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| 955 | | - ret = -ENOMEM; |
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| 956 | | - goto error_probe; |
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| 957 | | - } |
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| 913 | + if (!priv->spi_rx_buf) { |
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| 914 | + ret = -ENOMEM; |
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| 915 | + goto error_probe; |
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| 958 | 916 | } |
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| 959 | 917 | |
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| 960 | 918 | SET_NETDEV_DEV(net, &spi->dev); |
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