| .. | .. |
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| 318 | 318 | static int rawrd_config_mi(struct rkisp_stream *stream) |
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| 319 | 319 | { |
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| 320 | 320 | struct rkisp_device *dev = stream->ispdev; |
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| 321 | | - bool is_unite = dev->hw_dev->is_unite; |
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| 322 | 321 | u32 val; |
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| 323 | 322 | |
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| 324 | 323 | val = rkisp_read(dev, CSI2RX_DATA_IDS_1, true); |
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| .. | .. |
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| 348 | 347 | val |= CIF_CSI2_DT_RAW12; |
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| 349 | 348 | } |
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| 350 | 349 | rkisp_unite_write(dev, CSI2RX_RAW_RD_CTRL, |
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| 351 | | - stream->memory << 2, false, is_unite); |
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| 352 | | - rkisp_unite_write(dev, CSI2RX_DATA_IDS_1, val, false, is_unite); |
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| 350 | + stream->memory << 2, false); |
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| 351 | + rkisp_unite_write(dev, CSI2RX_DATA_IDS_1, val, false); |
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| 353 | 352 | rkisp_rawrd_set_pic_size(dev, stream->out_fmt.width, |
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| 354 | 353 | stream->out_fmt.height); |
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| 355 | 354 | mi_raw_length(stream); |
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| .. | .. |
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| 376 | 375 | } |
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| 377 | 376 | val += stream->curr_buf->buff_addr[RKISP_PLANE_Y]; |
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| 378 | 377 | rkisp_write(dev, stream->config->mi.y_base_ad_init, val, false); |
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| 379 | | - if (dev->hw_dev->is_unite) { |
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| 378 | + if (dev->hw_dev->unite) { |
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| 380 | 379 | u32 offs = stream->out_fmt.width / 2 - RKMOUDLE_UNITE_EXTEND_PIXEL; |
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| 381 | 380 | |
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| 382 | 381 | if (stream->memory) |
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| .. | .. |
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| 464 | 463 | } |
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| 465 | 464 | dev->hdr.op_mode = dev->rd_mode; |
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| 466 | 465 | rkisp_unite_write(dev, CSI2RX_CTRL0, |
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| 467 | | - SW_IBUF_OP_MODE(dev->hdr.op_mode), |
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| 468 | | - true, dev->hw_dev->is_unite); |
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| 466 | + SW_IBUF_OP_MODE(dev->hdr.op_mode), true); |
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| 469 | 467 | rkisp_unite_set_bits(dev, CSI2RX_MASK_STAT, |
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| 470 | | - 0, ISP21_MIPI_DROP_FRM, |
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| 471 | | - true, dev->hw_dev->is_unite); |
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| 472 | | - rkisp_unite_clear_bits(dev, CIF_ISP_IMSC, CIF_ISP_FRAME_IN, |
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| 473 | | - true, dev->hw_dev->is_unite); |
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| 468 | + 0, ISP21_MIPI_DROP_FRM, true); |
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| 469 | + rkisp_unite_clear_bits(dev, CIF_ISP_IMSC, CIF_ISP_FRAME_IN, true); |
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| 474 | 470 | dev_info(dev->dev, |
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| 475 | 471 | "switch online seq:%d mode:0x%x\n", |
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| 476 | 472 | rx_buf->sequence, dev->rd_mode); |
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| .. | .. |
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| 1135 | 1131 | { |
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| 1136 | 1132 | struct rkisp_isp_subdev *sdev = &dev->isp_sdev; |
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| 1137 | 1133 | u8 mult = sdev->in_fmt.fmt_type == FMT_YUV ? 2 : 1; |
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| 1138 | | - bool is_unite = dev->hw_dev->is_unite; |
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| 1134 | + bool is_unite = !!dev->hw_dev->unite; |
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| 1139 | 1135 | u32 w = !is_unite ? width : width / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL; |
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| 1140 | 1136 | |
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| 1141 | 1137 | /* rx height should equal to isp height + offset for read back mode */ |
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| .. | .. |
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| 1149 | 1145 | height += RKMODULE_EXTEND_LINE; |
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| 1150 | 1146 | |
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| 1151 | 1147 | w *= mult; |
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| 1152 | | - rkisp_unite_write(dev, CSI2RX_RAW_RD_PIC_SIZE, height << 16 | w, false, is_unite); |
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| 1148 | + rkisp_unite_write(dev, CSI2RX_RAW_RD_PIC_SIZE, height << 16 | w, false); |
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| 1153 | 1149 | } |
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| 1154 | 1150 | |
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| 1155 | 1151 | void rkisp_dmarx_get_frame(struct rkisp_device *dev, u32 *id, |
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| .. | .. |
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| 1160 | 1156 | u64 sof_time = 0, frame_timestamp = 0; |
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| 1161 | 1157 | u32 frame_id = 0; |
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| 1162 | 1158 | |
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| 1163 | | - if (!IS_HDR_RDBK(dev->rd_mode) && id) { |
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| 1164 | | - *id = atomic_read(&dev->isp_sdev.frm_sync_seq) - 1; |
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| 1165 | | - return; |
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| 1159 | + if (!IS_HDR_RDBK(dev->rd_mode)) { |
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| 1160 | + frame_id = atomic_read(&dev->isp_sdev.frm_sync_seq) - 1; |
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| 1161 | + frame_timestamp = dev->isp_sdev.frm_timestamp; |
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| 1162 | + goto end; |
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| 1166 | 1163 | } |
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| 1167 | 1164 | |
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| 1168 | 1165 | spin_lock_irqsave(&dev->rdbk_lock, flag); |
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| .. | .. |
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| 1176 | 1173 | frame_timestamp = dev->dmarx_dev.pre_frame.timestamp; |
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| 1177 | 1174 | } |
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| 1178 | 1175 | spin_unlock_irqrestore(&dev->rdbk_lock, flag); |
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| 1176 | +end: |
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| 1179 | 1177 | if (id) |
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| 1180 | 1178 | *id = frame_id; |
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| 1181 | 1179 | if (sof_timestamp) |
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